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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp @ 108

Last change on this file since 108 was 108, checked in by rosiere, 17 years ago
1) decod_queue : add reg_LAST_SLOT. 2) Commit : insert on event -> to pop decod_queue. Head test : add information (speculative or not) 3) Context State / UPT : Branch miss and Load miss in same cycle. 4) Free List : Bank is on LSB not MSB. 5) Platforms : move data
Property svn:keywords set to `Id`
File size: 31.7 KB

Line
1	/*
2	* $Id: test.cpp 108 2009-02-12 11:55:06Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (10240*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h"
13	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/Decod_request.h"
14	#include "Common/include/Test.h"
15	#include "Behavioural/include/Allocation.h"
16
17	void test (string name,
18	morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters * _param)
19	{
20	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
21
22	#ifdef STATISTICS
23	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
24	#endif
25
26	Tusage_t _usage = USE_ALL;
27
28	// _usage = usage_unset(_usage,USE_SYSTEMC );
29	// _usage = usage_unset(_usage,USE_VHDL );
30	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
31	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
32	// _usage = usage_unset(_usage,USE_POSITION );
33	// _usage = usage_unset(_usage,USE_STATISTICS );
34	// _usage = usage_unset(_usage,USE_INFORMATION );
35
36	Decod_unit * _Decod_unit = new Decod_unit
37	(name.c_str(),
38	#ifdef STATISTICS
39	_parameters_statistics,
40	#endif
41	_param,
42	_usage);
43
44	#ifdef SYSTEMC
45	if (usage_is_set(_usage,USE_SYSTEMC))
46	{
47	/*********************************************************************
48	* Déclarations des signaux
49	*********************************************************************/
50	string rename;
51
52	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
53	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
54
55	ALLOC2_SC_SIGNAL( in_IFETCH_VAL ," in_IFETCH_VAL ",Tcontrol_t ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
56	ALLOC2_SC_SIGNAL(out_IFETCH_ACK ,"out_IFETCH_ACK ",Tcontrol_t ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
57	ALLOC2_SC_SIGNAL( in_IFETCH_INSTRUCTION ," in_IFETCH_INSTRUCTION ",Tinstruction_t ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
58
59	ALLOC1_SC_SIGNAL(in_IFETCH_CONTEXT_ID ,"in_IFETCH_CONTEXT_ID ",Tcontext_t ,_param->_nb_context);
60	ALLOC1_SC_SIGNAL(in_IFETCH_ADDRESS ,"in_IFETCH_ADDRESS ",Tgeneral_address_t ,_param->_nb_context);
61	//ALLOC1_SC_SIGNAL(in_IFETCH_ADDRESS_NEXT ,"in_IFETCH_ADDRESS_NEXT ",Tgeneral_address_t ,_param->_nb_context);
62	ALLOC1_SC_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,"in_IFETCH_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context);
63	ALLOC1_SC_SIGNAL(in_IFETCH_BRANCH_STATE ,"in_IFETCH_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context);
64	ALLOC1_SC_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,"in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_context);
65	ALLOC1_SC_SIGNAL(in_IFETCH_EXCEPTION ,"in_IFETCH_EXCEPTION ",Texception_t ,_param->_nb_context);
66
67	ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
68	ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
69	ALLOC1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,"out_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
70	ALLOC1_SC_SIGNAL(out_DECOD_DEPTH ,"out_DECOD_DEPTH ",Tdepth_t ,_param->_nb_inst_decod);
71	ALLOC1_SC_SIGNAL(out_DECOD_TYPE ,"out_DECOD_TYPE ",Ttype_t ,_param->_nb_inst_decod);
72	ALLOC1_SC_SIGNAL(out_DECOD_OPERATION ,"out_DECOD_OPERATION ",Toperation_t ,_param->_nb_inst_decod);
73	ALLOC1_SC_SIGNAL(out_DECOD_NO_EXECUTE ,"out_DECOD_NO_EXECUTE ",Tcontrol_t ,_param->_nb_inst_decod);
74	ALLOC1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,"out_DECOD_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_inst_decod);
75	#ifdef DEBUG
76	ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_decod);
77	#endif
78	ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS_NEXT ,"out_DECOD_ADDRESS_NEXT ",Tgeneral_data_t ,_param->_nb_inst_decod);
79	ALLOC1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,"out_DECOD_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_decod);
80	ALLOC1_SC_SIGNAL(out_DECOD_IMMEDIAT ,"out_DECOD_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_decod);
81	ALLOC1_SC_SIGNAL(out_DECOD_READ_RA ,"out_DECOD_READ_RA ",Tcontrol_t ,_param->_nb_inst_decod);
82	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,"out_DECOD_NUM_REG_RA ",Tgeneral_address_t ,_param->_nb_inst_decod);
83	ALLOC1_SC_SIGNAL(out_DECOD_READ_RB ,"out_DECOD_READ_RB ",Tcontrol_t ,_param->_nb_inst_decod);
84	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,"out_DECOD_NUM_REG_RB ",Tgeneral_address_t ,_param->_nb_inst_decod);
85	ALLOC1_SC_SIGNAL(out_DECOD_READ_RC ,"out_DECOD_READ_RC ",Tcontrol_t ,_param->_nb_inst_decod);
86	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,"out_DECOD_NUM_REG_RC ",Tspecial_address_t ,_param->_nb_inst_decod);
87	ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RD ,"out_DECOD_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_decod);
88	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,"out_DECOD_NUM_REG_RD ",Tgeneral_address_t ,_param->_nb_inst_decod);
89	ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RE ,"out_DECOD_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_decod);
90	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,"out_DECOD_NUM_REG_RE ",Tspecial_address_t ,_param->_nb_inst_decod);
91	ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,"out_DECOD_EXCEPTION_USE ",Texception_t ,_param->_nb_inst_decod);
92	ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION ,"out_DECOD_EXCEPTION ",Texception_t ,_param->_nb_inst_decod);
93
94	ALLOC1_SC_SIGNAL(out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
95	ALLOC1_SC_SIGNAL( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
96	ALLOC1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,"out_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
97	ALLOC1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,"out_PREDICT_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_inst_decod);
98	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_inst_decod);
99	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_inst_decod);
100	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,"out_PREDICT_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod);
101	//ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,"out_PREDICT_BRANCH_STACK_WRITE ",Tcontrol_t ,_param->_nb_inst_decod);
102	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,"out_PREDICT_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_inst_decod);
103	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod);
104	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod);
105	//ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ," in_PREDICT_CAN_CONTINUE ",Tcontrol_t ,_param->_nb_inst_decod);
106
107	ALLOC1_SC_SIGNAL( in_DEPTH_MIN ," in_DEPTH_MIN ",Tdepth_t ,_param->_nb_context);
108	ALLOC1_SC_SIGNAL( in_DEPTH_MAX ," in_DEPTH_MAX ",Tdepth_t ,_param->_nb_context);
109	ALLOC1_SC_SIGNAL( in_DEPTH_FULL ," in_DEPTH_FULL ",Tcontrol_t ,_param->_nb_context);
110
111	ALLOC1_SC_SIGNAL(out_NB_INST_DECOD_ALL ,"out_NB_INST_DECOD_ALL ",Tcounter_t ,_param->_nb_context);
112
113	ALLOC1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ," in_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context);
114	ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH_VAL ," in_CONTEXT_DEPTH_VAL ",Tcontrol_t ,_param->_nb_context);
115	ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH ," in_CONTEXT_DEPTH ",Tdepth_t ,_param->_nb_context);
116
117	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_VAL ,"out_CONTEXT_EVENT_VAL ",Tcontrol_t );
118	ALLOC_SC_SIGNAL( in_CONTEXT_EVENT_ACK ," in_CONTEXT_EVENT_ACK ",Tcontrol_t );
119	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_CONTEXT_ID ,"out_CONTEXT_EVENT_CONTEXT_ID ",Tcontext_t );
120	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_DEPTH ,"out_CONTEXT_EVENT_DEPTH ",Tdepth_t );
121	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_TYPE ,"out_CONTEXT_EVENT_TYPE ",Tevent_type_t );
122	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_IS_DELAY_SLOT ,"out_CONTEXT_EVENT_IS_DELAY_SLOT ",Tcontrol_t );
123	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS ,"out_CONTEXT_EVENT_ADDRESS ",Tgeneral_data_t );
124	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR ,"out_CONTEXT_EVENT_ADDRESS_EPCR ",Tgeneral_data_t );
125
126	/********************************************************
127	* Instanciation
128	********************************************************/
129
130	msg(_("<%s> : Instanciation of _Decod_unit.\n"),name.c_str());
131
132	((_Decod_unit->in_CLOCK)) ((in_CLOCK));
133	((_Decod_unit->in_NRESET)) ((in_NRESET));
134
135	INSTANCE2_SC_SIGNAL(_Decod_unit, in_IFETCH_VAL ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
136	INSTANCE2_SC_SIGNAL(_Decod_unit,out_IFETCH_ACK ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
137	INSTANCE2_SC_SIGNAL(_Decod_unit, in_IFETCH_INSTRUCTION ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
138	if (_param->_have_port_context_id)
139	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_CONTEXT_ID ,_param->_nb_context);
140	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_ADDRESS ,_param->_nb_context);
141	//INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_ADDRESS_NEXT ,_param->_nb_context);
142
143	for (uint32_t i=0; i<_param->_nb_context; ++i)
144	{
145	if (_param->_have_port_inst_ifetch_ptr)
146	INSTANCE_SC_SIGNAL(_Decod_unit,in_IFETCH_INST_IFETCH_PTR[i]);
147	if (_param->_have_port_depth)
148	INSTANCE_SC_SIGNAL(_Decod_unit,in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]);
149	}
150
151	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_BRANCH_STATE ,_param->_nb_context);
152	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_EXCEPTION ,_param->_nb_context);
153
154	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_VAL ,_param->_nb_inst_decod);
155	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DECOD_ACK ,_param->_nb_inst_decod);
156	if (_param->_have_port_context_id)
157	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
158	if (_param->_have_port_depth)
159	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_DEPTH ,_param->_nb_inst_decod);
160	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_TYPE ,_param->_nb_inst_decod);
161	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_OPERATION ,_param->_nb_inst_decod);
162	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NO_EXECUTE ,_param->_nb_inst_decod);
163	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod);
164	#ifdef DEBUG
165	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_ADDRESS ,_param->_nb_inst_decod);
166	#endif
167	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_ADDRESS_NEXT ,_param->_nb_inst_decod);
168	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod);
169	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_IMMEDIAT ,_param->_nb_inst_decod);
170	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RA ,_param->_nb_inst_decod);
171	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod);
172	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RB ,_param->_nb_inst_decod);
173	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod);
174	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RC ,_param->_nb_inst_decod);
175	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod);
176	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_WRITE_RD ,_param->_nb_inst_decod);
177	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod);
178	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_WRITE_RE ,_param->_nb_inst_decod);
179	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod);
180	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod);
181	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_EXCEPTION ,_param->_nb_inst_decod);
182
183	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_VAL ,_param->_nb_inst_decod);
184	INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_ACK ,_param->_nb_inst_decod);
185	if (_param->_have_port_context_id)
186	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod);
187	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod);
188	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod);
189	if (_param->_have_port_depth)
190	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
191	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod);
192	//INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod);
193	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod);
194	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod);
195	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod);
196	//INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod);
197
198	if (_param->_have_port_depth)
199	{
200	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_MIN ,_param->_nb_context);
201	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_MAX ,_param->_nb_context);
202	}
203	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_FULL ,_param->_nb_context);
204	INSTANCE1_SC_SIGNAL(_Decod_unit,out_NB_INST_DECOD_ALL ,_param->_nb_context);
205
206	INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DECOD_ENABLE ,_param->_nb_context);
207
208	INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DEPTH_VAL ,_param->_nb_context);
209	if (_param->_have_port_depth)
210	INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DEPTH ,_param->_nb_context);
211
212	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_VAL );
213	INSTANCE_SC_SIGNAL( _Decod_unit, in_CONTEXT_EVENT_ACK );
214	if (_param->_have_port_context_id)
215	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_CONTEXT_ID );
216	if (_param->_have_port_depth)
217	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_DEPTH );
218	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_TYPE );
219	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_IS_DELAY_SLOT );
220	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_ADDRESS );
221	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_ADDRESS_EPCR );
222
223	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
224
225	Time * _time = new Time();
226
227	/********************************************************
228	* Simulation - Begin
229	********************************************************/
230
231	// Initialisation
232
233	const uint32_t seed = 0;
234	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
235
236	const int32_t percent_transaction_ifetch = 100;
237	const int32_t percent_transaction_decod = 100;
238	const int32_t percent_transaction_predict = 100;
239	const int32_t percent_transaction_event = 100;
240
241	srand(seed);
242
243	SC_START(0);
244	LABEL("Initialisation");
245
246	LABEL("Reset");
247	in_NRESET->write(0);
248	SC_START(5);
249	in_NRESET->write(1);
250
251	for (uint32_t i=0; i<_param->_nb_context; i++)
252	in_CONTEXT_DEPTH_VAL [i]->write(1);
253
254	LABEL("Loop of Test");
255
256	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
257	{
258	LABEL("Iteration %d",iteration);
259
260	Decod_request request [_param->_nb_context];
261	list<entry_t> respons [_param->_nb_context];
262
263	uint32_t nb_request = 0;
264
265	uint32_t delay_slot_previous [_param->_nb_context];
266	uint32_t delay_slot_current [_param->_nb_context];
267	uint32_t delay_slot_next [_param->_nb_context];
268
269	for (uint32_t i=0; i<_param->_nb_context; i++)
270	{
271	nb_request += request[i].size();
272	delay_slot_current [i] = false;
273	delay_slot_next [i] = false;
274
275	in_DEPTH_MIN [i]->write(0);
276	in_DEPTH_MAX [i]->write(0);
277	in_CONTEXT_DEPTH [i]->write(0);
278	}
279
280	while (nb_request > 0)
281	{
282	for (uint32_t i=0; i<_param->_nb_context; i++)
283	{
284	delay_slot_previous [i] = false;
285
286	in_CONTEXT_DECOD_ENABLE [i]->write((rand()%100)<percent_transaction_decod);
287
288	for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
289	in_IFETCH_VAL [i][j]->write(0);
290
291	if ((rand()%100)<percent_transaction_ifetch)
292	{
293	list<entry_t>::iterator it = request[i].begin();
294
295	if (it!=request [i].end())
296	{
297	uint32_t lsb = it->_address%_param->_nb_inst_fetch[i];
298
299	in_IFETCH_ADDRESS [i]->write(it->_address-lsb);
300	in_IFETCH_BRANCH_STATE [i]->write(BRANCH_STATE_NONE);
301	if (_param->_have_port_inst_ifetch_ptr)
302	in_IFETCH_INST_IFETCH_PTR [i]->write(0);
303
304	// Alignement
305	for (uint32_t j=lsb; j<_param->_nb_inst_fetch[i]; j++)
306	{
307	in_IFETCH_VAL [i][j]->write(1);
308	in_IFETCH_INSTRUCTION [i][j]->write(it->_instruction);
309	// in_IFETCH_ADDRESS_NEXT [i]->write(it->_address_next);
310	if (it->_type == TYPE_BRANCH)
311	in_IFETCH_BRANCH_STATE [i]->write(it->_branch_state);
312	in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]->write(it->_branch_update_prediction_id);
313	in_IFETCH_EXCEPTION [i]->write(it->_exception_ifetch);
314
315	if ((it->_is_delay_slot) or
316	((++it)==request [i].end()))
317	break;
318	}
319	}
320	}
321	}
322
323	{
324	bool previous_ack = true;
325
326	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
327	{
328	bool ack = previous_ack and ((rand()%100)<percent_transaction_decod);
329	in_DECOD_ACK [i]->write(ack);
330
331	previous_ack = ack;
332
333	in_PREDICT_ACK [i]->write((rand()%100)<percent_transaction_predict);
334	// in_PREDICT_CAN_CONTINUE [i]->write(0);
335	}
336	}
337
338	in_CONTEXT_EVENT_ACK->write((rand()%100)<percent_transaction_event);
339
340	SC_START(0);
341
342	uint32_t find_event = false;
343	for (uint32_t i=0; i<_param->_nb_context; i++)
344	for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
345	if (in_IFETCH_VAL[i][j]->read() and out_IFETCH_ACK[i][j]->read())
346	{
347	LABEL("IFETCH [%d][%d] : transaction",i,j);
348
349	entry_t entry = request [i].front();
350	LABEL(" * address 0x%x",entry._address);
351
352	respons [i].push_back(entry);
353	request [i].pop_front();
354
355	if (entry._type == TYPE_BRANCH)
356	{
357	delay_slot_next [i] = true;
358
359	// find good decod
360	uint32_t x;
361
362	for (x=0; x<=_param->_nb_inst_decod; x++)
363	{
364	if (x==_param->_nb_inst_decod)
365	TEST_KO("No find predict transaction");
366
367	Tcontext_t ctxt = (_param->_have_port_context_id)?out_PREDICT_CONTEXT_ID[x]->read():0;
368
369	if ((ctxt == i) and
370	(out_PREDICT_VAL [x]->read() and in_PREDICT_ACK [x]->read()))
371	break;
372	}
373
374	LABEL("PREDICT [%d] : transaction",x );
375
376
377	TEST(Tcontrol_t , out_PREDICT_MATCH_INST_IFETCH_PTR [x]->read(),((entry._address)%_param->_nb_inst_fetch[i]) == 0);
378	TEST(Tbranch_state_t , out_PREDICT_BRANCH_STATE [x]->read(), entry._branch_state );
379	if (_param->_have_port_depth)
380	TEST(Tprediction_ptr_t , out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x]->read(), entry._branch_update_prediction_id);
381	TEST(Tbranch_condition_t, out_PREDICT_BRANCH_CONDITION [x]->read(), entry._branch_condition );
382	// TEST(Tcontrol_t , out_PREDICT_BRANCH_STACK_WRITE [x]->read(), entry._branch_stack_write );
383	TEST(Tcontrol_t , out_PREDICT_BRANCH_DIRECTION [x]->read(), entry._branch_direction );
384	TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [x]->read(), entry._address );
385	TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [x]->read(), entry._branch_address_dest );
386	}
387
388	// TEST(bool, find_event, false); // can continue decod after event
389	if (entry._context_event_type != EVENT_TYPE_NONE)
390	{
391	find_event = true;
392
393	LABEL("CONTEXT_EVENT : transaction");
394
395	if (_param->_have_port_context_id)
396	TEST(Tcontext_t ,out_CONTEXT_EVENT_CONTEXT_ID ->read(), i);
397	if (_param->_have_port_depth)
398	TEST(Tcontext_t ,out_CONTEXT_EVENT_DEPTH ->read(), entry._depth);
399	TEST(Tevent_type_t ,out_CONTEXT_EVENT_TYPE ->read(), entry._context_event_type);
400	TEST(Tcontrol_t ,out_CONTEXT_EVENT_IS_DELAY_SLOT->read(), entry._is_delay_slot);
401	TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS ->read(), entry._address );
402	TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS_EPCR ->read(), entry._address_next );
403	}
404
405	TEST(bool, delay_slot_previous [i], false); // can't continue
406	delay_slot_previous [i] = delay_slot_current [i];
407	delay_slot_current [i] = delay_slot_next [i];
408	delay_slot_next [i] = false;
409	}
410
411	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
412	if (out_DECOD_VAL[i]->read() and in_DECOD_ACK[i]->read())
413	{
414	Tcontext_t context = (_param->_have_port_context_id)?out_DECOD_CONTEXT_ID[i]->read():0;
415
416	LABEL("DECOD [%d] : transaction",i );
417
418	TEST(bool ,respons [context].empty(), false);
419
420	LABEL(" * context : %d",context);
421	LABEL(" * instruction : 0x%x",respons [context].front()._instruction);
422
423	if (_param->_have_port_depth)
424	TEST(Tdepth_t , out_DECOD_DEPTH [i]->read(), respons [context].front()._depth );
425	TEST(Ttype_t , out_DECOD_TYPE [i]->read(), respons [context].front()._type );
426	TEST(Toperation_t , out_DECOD_OPERATION [i]->read(), respons [context].front()._operation );
427	// TEST(Tcontrol_t , out_DECOD_NO_EXECUTE [i]->read(), respons [context].front()._no_execute );
428	TEST(Tcontrol_t , out_DECOD_IS_DELAY_SLOT [i]->read(), respons [context].front()._is_delay_slot);
429	// TEST(Tgeneral_data_t , out_DECOD_ADDRESS_NEXT [i]->read(), respons [context].front()._address_next );
430	TEST(Tcontrol_t , out_DECOD_HAS_IMMEDIAT [i]->read(), respons [context].front()._has_immediat );
431	if (respons [context].front()._has_immediat)
432	TEST(Tgeneral_data_t , out_DECOD_IMMEDIAT [i]->read(), respons [context].front()._immediat );
433	TEST(Tcontrol_t , out_DECOD_READ_RA [i]->read(), respons [context].front()._read_ra );
434	if (respons [context].front()._read_ra)
435	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RA [i]->read(), respons [context].front()._num_reg_ra );
436	TEST(Tcontrol_t , out_DECOD_READ_RB [i]->read(), respons [context].front()._read_rb );
437	if (respons [context].front()._read_rb)
438	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RB [i]->read(), respons [context].front()._num_reg_rb );
439	TEST(Tcontrol_t , out_DECOD_READ_RC [i]->read(), respons [context].front()._read_rc );
440	if (respons [context].front()._read_rc)
441	TEST(Tspecial_address_t, out_DECOD_NUM_REG_RC [i]->read(), respons [context].front()._num_reg_rc );
442	TEST(Tcontrol_t , out_DECOD_WRITE_RD [i]->read(), respons [context].front()._write_rd );
443	if (respons [context].front()._write_rd)
444	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RD [i]->read(), respons [context].front()._num_reg_rd );
445	TEST(Tcontrol_t , out_DECOD_WRITE_RE [i]->read(), respons [context].front()._write_re );
446	if (respons [context].front()._write_re)
447	TEST(Tspecial_address_t, out_DECOD_NUM_REG_RE [i]->read(), respons [context].front()._num_reg_re );
448	TEST(Texception_t , out_DECOD_EXCEPTION_USE [i]->read(), respons [context].front()._exception_use);
449	// TEST(Texception_t , out_DECOD_EXCEPTION [i]->read(), respons [context].front()._exception );
450
451	respons [context].pop_front();
452	nb_request --;
453	}
454
455	TEST(bool, (out_CONTEXT_EVENT_VAL->read() and in_CONTEXT_EVENT_ACK->read()), find_event);
456
457	SC_START(1);
458	}
459
460	for (uint32_t i=0; i<_param->_nb_context; i++)
461	{
462	TEST(Tcounter_t,out_NB_INST_DECOD_ALL [i]->read(), respons[i].size());
463
464	}
465	}
466
467	/********************************************************
468	* Simulation - End
469	********************************************************/
470
471	TEST_OK ("End of Simulation");
472	delete _time;
473
474	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
475
476	delete in_CLOCK;
477	delete in_NRESET;
478
479	DELETE2_SC_SIGNAL( in_IFETCH_VAL ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
480	DELETE2_SC_SIGNAL(out_IFETCH_ACK ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
481	DELETE2_SC_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
482	DELETE1_SC_SIGNAL(in_IFETCH_CONTEXT_ID ,_param->_nb_context);
483	DELETE1_SC_SIGNAL(in_IFETCH_ADDRESS ,_param->_nb_context);
484	//DELETE1_SC_SIGNAL(in_IFETCH_ADDRESS_NEXT ,_param->_nb_context);
485	DELETE1_SC_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context);
486	DELETE1_SC_SIGNAL(in_IFETCH_BRANCH_STATE ,_param->_nb_context);
487	DELETE1_SC_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context);
488	DELETE1_SC_SIGNAL(in_IFETCH_EXCEPTION ,_param->_nb_context);
489
490	DELETE1_SC_SIGNAL(out_DECOD_VAL ,_param->_nb_inst_decod);
491	DELETE1_SC_SIGNAL( in_DECOD_ACK ,_param->_nb_inst_decod);
492	DELETE1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
493	DELETE1_SC_SIGNAL(out_DECOD_DEPTH ,_param->_nb_inst_decod);
494	DELETE1_SC_SIGNAL(out_DECOD_TYPE ,_param->_nb_inst_decod);
495	DELETE1_SC_SIGNAL(out_DECOD_OPERATION ,_param->_nb_inst_decod);
496	DELETE1_SC_SIGNAL(out_DECOD_NO_EXECUTE ,_param->_nb_inst_decod);
497	DELETE1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod);
498	#ifdef DEBUG
499	DELETE1_SC_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_inst_decod);
500	#endif
501	DELETE1_SC_SIGNAL(out_DECOD_ADDRESS_NEXT ,_param->_nb_inst_decod);
502	DELETE1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod);
503	DELETE1_SC_SIGNAL(out_DECOD_IMMEDIAT ,_param->_nb_inst_decod);
504	DELETE1_SC_SIGNAL(out_DECOD_READ_RA ,_param->_nb_inst_decod);
505	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod);
506	DELETE1_SC_SIGNAL(out_DECOD_READ_RB ,_param->_nb_inst_decod);
507	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod);
508	DELETE1_SC_SIGNAL(out_DECOD_READ_RC ,_param->_nb_inst_decod);
509	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod);
510	DELETE1_SC_SIGNAL(out_DECOD_WRITE_RD ,_param->_nb_inst_decod);
511	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod);
512	DELETE1_SC_SIGNAL(out_DECOD_WRITE_RE ,_param->_nb_inst_decod);
513	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod);
514	DELETE1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod);
515	DELETE1_SC_SIGNAL(out_DECOD_EXCEPTION ,_param->_nb_inst_decod);
516
517	DELETE1_SC_SIGNAL(out_PREDICT_VAL ,_param->_nb_inst_decod);
518	DELETE1_SC_SIGNAL( in_PREDICT_ACK ,_param->_nb_inst_decod);
519	DELETE1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod);
520	DELETE1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod);
521	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod);
522	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
523	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod);
524	//DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod);
525	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod);
526	DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod);
527	DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod);
528	//DELETE1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod);
529
530	DELETE1_SC_SIGNAL( in_DEPTH_MIN ,_param->_nb_context);
531	DELETE1_SC_SIGNAL( in_DEPTH_MAX ,_param->_nb_context);
532	DELETE1_SC_SIGNAL( in_DEPTH_FULL ,_param->_nb_context);
533
534	DELETE1_SC_SIGNAL(out_NB_INST_DECOD_ALL ,_param->_nb_context);
535
536	DELETE1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ,_param->_nb_context);
537	DELETE1_SC_SIGNAL( in_CONTEXT_DEPTH_VAL ,_param->_nb_context);
538	DELETE1_SC_SIGNAL( in_CONTEXT_DEPTH ,_param->_nb_context);
539
540	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_VAL );
541	DELETE_SC_SIGNAL( in_CONTEXT_EVENT_ACK );
542	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_CONTEXT_ID );
543	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_DEPTH );
544	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_TYPE );
545	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_IS_DELAY_SLOT );
546	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS );
547	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR );
548	}
549	#endif
550
551	delete _Decod_unit;
552	#ifdef STATISTICS
553	delete _parameters_statistics;
554	#endif
555	}

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