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Decod_unit_allocation.cpp

Last change on this file was 139, checked in by rosiere, 14 years ago
Add test for all configuration RAT : add rat scheme (depth_save)
Property svn:keywords set to `Id`
File size: 31.4 KB

Line
1	/*
2	* $Id: Decod_unit_allocation.cpp 139 2010-07-30 14:47:27Z rosiere $
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_front_end {
15	namespace front_end {
16	namespace decod_unit {
17
18	#undef FUNCTION
19	#define FUNCTION "Decod_unit::allocation"
20	void Decod_unit::allocation
21	(
22	#ifdef STATISTICS
23	morpheo::behavioural::Parameters_Statistics * param_statistics
24	#else
25	void
26	#endif
27	)
28	{
29	log_begin(Decod_unit,FUNCTION);
30
31	_component = new Component (_usage);
32
33	Entity * entity = _component->set_entity (_name
34	,"Decod_unit"
35	#ifdef POSITION
36	,COMBINATORY
37	#endif
38	);
39
40	_interfaces = entity->set_interfaces();
41
42	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
43	{
44	Interface * interface = _interfaces->set_interface(""
45	#ifdef POSITION
46	,IN
47	,SOUTH,
48	"Generalist interface"
49	#endif
50	);
51
52	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
53	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
54	}
55
56	// ~~~~~[ Interface : "ifetch" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
57	{
58	ALLOC2_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context, _param->_nb_inst_fetch[it1]);
59
60	_ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]);
61	_ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]);
62	_ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
63	_ALLOC2_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
64	_ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]);
65	// _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]);
66	// _ALLOC2_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
67	_ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
68	_ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
69	_ALLOC2_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
70
71	ALLOC2_INTERFACE_END(_param->_nb_context, _param->_nb_inst_fetch[it1]);
72	}
73
74	// ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
75	{
76	ALLOC1_INTERFACE_BEGIN("decod", OUT, EAST, _("Instruction decoded"), _param->_nb_inst_decod);
77
78	ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL);
79	ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK);
80	ALLOC1_SIGNAL_OUT(out_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
81	ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth );
82	#ifdef STATISTICS
83	ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,uint32_t ,32);
84	#endif
85	ALLOC1_SIGNAL_OUT(out_DECOD_TYPE ,"type" ,Ttype_t ,_param->_size_type );
86	ALLOC1_SIGNAL_OUT(out_DECOD_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation );
87	ALLOC1_SIGNAL_OUT(out_DECOD_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 );
88	// ALLOC1_SIGNAL_OUT(out_DECOD_HAVE_EVENT ,"have_event" ,Tcontrol_t ,1 );
89	ALLOC1_SIGNAL_OUT(out_DECOD_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 );
90	ALLOC1_SIGNAL_OUT(out_DECOD_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t ,1 );
91	ALLOC1_SIGNAL_OUT(out_DECOD_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 );
92	#ifdef DEBUG
93	ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_instruction_address );
94	#endif
95	ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS_NEXT ,"address_next" ,Tgeneral_data_t ,_param->_size_instruction_address );
96	ALLOC1_SIGNAL_OUT(out_DECOD_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 );
97	ALLOC1_SIGNAL_OUT(out_DECOD_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data );
98	ALLOC1_SIGNAL_OUT(out_DECOD_READ_RA ,"read_ra" ,Tcontrol_t ,1 );
99	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RA ,"num_reg_ra" ,Tgeneral_address_t,_param->_size_general_register_logic);
100	ALLOC1_SIGNAL_OUT(out_DECOD_READ_RB ,"read_rb" ,Tcontrol_t ,1 );
101	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RB ,"num_reg_rb" ,Tgeneral_address_t,_param->_size_general_register_logic);
102	ALLOC1_SIGNAL_OUT(out_DECOD_READ_RC ,"read_rc" ,Tcontrol_t ,1 );
103	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RC ,"num_reg_rc" ,Tspecial_address_t,_param->_size_special_register_logic);
104	ALLOC1_SIGNAL_OUT(out_DECOD_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 );
105	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register_logic);
106	ALLOC1_SIGNAL_OUT(out_DECOD_WRITE_RE ,"write_re" ,Tcontrol_t ,1 );
107	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register_logic);
108	ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION_USE,"exception_use",Texception_t ,_param->_size_exception_use );
109	ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_decod );
110
111	ALLOC1_INTERFACE_END(_param->_nb_inst_decod);
112	}
113
114	// ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
115	{
116	ALLOC1_INTERFACE_BEGIN("predict",OUT,NORTH,_("Decod a branch -> inform the branch predictor."),_param->_nb_inst_decod);
117
118	ALLOC1_VALACK_OUT(out_PREDICT_VAL ,VAL);
119	ALLOC1_VALACK_IN ( in_PREDICT_ACK ,ACK);
120	ALLOC1_SIGNAL_OUT(out_PREDICT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
121	ALLOC1_SIGNAL_OUT(out_PREDICT_MATCH_INST_IFETCH_PTR ,"match_inst_ifetch_ptr" ,Tcontrol_t ,1 );
122	ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state );
123	ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth );
124	ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_CONDITION ,"branch_condition" ,Tbranch_condition_t,_param->_size_branch_condition);
125	// ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STACK_WRITE ,"branch_stack_write" ,Tcontrol_t ,1 );
126	ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_DIRECTION ,"branch_direction" ,Tcontrol_t ,1 );
127	ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_instruction_address );
128	ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_instruction_address );
129	ALLOC1_SIGNAL_IN ( in_PREDICT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1 );
130
131	ALLOC1_INTERFACE_END(_param->_nb_inst_decod);
132	}
133
134	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
135	{
136	ALLOC1_INTERFACE_BEGIN("depth",IN ,NORTH,_("Depth"), _param->_nb_context);
137
138	ALLOC1_SIGNAL_IN ( in_DEPTH_MIN ,"min" ,Tdepth_t ,_param->_size_depth);
139	ALLOC1_SIGNAL_IN ( in_DEPTH_MAX ,"max" ,Tdepth_t ,_param->_size_depth);
140	ALLOC1_SIGNAL_IN ( in_DEPTH_FULL ,"full" ,Tcontrol_t ,1);
141
142	ALLOC1_INTERFACE_END(_param->_nb_context);
143	}
144
145	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
146	{
147	ALLOC1_INTERFACE_BEGIN("nb_inst",OUT,NORTH,_("Instruction's number"), _param->_nb_context);
148
149	ALLOC1_SIGNAL_OUT(out_NB_INST_DECOD_ALL ,"decod_all" ,Tcounter_t ,_param->_size_nb_inst_decod);
150
151	ALLOC1_INTERFACE_END(_param->_nb_context);
152	}
153
154	// ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
155	{
156	ALLOC1_INTERFACE_BEGIN("context", IN, NORTH, _("context's information"), _param->_nb_context);
157
158	ALLOC1_SIGNAL_IN (in_CONTEXT_DECOD_ENABLE,"decod_enable",Tcontrol_t,1);
159	ALLOC1_SIGNAL_IN (in_CONTEXT_EVENT ,"event" ,Tcontrol_t,1);
160	ALLOC1_SIGNAL_IN (in_CONTEXT_DEPTH_VAL ,"depth_val" ,Tcontrol_t,1);
161	ALLOC1_SIGNAL_IN (in_CONTEXT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth);
162
163	ALLOC1_INTERFACE_END(_param->_nb_context);
164	}
165
166	// ~~~~~[ Interface : "context_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
167	{
168	ALLOC0_INTERFACE_BEGIN("context_event", OUT, NORTH, _("context's evenement"));
169
170	ALLOC0_VALACK_OUT(out_CONTEXT_EVENT_VAL ,VAL);
171	ALLOC0_VALACK_IN ( in_CONTEXT_EVENT_ACK ,ACK);
172	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
173	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth );
174	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type );
175	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t ,1 );
176	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_ADDRESS ,"address" ,Tgeneral_data_t,_param->_size_instruction_address);
177	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_ADDRESS_EPCR ,"address_epcr" ,Tgeneral_data_t,_param->_size_instruction_address);
178
179	ALLOC0_INTERFACE_END();
180	}
181
182	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
183	std::string src,dest;
184
185	{
186	src = _name+"_decod";
187	log_printf(INFO,Decod_unit,FUNCTION,_("Create : %s"),src.c_str());
188
189	_component_decod = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Decod
190	(src.c_str()
191	#ifdef STATISTICS
192	,param_statistics
193	#endif
194	,_param->_param_decod
195	,_usage);
196
197	_component->set_component (_component_decod->_component
198	#ifdef POSITION
199	, 50, 50, 10, 10
200	#endif
201	);
202	}
203
204	{
205	src = _name+"_decod_queue";
206	log_printf(INFO,Decod_unit,FUNCTION,_("Create : %s"),src.c_str());
207
208	_component_decod_queue = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue
209	(src.c_str()
210	#ifdef STATISTICS
211	,param_statistics
212	#endif
213	,_param->_param_decod_queue
214	,_usage);
215
216	_component->set_component (_component_decod_queue->_component
217	#ifdef POSITION
218	, 50, 50, 10, 10
219	#endif
220	);
221	}
222
223	// ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
224
225	// ===================================================================
226	// =====[ decod ]=====================================================
227	// ===================================================================
228	{
229	src = _name+"_decod";
230	log_printf(INFO,Decod_unit,FUNCTION,_("Instance : %s"),src.c_str());
231
232	{
233	dest = _name;
234	#ifdef POSITION
235	_component->interface_map (src ,"",
236	dest,"");
237	#endif
238	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
239	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
240	}
241
242	for (uint32_t i=0; i<_param->_nb_context; i++)
243	{
244	dest = _name;
245
246	for (uint32_t j=0; j<_param->_nb_inst_fetch [i]; j++)
247	{
248	#ifdef POSITION
249	_component->interface_map (src ,"ifetch_"+toString(i)+"_"+toString(j),
250	dest,"ifetch_"+toString(i)+"_"+toString(j));
251	#endif
252
253	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_VAL" ,
254	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_VAL" );
255	PORT_MAP(_component,src ,"out_IFETCH_"+toString(i)+"_"+toString(j)+"_ACK" ,
256	dest,"out_IFETCH_"+toString(i)+"_"+toString(j)+"_ACK" );
257	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION",
258	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION");
259	if (_param->_have_port_context_id)
260	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" ,
261	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" );
262	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS" ,
263	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
264	// PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" ,
265	// dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" );
266	// if (_param->_have_port_inst_ifetch_ptr)
267	// PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INST_IFETCH_PTR" ,
268	// dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INST_IFETCH_PTR" );
269	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_STATE" ,
270	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_STATE" );
271	if (_param->_have_port_depth)
272	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID",
273	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID");
274	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_EXCEPTION" ,
275	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_EXCEPTION" );
276	}
277
278	}
279
280	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
281	{
282	dest = _name+"_decod_queue";
283
284	#ifdef POSITION
285	_component->interface_map (src ,"decod_" +toString(i),
286	dest,"decod_in_"+toString(i));
287	#endif
288
289	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_VAL" ,
290	dest, "in_DECOD_IN_"+toString(i)+"_VAL" );
291	COMPONENT_MAP(_component,src , "in_DECOD_" +toString(i)+"_ACK" ,
292	dest,"out_DECOD_IN_"+toString(i)+"_ACK" );
293	if (_param->_have_port_context_id)
294	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_CONTEXT_ID" ,
295	dest, "in_DECOD_IN_"+toString(i)+"_CONTEXT_ID" );
296	if (_param->_have_port_depth)
297	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_DEPTH" ,
298	dest, "in_DECOD_IN_"+toString(i)+"_DEPTH" );
299	#ifdef STATISTICS
300	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_INSTRUCTION" ,
301	dest, "in_DECOD_IN_"+toString(i)+"_INSTRUCTION" );
302	#endif
303	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_TYPE" ,
304	dest, "in_DECOD_IN_"+toString(i)+"_TYPE" );
305	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_OPERATION" ,
306	dest, "in_DECOD_IN_"+toString(i)+"_OPERATION" );
307	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NO_EXECUTE" ,
308	dest, "in_DECOD_IN_"+toString(i)+"_NO_EXECUTE" );
309	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_IS_DELAY_SLOT",
310	dest, "in_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT");
311	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_SAVE_RAT" ,
312	dest, "in_DECOD_IN_"+toString(i)+"_SAVE_RAT" );
313	#ifdef DEBUG
314	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_ADDRESS" ,
315	dest, "in_DECOD_IN_"+toString(i)+"_ADDRESS" );
316	#endif
317	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_ADDRESS_NEXT" ,
318	dest, "in_DECOD_IN_"+toString(i)+"_ADDRESS_NEXT" );
319	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_HAS_IMMEDIAT" ,
320	dest, "in_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT" );
321	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_IMMEDIAT" ,
322	dest, "in_DECOD_IN_"+toString(i)+"_IMMEDIAT" );
323	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_READ_RA" ,
324	dest, "in_DECOD_IN_"+toString(i)+"_READ_RA" );
325	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RA" ,
326	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RA" );
327	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_READ_RB" ,
328	dest, "in_DECOD_IN_"+toString(i)+"_READ_RB" );
329	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RB" ,
330	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RB" );
331	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_READ_RC" ,
332	dest, "in_DECOD_IN_"+toString(i)+"_READ_RC" );
333	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RC" ,
334	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RC" );
335	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_WRITE_RD" ,
336	dest, "in_DECOD_IN_"+toString(i)+"_WRITE_RD" );
337	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RD" ,
338	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RD" );
339	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_WRITE_RE" ,
340	dest, "in_DECOD_IN_"+toString(i)+"_WRITE_RE" );
341	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RE" ,
342	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RE" );
343	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_EXCEPTION_USE",
344	dest, "in_DECOD_IN_"+toString(i)+"_EXCEPTION_USE");
345	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_EXCEPTION" ,
346	dest, "in_DECOD_IN_"+toString(i)+"_EXCEPTION" );
347	}
348
349	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
350	{
351	dest = _name;
352
353	#ifdef POSITION
354	_component->interface_map (src ,"predict"+toString(i),
355	dest,"predict"+toString(i));
356	#endif
357
358	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_VAL" ,
359	dest,"out_PREDICT_"+toString(i)+"_VAL" );
360	PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_ACK" ,
361	dest, "in_PREDICT_"+toString(i)+"_ACK" );
362	if (_param->_have_port_context_id)
363	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_CONTEXT_ID" ,
364	dest,"out_PREDICT_"+toString(i)+"_CONTEXT_ID" );
365	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR" ,
366	dest,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR" );
367	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_STATE" ,
368	dest,"out_PREDICT_"+toString(i)+"_BRANCH_STATE" );
369	if (_param->_have_port_depth)
370	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID",
371	dest,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID");
372	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION" ,
373	dest,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION" );
374	// PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_STACK_WRITE" ,
375	// dest,"out_PREDICT_"+toString(i)+"_BRANCH_STACK_WRITE" );
376	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION" ,
377	dest,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION" );
378	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC" ,
379	dest,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC" );
380	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST" ,
381	dest,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST" );
382	PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_CAN_CONTINUE" ,
383	dest, "in_PREDICT_"+toString(i)+"_CAN_CONTINUE" );
384	}
385
386	for (uint32_t i=0; i<_param->_nb_context; i++)
387	{
388	dest = _name;
389
390	#ifdef POSITION
391	_component->interface_map (src ,"context_"+toString(i),
392	dest,"context_"+toString(i));
393	#endif
394
395	PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_DECOD_ENABLE",
396	dest, "in_CONTEXT_"+toString(i)+"_DECOD_ENABLE");
397	PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_DEPTH_VAL" ,
398	dest, "in_CONTEXT_"+toString(i)+"_DEPTH_VAL" );
399	if (_param->_have_port_depth)
400	PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_DEPTH" ,
401	dest, "in_CONTEXT_"+toString(i)+"_DEPTH" );
402	}
403
404	{
405	dest = _name;
406
407	#ifdef POSITION
408	_component->interface_map (src ,"context_event",
409	dest,"context_event");
410	#endif
411
412	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_VAL" ,
413	dest,"out_CONTEXT_EVENT_VAL" );
414	PORT_MAP(_component,src , "in_CONTEXT_EVENT_ACK" ,
415	dest, "in_CONTEXT_EVENT_ACK" );
416	if (_param->_have_port_context_id)
417	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_CONTEXT_ID" ,
418	dest,"out_CONTEXT_EVENT_CONTEXT_ID" );
419	if (_param->_have_port_depth)
420	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_DEPTH" ,
421	dest,"out_CONTEXT_EVENT_DEPTH" );
422	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_TYPE" ,
423	dest,"out_CONTEXT_EVENT_TYPE" );
424	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_IS_DELAY_SLOT",
425	dest,"out_CONTEXT_EVENT_IS_DELAY_SLOT");
426	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_ADDRESS" ,
427	dest,"out_CONTEXT_EVENT_ADDRESS" );
428	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_ADDRESS_EPCR" ,
429	dest,"out_CONTEXT_EVENT_ADDRESS_EPCR" );
430
431	}
432	}
433
434	// ===================================================================
435	// =====[ decod_queue ]===============================================
436	// ===================================================================
437	{
438	src = _name+"_decod_queue";
439	log_printf(INFO,Decod_unit,FUNCTION,_("Instance : %s"),src.c_str());
440
441	{
442	dest = _name;
443	#ifdef POSITION
444	_component->interface_map (src ,"",
445	dest,"");
446	#endif
447	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
448	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
449	}
450
451	// in_DECOD_IN_VAL - component decod
452	//out_DECOD_IN_ACK - component decod
453	// in_DECOD_IN_CONTEXT_ID - component decod
454	// in_DECOD_IN_DEPTH - component decod
455	// in_DECOD_IN_TYPE - component decod
456	// in_DECOD_IN_OPERATION - component decod
457	// in_DECOD_IN_NO_EXECUTE - component decod
458	// in_DECOD_IN_IS_DELAY_SLOT - component decod
459	// in_DECOD_IN_SAVE_RAT - component decod
460	// in_DECOD_IN_ADDRESS - component decod
461	// in_DECOD_IN_ADDRESS_NEXT - component decod
462	// in_DECOD_IN_HAS_IMMEDIAT - component decod
463	// in_DECOD_IN_IMMEDIAT - component decod
464	// in_DECOD_IN_READ_RA - component decod
465	// in_DECOD_IN_NUM_REG_RA - component decod
466	// in_DECOD_IN_READ_RB - component decod
467	// in_DECOD_IN_NUM_REG_RB - component decod
468	// in_DECOD_IN_READ_RC - component decod
469	// in_DECOD_IN_NUM_REG_RC - component decod
470	// in_DECOD_IN_WRITE_RD - component decod
471	// in_DECOD_IN_NUM_REG_RD - component decod
472	// in_DECOD_IN_WRITE_RE - component decod
473	// in_DECOD_IN_NUM_REG_RE - component decod
474	// in_DECOD_IN_EXCEPTION_USE - component decod
475	// in_DECOD_IN_EXCEPTION - component decod
476
477	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
478	{
479	dest = _name;
480
481	#ifdef POSITION
482	_component->interface_map (src ,"decod_out_"+toString(i),
483	dest,"decod" +toString(i));
484	#endif
485
486	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_VAL" ,
487	dest,"out_DECOD_" +toString(i)+"_VAL" );
488	PORT_MAP(_component,src , "in_DECOD_OUT_"+toString(i)+"_ACK" ,
489	dest, "in_DECOD_" +toString(i)+"_ACK" );
490	if (_param->_have_port_context_id)
491	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_CONTEXT_ID" ,
492	dest,"out_DECOD_" +toString(i)+"_CONTEXT_ID" );
493	if (_param->_have_port_depth)
494	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_DEPTH" ,
495	dest,"out_DECOD_" +toString(i)+"_DEPTH" );
496	#ifdef STATISTICS
497	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_INSTRUCTION" ,
498	dest,"out_DECOD_" +toString(i)+"_INSTRUCTION" );
499	#endif
500	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_TYPE" ,
501	dest,"out_DECOD_" +toString(i)+"_TYPE" );
502	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_OPERATION" ,
503	dest,"out_DECOD_" +toString(i)+"_OPERATION" );
504	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NO_EXECUTE" ,
505	dest,"out_DECOD_" +toString(i)+"_NO_EXECUTE" );
506	// PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_HAVE_EVENT" ,
507	// dest,"out_DECOD_" +toString(i)+"_HAVE_EVENT" );
508	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_LAST_EVENT" ,
509	dest,"out_DECOD_" +toString(i)+"_LAST_EVENT" );
510	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT",
511	dest,"out_DECOD_" +toString(i)+"_IS_DELAY_SLOT");
512	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_SAVE_RAT" ,
513	dest,"out_DECOD_" +toString(i)+"_SAVE_RAT" );
514	#ifdef DEBUG
515	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_ADDRESS" ,
516	dest,"out_DECOD_" +toString(i)+"_ADDRESS" );
517	#endif
518	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_ADDRESS_NEXT" ,
519	dest,"out_DECOD_" +toString(i)+"_ADDRESS_NEXT" );
520	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT" ,
521	dest,"out_DECOD_" +toString(i)+"_HAS_IMMEDIAT" );
522	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_IMMEDIAT" ,
523	dest,"out_DECOD_" +toString(i)+"_IMMEDIAT" );
524	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RA" ,
525	dest,"out_DECOD_" +toString(i)+"_READ_RA" );
526	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RA" ,
527	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RA" );
528	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RB" ,
529	dest,"out_DECOD_" +toString(i)+"_READ_RB" );
530	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RB" ,
531	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RB" );
532	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RC" ,
533	dest,"out_DECOD_" +toString(i)+"_READ_RC" );
534	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RC" ,
535	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RC" );
536	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_WRITE_RD" ,
537	dest,"out_DECOD_" +toString(i)+"_WRITE_RD" );
538	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RD" ,
539	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RD" );
540	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_WRITE_RE" ,
541	dest,"out_DECOD_" +toString(i)+"_WRITE_RE" );
542	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RE" ,
543	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RE" );
544	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE",
545	dest,"out_DECOD_" +toString(i)+"_EXCEPTION_USE");
546	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION" ,
547	dest,"out_DECOD_" +toString(i)+"_EXCEPTION" );
548	}
549
550	for (uint32_t i=0; i<_param->_nb_context; i++)
551	{
552	dest = _name;
553
554	#ifdef POSITION
555	_component->interface_map (src ,"depth"+toString(i),
556	dest,"depth"+toString(i));
557	#endif
558
559	if (_param->_have_port_depth)
560	{
561	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_MIN",
562	dest, "in_DEPTH_"+toString(i)+"_MIN");
563	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_MAX",
564	dest, "in_DEPTH_"+toString(i)+"_MAX");
565	}
566	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_FULL",
567	dest, "in_DEPTH_"+toString(i)+"_FULL");
568	}
569
570	for (uint32_t i=0; i<_param->_nb_context; i++)
571	{
572	dest = _name;
573
574	#ifdef POSITION
575	_component->interface_map (src ,"nb_inst"+toString(i),
576	dest,"nb_inst"+toString(i));
577	#endif
578
579	PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+ "_ALL",
580	dest,"out_NB_INST_"+toString(i)+"_DECOD_ALL");
581	}
582
583
584
585	for (uint32_t i=0; i<_param->_nb_context; i++)
586	{
587	dest = _name;
588
589	#ifdef POSITION
590	_component->interface_map (src ,"context_"+toString(i),
591	dest,"context_"+toString(i));
592	#endif
593
594	PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_EVENT" ,
595	dest, "in_CONTEXT_"+toString(i)+"_EVENT" );
596
597	}
598	}
599	// ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
600	#if DEBUG_Decod_unit == true
601	_component->test_map();
602	#endif
603
604	#ifdef POSITION
605	if (usage_is_set(_usage,USE_POSITION))
606	_component->generate_file();
607	#endif
608
609	log_end(Decod_unit,FUNCTION);
610	};
611
612	}; // end namespace decod_unit
613	}; // end namespace front_end
614	}; // end namespace multi_front_end
615	}; // end namespace core
616
617	}; // end namespace behavioural
618	}; // end namespace morpheo

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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp

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