1 | #ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_address_management_Address_management_h |
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2 | #define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_address_management_Address_management_h |
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3 | |
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4 | /* |
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5 | * $Id: Address_management.h 101 2009-01-15 17:19:08Z rosiere $ |
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6 | * |
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7 | * [ Description ] |
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8 | * |
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9 | */ |
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10 | |
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11 | #ifdef SYSTEMC |
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12 | #include "systemc.h" |
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13 | #endif |
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14 | |
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15 | #include <iostream> |
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16 | #include "Common/include/ToString.h" |
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17 | #include "Common/include/Debug.h" |
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18 | #include "Behavioural/include/Types.h" |
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19 | |
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20 | #include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h" |
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21 | #ifdef STATISTICS |
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22 | #include "Behavioural/include/Stat.h" |
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23 | #endif |
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24 | #include "Behavioural/include/Component.h" |
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25 | #ifdef VHDL |
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26 | #include "Behavioural/include/Vhdl.h" |
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27 | #endif |
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28 | #include "Behavioural/include/Usage.h" |
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29 | |
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30 | namespace morpheo { |
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31 | namespace behavioural { |
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32 | namespace core { |
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33 | namespace multi_front_end { |
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34 | namespace front_end { |
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35 | namespace ifetch_unit { |
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36 | namespace address_management { |
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37 | |
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38 | |
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39 | class Address_management |
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40 | #if SYSTEMC |
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41 | : public sc_module |
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42 | #endif |
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43 | { |
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44 | // -----[ fields ]---------------------------------------------------- |
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45 | // Parameters |
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46 | protected : const std::string _name; |
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47 | protected : const Parameters * _param; |
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48 | private : const Tusage_t _usage; |
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49 | |
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50 | #ifdef STATISTICS |
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51 | public : Stat * _stat; |
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52 | public : counter_t * _stat_nb_transaction_address; |
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53 | public : counter_t * _stat_nb_transaction_predict; |
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54 | public : counter_t * _stat_nb_transaction_event ; |
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55 | public : counter_t * _stat_sum_packet_size ; |
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56 | #endif |
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57 | |
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58 | public : Component * _component; |
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59 | private : Interfaces * _interfaces; |
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60 | |
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61 | #ifdef SYSTEMC |
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62 | // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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63 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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64 | public : SC_CLOCK * in_CLOCK ; |
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65 | public : SC_IN (Tcontrol_t) * in_NRESET ; |
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66 | |
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67 | // ~~~~~[ Interface : "address" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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68 | public : SC_OUT(Tcontrol_t ) * out_ADDRESS_VAL ; |
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69 | public : SC_IN (Tcontrol_t ) * in_ADDRESS_ACK ; //icache_req_ack and ifetch_queue_ack |
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70 | public : SC_OUT(Tgeneral_address_t ) * out_ADDRESS_INSTRUCTION_ADDRESS ; |
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71 | public : SC_OUT(Tcontrol_t ) ** out_ADDRESS_INSTRUCTION_ENABLE ; //[nb_instruction] |
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72 | public : SC_OUT(Tinst_ifetch_ptr_t ) * out_ADDRESS_INST_IFETCH_PTR ; |
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73 | public : SC_OUT(Tbranch_state_t ) * out_ADDRESS_BRANCH_STATE ; |
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74 | public : SC_OUT(Tprediction_ptr_t ) * out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ; |
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75 | |
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76 | // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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77 | public : SC_OUT(Tcontrol_t ) * out_PREDICT_VAL ; |
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78 | public : SC_IN (Tcontrol_t ) * in_PREDICT_ACK ; |
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79 | public : SC_OUT(Tgeneral_address_t ) * out_PREDICT_PC_PREVIOUS ; |
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80 | public : SC_OUT(Tgeneral_address_t ) * out_PREDICT_PC_CURRENT ; |
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81 | public : SC_OUT(Tcontrol_t ) * out_PREDICT_PC_CURRENT_IS_DS_TAKE ; |
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82 | public : SC_IN (Tgeneral_address_t ) * in_PREDICT_PC_NEXT ; |
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83 | public : SC_IN (Tcontrol_t ) * in_PREDICT_PC_NEXT_IS_DS_TAKE ; |
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84 | public : SC_IN (Tcontrol_t ) ** in_PREDICT_INSTRUCTION_ENABLE ; //[nb_instruction] |
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85 | //public : SC_IN (Tcontrol_t ) * in_PREDICT_BRANCH_IS_CURRENT ; |
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86 | public : SC_IN (Tbranch_state_t ) * in_PREDICT_BRANCH_STATE ; |
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87 | public : SC_IN (Tprediction_ptr_t ) * in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ; |
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88 | public : SC_IN (Tinst_ifetch_ptr_t ) * in_PREDICT_INST_IFETCH_PTR ; |
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89 | |
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90 | // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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91 | public : SC_IN (Tcontrol_t ) * in_EVENT_VAL ; |
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92 | public : SC_OUT(Tcontrol_t ) * out_EVENT_ACK ; |
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93 | public : SC_IN (Tgeneral_address_t) * in_EVENT_ADDRESS ; |
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94 | public : SC_IN (Tgeneral_address_t) * in_EVENT_ADDRESS_NEXT ; |
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95 | public : SC_IN (Tcontrol_t ) * in_EVENT_ADDRESS_NEXT_VAL ; |
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96 | public : SC_IN (Tcontrol_t ) * in_EVENT_IS_DS_TAKE ; |
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97 | |
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98 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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99 | |
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100 | // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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101 | private : Tcontrol_t reg_PC_ACCESS_VAL ; |
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102 | private : Tgeneral_address_t reg_PC_ACCESS ; |
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103 | private : Tcontrol_t reg_PC_ACCESS_IS_DS_TAKE ; |
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104 | private : Tcontrol_t * reg_PC_ACCESS_INSTRUCTION_ENABLE ; //[nb_instruction] |
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105 | private : Tinst_ifetch_ptr_t reg_PC_ACCESS_INST_IFETCH_PTR ; |
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106 | private : Tbranch_state_t reg_PC_ACCESS_BRANCH_STATE ; |
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107 | private : Tprediction_ptr_t reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID ; |
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108 | |
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109 | private : Tcontrol_t reg_PC_CURRENT_VAL ; |
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110 | private : Tgeneral_address_t reg_PC_CURRENT ; |
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111 | private : Tcontrol_t reg_PC_CURRENT_IS_DS_TAKE ; |
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112 | private : Tcontrol_t * reg_PC_CURRENT_INSTRUCTION_ENABLE ; //[nb_instruction] |
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113 | private : Tinst_ifetch_ptr_t reg_PC_CURRENT_INST_IFETCH_PTR ; |
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114 | private : Tbranch_state_t reg_PC_CURRENT_BRANCH_STATE ; |
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115 | private : Tprediction_ptr_t reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID ; |
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116 | |
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117 | private : Tcontrol_t reg_PC_NEXT_VAL ; |
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118 | private : Tgeneral_address_t reg_PC_NEXT ; |
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119 | private : Tcontrol_t reg_PC_NEXT_IS_DS_TAKE ; |
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120 | private : Tcontrol_t * reg_PC_NEXT_INSTRUCTION_ENABLE ; //[nb_instruction] |
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121 | private : Tinst_ifetch_ptr_t reg_PC_NEXT_INST_IFETCH_PTR ; |
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122 | private : Tbranch_state_t reg_PC_NEXT_BRANCH_STATE ; |
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123 | private : Tprediction_ptr_t reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID ; |
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124 | |
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125 | private : Tcontrol_t reg_PC_NEXT_NEXT_VAL ; |
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126 | private : Tgeneral_address_t reg_PC_NEXT_NEXT ; |
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127 | private : Tcontrol_t reg_PC_NEXT_NEXT_IS_DS_TAKE ; |
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128 | //private : Tcontrol_t * reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE ; //[nb_instruction] |
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129 | //private : Tinst_ifetch_ptr_t reg_PC_NEXT_NEXT_INST_IFETCH_PTR ; |
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130 | //private : Tbranch_state_t reg_PC_NEXT_NEXT_BRANCH_STATE ; |
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131 | //private : Tprediction_ptr_t reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID; |
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132 | |
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133 | // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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134 | private : Tcontrol_t internal_ADDRESS_VAL; |
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135 | private : Tcontrol_t internal_PREDICT_VAL; |
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136 | private : Tcontrol_t internal_EVENT_ACK ; |
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137 | #endif |
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138 | |
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139 | // -----[ Methods ]--------------------------------------------------- |
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140 | |
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141 | #ifdef SYSTEMC |
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142 | SC_HAS_PROCESS (Address_management); |
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143 | #endif |
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144 | public : Address_management |
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145 | ( |
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146 | #ifdef SYSTEMC |
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147 | sc_module_name name, |
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148 | #else |
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149 | std::string name, |
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150 | #endif |
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151 | #ifdef STATISTICS |
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152 | morpheo::behavioural::Parameters_Statistics * param_statistics, |
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153 | #endif |
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154 | Parameters * param, |
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155 | morpheo::behavioural::Tusage_t usage |
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156 | ); |
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157 | public : ~Address_management (void); |
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158 | |
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159 | private : void allocation ( |
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160 | #ifdef STATISTICS |
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161 | morpheo::behavioural::Parameters_Statistics * param_statistics |
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162 | #else |
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163 | void |
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164 | #endif |
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165 | ); |
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166 | private : void deallocation (void); |
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167 | |
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168 | #ifdef SYSTEMC |
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169 | public : void transition (void); |
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170 | public : void genMoore (void); |
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171 | #endif |
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172 | |
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173 | #if VHDL |
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174 | public : void vhdl (void); |
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175 | private : void vhdl_declaration (Vhdl * & vhdl); |
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176 | private : void vhdl_body (Vhdl * & vhdl); |
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177 | #endif |
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178 | |
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179 | #ifdef STATISTICS |
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180 | public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); |
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181 | public : void statistics_deallocation (void); |
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182 | #endif |
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183 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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184 | private : void end_cycle (void); |
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185 | #endif |
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186 | }; |
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187 | |
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188 | }; // end namespace address_management |
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189 | }; // end namespace ifetch_unit |
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190 | }; // end namespace front_end |
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191 | }; // end namespace multi_front_end |
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192 | }; // end namespace core |
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193 | |
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194 | }; // end namespace behavioural |
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195 | }; // end namespace morpheo |
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196 | |
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197 | #endif |
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