[78] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Address_management_genMoore.cpp 132 2009-07-11 16:39:35Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace ifetch_unit { |
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| 17 | namespace address_management { |
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| 18 | |
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| 19 | |
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| 20 | #undef FUNCTION |
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| 21 | #define FUNCTION "Address_management::genMoore" |
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| 22 | void Address_management::genMoore (void) |
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| 23 | { |
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[132] | 24 | log_begin(Address_management,FUNCTION); |
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| 25 | log_function(Address_management,FUNCTION,_name.c_str()); |
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[78] | 26 | |
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[123] | 27 | if (PORT_READ(in_NRESET)) |
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| 28 | { |
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[78] | 29 | // ========================================= |
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| 30 | // ===== ADDRESS =========================== |
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| 31 | // ========================================= |
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| 32 | |
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[101] | 33 | internal_ADDRESS_VAL = reg_PC_ACCESS_VAL; |
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[78] | 34 | |
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[107] | 35 | // Align pc on instruction packet address. |
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| 36 | PORT_WRITE(out_ADDRESS_INSTRUCTION_ADDRESS ,reg_PC_ACCESS - (reg_PC_ACCESS%_param->_nb_instruction)); |
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[88] | 37 | if (_param->_have_port_inst_ifetch_ptr) |
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[101] | 38 | PORT_WRITE(out_ADDRESS_INST_IFETCH_PTR ,reg_PC_ACCESS_INST_IFETCH_PTR ); |
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| 39 | PORT_WRITE(out_ADDRESS_BRANCH_STATE ,reg_PC_ACCESS_BRANCH_STATE ); |
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[88] | 40 | if (_param->_have_port_depth) |
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[101] | 41 | PORT_WRITE(out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID); |
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[78] | 42 | |
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| 43 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
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[101] | 44 | PORT_WRITE(out_ADDRESS_INSTRUCTION_ENABLE [i], reg_PC_ACCESS_INSTRUCTION_ENABLE[i]); |
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[78] | 45 | |
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| 46 | // ========================================= |
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| 47 | // ===== PREDICT =========================== |
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| 48 | // ========================================= |
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| 49 | |
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[84] | 50 | internal_PREDICT_VAL = not reg_PC_NEXT_NEXT_VAL; |
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[78] | 51 | |
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[84] | 52 | PORT_WRITE(out_PREDICT_PC_PREVIOUS ,reg_PC_CURRENT ); |
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| 53 | PORT_WRITE(out_PREDICT_PC_CURRENT ,reg_PC_NEXT ); |
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| 54 | PORT_WRITE(out_PREDICT_PC_CURRENT_IS_DS_TAKE,reg_PC_NEXT_IS_DS_TAKE); |
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[132] | 55 | |
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[123] | 56 | } |
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| 57 | else |
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| 58 | { |
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| 59 | internal_ADDRESS_VAL = 0; |
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| 60 | internal_PREDICT_VAL = 0; |
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| 61 | } |
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| 62 | |
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[132] | 63 | log_printf(TRACE,Address_management,FUNCTION," * ADDRESS_VAL : %d",internal_ADDRESS_VAL); |
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| 64 | log_printf(TRACE,Address_management,FUNCTION," * PREDICT_VAL : %d",internal_PREDICT_VAL); |
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| 65 | |
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[123] | 66 | PORT_WRITE(out_ADDRESS_VAL,internal_ADDRESS_VAL); |
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| 67 | PORT_WRITE(out_PREDICT_VAL,internal_PREDICT_VAL); |
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| 68 | |
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[132] | 69 | log_end(Address_management,FUNCTION); |
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[78] | 70 | }; |
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| 71 | |
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| 72 | }; // end namespace address_management |
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| 73 | }; // end namespace ifetch_unit |
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| 74 | }; // end namespace front_end |
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| 75 | }; // end namespace multi_front_end |
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| 76 | }; // end namespace core |
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| 77 | |
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| 78 | }; // end namespace behavioural |
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| 79 | }; // end namespace morpheo |
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| 80 | #endif |
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