source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp @ 107

Last change on this file since 107 was 107, checked in by rosiere, 15 years ago

1) Fix test in Direction_Glue for Conditionnal Branch
2) Fix Instruction Address Compute

  • Property svn:keywords set to Id
File size: 2.3 KB
Line 
1#ifdef SYSTEMC
2/*
3 * $Id: Address_management_genMoore.cpp 107 2009-02-10 23:03:25Z rosiere $
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace core {
14namespace multi_front_end {
15namespace front_end {
16namespace ifetch_unit {
17namespace address_management {
18
19
20#undef  FUNCTION
21#define FUNCTION "Address_management::genMoore"
22  void Address_management::genMoore (void)
23  {
24    log_printf(FUNC,Address_management,FUNCTION,"Begin");
25
26    // =========================================
27    // ===== ADDRESS ===========================
28    // =========================================
29
30    internal_ADDRESS_VAL = reg_PC_ACCESS_VAL;
31
32    PORT_WRITE(out_ADDRESS_VAL                        ,internal_ADDRESS_VAL                     );
33    // Align pc on instruction packet address.
34    PORT_WRITE(out_ADDRESS_INSTRUCTION_ADDRESS        ,reg_PC_ACCESS - (reg_PC_ACCESS%_param->_nb_instruction));
35    if (_param->_have_port_inst_ifetch_ptr)
36    PORT_WRITE(out_ADDRESS_INST_IFETCH_PTR            ,reg_PC_ACCESS_INST_IFETCH_PTR            );
37    PORT_WRITE(out_ADDRESS_BRANCH_STATE               ,reg_PC_ACCESS_BRANCH_STATE               );
38    if (_param->_have_port_depth)
39    PORT_WRITE(out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID);
40
41    for (uint32_t i=0; i<_param->_nb_instruction; i++)
42      PORT_WRITE(out_ADDRESS_INSTRUCTION_ENABLE [i], reg_PC_ACCESS_INSTRUCTION_ENABLE[i]);
43
44    // =========================================
45    // ===== PREDICT ===========================
46    // =========================================
47
48    internal_PREDICT_VAL = not reg_PC_NEXT_NEXT_VAL;
49
50    PORT_WRITE(out_PREDICT_VAL                  ,internal_PREDICT_VAL);
51    PORT_WRITE(out_PREDICT_PC_PREVIOUS          ,reg_PC_CURRENT        );
52    PORT_WRITE(out_PREDICT_PC_CURRENT           ,reg_PC_NEXT           );
53    PORT_WRITE(out_PREDICT_PC_CURRENT_IS_DS_TAKE,reg_PC_NEXT_IS_DS_TAKE);
54   
55    log_printf(FUNC,Address_management,FUNCTION,"End");
56  };
57
58}; // end namespace address_management
59}; // end namespace ifetch_unit
60}; // end namespace front_end
61}; // end namespace multi_front_end
62}; // end namespace core
63
64}; // end namespace behavioural
65}; // end namespace morpheo             
66#endif
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