[136] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Ifetch_queue_function_no_assoc_genMoore.cpp 136 2009-10-20 18:52:15Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace ifetch_unit { |
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| 17 | namespace ifetch_queue { |
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| 18 | |
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| 19 | #undef FUNCTION |
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| 20 | #define FUNCTION "Ifetch_queue::function_no_assoc_genMoore" |
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| 21 | void Ifetch_queue::function_no_assoc_genMoore (void) |
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| 22 | { |
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| 23 | log_begin(Ifetch_queue,FUNCTION); |
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| 24 | log_function(Ifetch_queue,FUNCTION,_name.c_str()); |
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| 25 | |
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| 26 | if (PORT_READ(in_NRESET)) |
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| 27 | { |
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| 28 | // ========================================================== |
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| 29 | // =====[ ADDRESS ]========================================== |
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| 30 | // ========================================================== |
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| 31 | { |
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| 32 | internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY); |
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| 33 | |
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| 34 | log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS_ACK : %d",internal_ADDRESS_ACK); |
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| 35 | |
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| 36 | if (_param->_have_port_ifetch_queue_ptr) |
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| 37 | PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE); |
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| 38 | } |
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| 39 | |
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| 40 | // ========================================================== |
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| 41 | // =====[ DECOD ]============================================ |
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| 42 | // ========================================================== |
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| 43 | { |
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| 44 | bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP); |
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| 45 | |
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| 46 | Tgeneral_address_t address = _queue[reg_PTR_READ]->_address; |
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| 47 | Tinst_ifetch_ptr_t inst_ifetch_ptr = _queue[reg_PTR_READ]->_inst_ifetch_ptr; |
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| 48 | Tbranch_state_t branch_state = _queue[reg_PTR_READ]->_branch_state; |
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| 49 | Tprediction_ptr_t branch_update_prediction_id = _queue[reg_PTR_READ]->_branch_update_prediction_id; |
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| 50 | Texception_t exception = _queue[reg_PTR_READ]->_exception; |
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| 51 | |
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| 52 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
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| 53 | { |
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| 54 | internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i]; |
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| 55 | |
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| 56 | log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD_VAL [%d] : %d",i,internal_DECOD_VAL [i]); |
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| 57 | |
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| 58 | PORT_WRITE(out_DECOD_INSTRUCTION [i],_queue[reg_PTR_READ]->_instruction [i]); |
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| 59 | PORT_WRITE(out_DECOD_ADDRESS [i],address+i); |
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| 60 | if (inst_ifetch_ptr == i) |
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| 61 | { |
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| 62 | PORT_WRITE(out_DECOD_BRANCH_STATE [i],branch_state); |
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| 63 | } |
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| 64 | else |
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| 65 | { |
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| 66 | PORT_WRITE(out_DECOD_BRANCH_STATE [i], BRANCH_STATE_NONE); |
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| 67 | } |
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| 68 | if (_param->_have_port_depth) |
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| 69 | PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID[i],branch_update_prediction_id); |
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| 70 | PORT_WRITE(out_DECOD_EXCEPTION [i],exception); // all is same |
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| 71 | } |
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| 72 | |
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| 73 | } |
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| 74 | } |
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| 75 | else |
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| 76 | { |
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| 77 | // Reset |
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| 78 | internal_ADDRESS_ACK = 0; |
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| 79 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
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| 80 | internal_DECOD_VAL [i] = 0; |
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| 81 | |
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| 82 | } |
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| 83 | |
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| 84 | // Write Output |
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| 85 | PORT_WRITE(out_ADDRESS_ACK , internal_ADDRESS_ACK); |
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| 86 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
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| 87 | PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]); |
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| 88 | |
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| 89 | log_end(Ifetch_queue,FUNCTION); |
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| 90 | }; |
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| 91 | |
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| 92 | }; // end namespace ifetch_queue |
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| 93 | }; // end namespace ifetch_unit |
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| 94 | }; // end namespace front_end |
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| 95 | }; // end namespace multi_front_end |
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| 96 | }; // end namespace core |
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| 97 | }; // end namespace behavioural |
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| 98 | }; // end namespace morpheo |
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| 99 | #endif |
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