source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_icache_req.cpp @ 123

Last change on this file since 123 was 123, checked in by rosiere, 15 years ago

1) Fix performance
2) add auto generation to SPECINT2000
3) add reset in genMoore and genMealy

  • Property svn:keywords set to Id
File size: 1.8 KB
Line 
1#ifdef SYSTEMC
2/*
3 * $Id: Ifetch_unit_Glue_genMealy_icache_req.cpp 123 2009-06-08 20:43:30Z rosiere $
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace core {
14namespace multi_front_end {
15namespace front_end {
16namespace ifetch_unit {
17namespace ifetch_unit_glue {
18
19
20#undef  FUNCTION
21#define FUNCTION "Ifetch_unit_Glue::genMealy_icache_req"
22  void Ifetch_unit_Glue::genMealy_icache_req (void)
23  {
24    log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin");
25
26    if (PORT_READ(in_NRESET))
27      {
28    Tcontrol_t address_val = PORT_READ(in_ICACHE_REQ_ADDRESS_VAL);
29    Tcontrol_t queue_ack   = PORT_READ(in_ICACHE_REQ_QUEUE_ACK  );
30    Tcontrol_t ack         = PORT_READ(in_ICACHE_REQ_ACK        );
31
32    PORT_WRITE(out_ICACHE_REQ_VAL        , address_val and queue_ack); // have a address valid and queue have a slot empty
33    PORT_WRITE(out_ICACHE_REQ_ADDRESS_ACK, ack         and queue_ack); // cache can accept a new transaction and queue have a slot empty
34    PORT_WRITE(out_ICACHE_REQ_QUEUE_VAL  , address_val and ack); // cache can accept a new transaction and the address is valid
35
36    Taddress_t address     = PORT_READ(in_ICACHE_REQ_ADDRESS_ADDRESS);
37    PORT_WRITE(out_ICACHE_REQ_ADDRESS      ,address);
38    PORT_WRITE(out_ICACHE_REQ_QUEUE_ADDRESS,address);
39      }
40    else
41      {
42        // RESET
43        PORT_WRITE(out_ICACHE_REQ_VAL        , 0);
44        PORT_WRITE(out_ICACHE_REQ_ADDRESS_ACK, 0);
45        PORT_WRITE(out_ICACHE_REQ_QUEUE_VAL  , 0);
46      }
47   
48    log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End");
49  };
50
51}; // end namespace ifetch_unit_glue
52}; // end namespace ifetch_unit
53}; // end namespace front_end
54}; // end namespace multi_front_end
55}; // end namespace core
56
57}; // end namespace behavioural
58}; // end namespace morpheo             
59#endif
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