[78] | 1 | /* |
---|
| 2 | * $Id: Ifetch_unit_allocation.cpp 136 2009-10-20 18:52:15Z rosiere $ |
---|
| 3 | * |
---|
| 4 | * [ Description ] |
---|
| 5 | * |
---|
| 6 | */ |
---|
| 7 | |
---|
| 8 | #include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" |
---|
| 9 | #include "Behavioural/include/Allocation.h" |
---|
| 10 | |
---|
| 11 | namespace morpheo { |
---|
| 12 | namespace behavioural { |
---|
| 13 | namespace core { |
---|
| 14 | namespace multi_front_end { |
---|
| 15 | namespace front_end { |
---|
| 16 | namespace ifetch_unit { |
---|
| 17 | |
---|
| 18 | |
---|
| 19 | |
---|
| 20 | #undef FUNCTION |
---|
| 21 | #define FUNCTION "Ifetch_unit::allocation" |
---|
| 22 | void Ifetch_unit::allocation ( |
---|
| 23 | #ifdef STATISTICS |
---|
| 24 | morpheo::behavioural::Parameters_Statistics * param_statistics |
---|
| 25 | #else |
---|
| 26 | void |
---|
| 27 | #endif |
---|
| 28 | ) |
---|
| 29 | { |
---|
| 30 | log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); |
---|
| 31 | |
---|
| 32 | _component = new Component (_usage); |
---|
| 33 | |
---|
| 34 | Entity * entity = _component->set_entity (_name |
---|
| 35 | ,"Ifetch_unit" |
---|
| 36 | #ifdef POSITION |
---|
| 37 | ,COMBINATORY |
---|
| 38 | #endif |
---|
| 39 | ); |
---|
| 40 | |
---|
| 41 | _interfaces = entity->set_interfaces(); |
---|
| 42 | |
---|
| 43 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
| 44 | { |
---|
| 45 | Interface * interface = _interfaces->set_interface("" |
---|
| 46 | #ifdef POSITION |
---|
| 47 | ,IN |
---|
| 48 | ,SOUTH, |
---|
[112] | 49 | _("Generalist interface") |
---|
[78] | 50 | #endif |
---|
| 51 | ); |
---|
| 52 | |
---|
| 53 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
---|
| 54 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
---|
| 55 | } |
---|
| 56 | |
---|
| 57 | // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
| 58 | { |
---|
[112] | 59 | ALLOC0_INTERFACE_BEGIN("icache_req",OUT, WEST, _("Instruction cache request.")); |
---|
[78] | 60 | |
---|
[112] | 61 | ALLOC0_VALACK_OUT(out_ICACHE_REQ_VAL ,VAL); |
---|
| 62 | ALLOC0_VALACK_IN ( in_ICACHE_REQ_ACK ,ACK); |
---|
| 63 | //ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_THREAD_ID,"thread_id",Tcontext_t ,_param->_size_context_id ); |
---|
| 64 | ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_PACKET_ID,"packet_id",Tpacket_t ,_param->_size_ifetch_queue_ptr ); |
---|
| 65 | ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS ,"address" ,Ticache_instruction_t,_param->_size_instruction_address ); |
---|
| 66 | ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_TYPE ,"type" ,Ticache_type_t ,_param->_size_icache_type); |
---|
| 67 | |
---|
| 68 | ALLOC0_INTERFACE_END(); |
---|
[78] | 69 | } |
---|
| 70 | |
---|
| 71 | // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
| 72 | { |
---|
[112] | 73 | ALLOC0_INTERFACE_BEGIN("icache_rsp",IN , WEST, _("Instruction cache respons.")); |
---|
[78] | 74 | |
---|
[112] | 75 | ALLOC0_VALACK_IN ( in_ICACHE_RSP_VAL ,VAL); |
---|
| 76 | ALLOC0_VALACK_OUT (out_ICACHE_RSP_ACK ,ACK); |
---|
| 77 | //ALLOC0_SIGNAL_IN ( in_ICACHE_RSP_THREAD_ID ,"thread_id" ,Tcontext_t ,_param->_size_context_id ); |
---|
| 78 | ALLOC0_SIGNAL_IN ( in_ICACHE_RSP_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_ifetch_queue_ptr ); |
---|
| 79 | ALLOC0_SIGNAL_IN ( in_ICACHE_RSP_ERROR ,"error" ,Ticache_error_t ,_param->_size_icache_error); |
---|
| 80 | |
---|
| 81 | ALLOC0_INTERFACE_END(); |
---|
[78] | 82 | } |
---|
| 83 | { |
---|
[112] | 84 | ALLOC1_INTERFACE_BEGIN("icache_rsp",IN , WEST, _("Instruction cache respons."),_param->_nb_instruction); |
---|
[78] | 85 | |
---|
| 86 | ALLOC1_SIGNAL_IN ( in_ICACHE_RSP_INSTRUCTION,"instruction",Ticache_instruction_t,_param->_size_instruction ); |
---|
[112] | 87 | |
---|
| 88 | ALLOC1_INTERFACE_END(_param->_nb_instruction); |
---|
[78] | 89 | } |
---|
| 90 | |
---|
| 91 | // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
| 92 | { |
---|
[112] | 93 | ALLOC0_INTERFACE_BEGIN("predict",OUT, NORTH, _("Predict the next pc.")); |
---|
[78] | 94 | |
---|
[112] | 95 | ALLOC0_VALACK_OUT (out_PREDICT_VAL ,VAL); |
---|
| 96 | ALLOC0_VALACK_IN ( in_PREDICT_ACK ,ACK); |
---|
| 97 | ALLOC0_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS ,"pc_previous" ,Tgeneral_address_t,_param->_size_instruction_address); |
---|
| 98 | ALLOC0_SIGNAL_OUT (out_PREDICT_PC_CURRENT ,"pc_current" ,Tgeneral_address_t,_param->_size_instruction_address); |
---|
| 99 | ALLOC0_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE ,"pc_current_is_ds_take" ,Tcontrol_t ,1); |
---|
| 100 | ALLOC0_SIGNAL_IN ( in_PREDICT_PC_NEXT ,"pc_next" ,Tgeneral_address_t,_param->_size_instruction_address); |
---|
| 101 | ALLOC0_SIGNAL_IN ( in_PREDICT_PC_NEXT_IS_DS_TAKE ,"pc_next_is_ds_take" ,Tcontrol_t ,1); |
---|
| 102 | ALLOC0_SIGNAL_IN ( in_PREDICT_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr); |
---|
| 103 | ALLOC0_SIGNAL_IN ( in_PREDICT_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); |
---|
| 104 | ALLOC0_SIGNAL_IN ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); |
---|
| 105 | |
---|
| 106 | ALLOC0_INTERFACE_END(); |
---|
[78] | 107 | } |
---|
| 108 | { |
---|
[112] | 109 | ALLOC1_INTERFACE_BEGIN("predict",IN , NORTH, _("Predict the next pc."),_param->_nb_instruction); |
---|
[78] | 110 | |
---|
| 111 | ALLOC1_SIGNAL_IN ( in_PREDICT_INSTRUCTION_ENABLE ,"instruction_enable" ,Tcontrol_t ,1); |
---|
[112] | 112 | |
---|
| 113 | ALLOC1_INTERFACE_END(_param->_nb_instruction); |
---|
[78] | 114 | } |
---|
| 115 | |
---|
| 116 | // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
| 117 | { |
---|
[112] | 118 | ALLOC1_INTERFACE_BEGIN("decod",OUT , EAST, _("Send bundle to the decod unit."),_param->_nb_instruction); |
---|
[78] | 119 | |
---|
| 120 | ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL); |
---|
| 121 | ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK); |
---|
[136] | 122 | |
---|
[78] | 123 | ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction); |
---|
[136] | 124 | ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address); |
---|
| 125 | ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); |
---|
| 126 | ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); |
---|
| 127 | ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); |
---|
[112] | 128 | |
---|
| 129 | ALLOC1_INTERFACE_END(_param->_nb_instruction); |
---|
[78] | 130 | } |
---|
| 131 | |
---|
| 132 | // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
| 133 | { |
---|
[112] | 134 | ALLOC0_INTERFACE_BEGIN("event",IN , NORTH, _("Event interface.")); |
---|
[78] | 135 | |
---|
[112] | 136 | ALLOC0_VALACK_IN ( in_EVENT_VAL ,VAL); |
---|
| 137 | ALLOC0_VALACK_OUT(out_EVENT_ACK ,ACK); |
---|
| 138 | ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address); |
---|
| 139 | ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t,_param->_size_instruction_address); |
---|
| 140 | ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL ,"address_next_val",Tcontrol_t,1); |
---|
| 141 | ALLOC0_SIGNAL_IN ( in_EVENT_IS_DS_TAKE ,"is_ds_take" ,Tcontrol_t,1); |
---|
| 142 | |
---|
| 143 | ALLOC0_INTERFACE_END(); |
---|
[78] | 144 | } |
---|
| 145 | |
---|
| 146 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
| 147 | std::string name; |
---|
| 148 | |
---|
| 149 | { |
---|
| 150 | name = _name+"_address_management"; |
---|
[131] | 151 | log_printf(INFO,Ifetch_unit,FUNCTION,_("Create : %s"),name.c_str()); |
---|
| 152 | |
---|
[78] | 153 | _component_address_management = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Address_management |
---|
| 154 | (name.c_str() |
---|
| 155 | #ifdef STATISTICS |
---|
| 156 | ,param_statistics |
---|
| 157 | #endif |
---|
[82] | 158 | ,_param->_param_address_management |
---|
| 159 | ,_usage); |
---|
[131] | 160 | |
---|
[78] | 161 | _component->set_component (_component_address_management->_component |
---|
| 162 | #ifdef POSITION |
---|
| 163 | , 50, 50, 10, 10 |
---|
| 164 | #endif |
---|
| 165 | ); |
---|
| 166 | } |
---|
| 167 | |
---|
| 168 | { |
---|
| 169 | name = _name+"_ifetch_queue"; |
---|
[131] | 170 | log_printf(INFO,Ifetch_unit,FUNCTION,_("Create : %s"),name.c_str()); |
---|
| 171 | |
---|
[78] | 172 | _component_ifetch_queue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue |
---|
| 173 | (name.c_str() |
---|
| 174 | #ifdef STATISTICS |
---|
| 175 | ,param_statistics |
---|
| 176 | #endif |
---|
[82] | 177 | ,_param->_param_ifetch_queue |
---|
| 178 | ,_usage); |
---|
[131] | 179 | |
---|
[78] | 180 | _component->set_component (_component_ifetch_queue->_component |
---|
| 181 | #ifdef POSITION |
---|
| 182 | , 50, 50, 10, 10 |
---|
| 183 | #endif |
---|
| 184 | ); |
---|
| 185 | } |
---|
| 186 | |
---|
| 187 | { |
---|
| 188 | name = _name+"_ifetch_unit_glue"; |
---|
[131] | 189 | log_printf(INFO,Ifetch_unit,FUNCTION,_("Create : %s"),name.c_str()); |
---|
| 190 | |
---|
[78] | 191 | _component_ifetch_unit_glue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Ifetch_unit_Glue |
---|
| 192 | (name.c_str() |
---|
| 193 | #ifdef STATISTICS |
---|
| 194 | ,param_statistics |
---|
| 195 | #endif |
---|
[82] | 196 | ,_param->_param_ifetch_unit_glue |
---|
| 197 | ,_usage); |
---|
[131] | 198 | |
---|
[78] | 199 | _component->set_component (_component_ifetch_unit_glue->_component |
---|
| 200 | #ifdef POSITION |
---|
| 201 | , 50, 50, 10, 10 |
---|
| 202 | #endif |
---|
| 203 | ); |
---|
| 204 | } |
---|
| 205 | |
---|
| 206 | // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
| 207 | std::string src,dest; |
---|
| 208 | |
---|
| 209 | // =================================================================== |
---|
| 210 | // =====[ address_management ]======================================== |
---|
| 211 | // =================================================================== |
---|
| 212 | { |
---|
| 213 | src = _name+"_address_management"; |
---|
[131] | 214 | log_printf(INFO,Ifetch_unit,FUNCTION,_("Instance : %s"),src.c_str()); |
---|
[78] | 215 | |
---|
| 216 | { |
---|
| 217 | dest = _name; |
---|
| 218 | #ifdef POSITION |
---|
| 219 | _component->interface_map (src ,"", |
---|
| 220 | dest,""); |
---|
| 221 | #endif |
---|
| 222 | PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); |
---|
| 223 | PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); |
---|
| 224 | } |
---|
| 225 | |
---|
| 226 | { |
---|
[85] | 227 | dest = _name+"_ifetch_queue"; |
---|
[78] | 228 | |
---|
| 229 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
---|
| 230 | { |
---|
| 231 | #ifdef POSITION |
---|
[85] | 232 | _component->interface_map (src ,"address_"+toString(i), |
---|
| 233 | dest,"address_"+toString(i)); |
---|
[78] | 234 | #endif |
---|
[85] | 235 | COMPONENT_MAP(_component,src ,"out_ADDRESS_"+toString(i)+"_INSTRUCTION_ENABLE", |
---|
| 236 | dest, "in_ADDRESS_"+toString(i)+"_INSTRUCTION_ENABLE"); |
---|
[78] | 237 | } |
---|
| 238 | |
---|
[88] | 239 | if (_param->_have_port_inst_ifetch_ptr) |
---|
[85] | 240 | COMPONENT_MAP(_component,src ,"out_ADDRESS_INST_IFETCH_PTR" , |
---|
| 241 | dest, "in_ADDRESS_INST_IFETCH_PTR" ); |
---|
| 242 | COMPONENT_MAP(_component,src ,"out_ADDRESS_BRANCH_STATE" , |
---|
| 243 | dest, "in_ADDRESS_BRANCH_STATE" ); |
---|
[88] | 244 | if (_param->_have_port_depth) |
---|
[85] | 245 | COMPONENT_MAP(_component,src ,"out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID", |
---|
| 246 | dest, "in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID"); |
---|
| 247 | |
---|
| 248 | dest = _name+"_ifetch_unit_glue"; |
---|
| 249 | |
---|
| 250 | #ifdef POSITION |
---|
| 251 | _component->interface_map (src ,"address", |
---|
| 252 | dest,"address"); |
---|
| 253 | #endif |
---|
| 254 | |
---|
| 255 | COMPONENT_MAP(_component,src ,"out_ADDRESS_VAL" , |
---|
| 256 | dest, "in_ICACHE_REQ_ADDRESS_VAL"); |
---|
| 257 | COMPONENT_MAP(_component,src , "in_ADDRESS_ACK" , |
---|
| 258 | dest,"out_ICACHE_REQ_ADDRESS_ACK"); |
---|
| 259 | COMPONENT_MAP(_component,src ,"out_ADDRESS_INSTRUCTION_ADDRESS", |
---|
| 260 | dest, "in_ICACHE_REQ_ADDRESS_ADDRESS"); |
---|
[78] | 261 | } |
---|
| 262 | |
---|
| 263 | { |
---|
| 264 | dest = _name; |
---|
| 265 | |
---|
| 266 | #ifdef POSITION |
---|
| 267 | _component->interface_map (src ,"predict", |
---|
| 268 | dest,"predict"); |
---|
| 269 | #endif |
---|
| 270 | |
---|
| 271 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
---|
| 272 | { |
---|
| 273 | #ifdef POSITION |
---|
| 274 | _component->interface_map (src ,"predict_"+toString(i), |
---|
| 275 | dest,"predict_"+toString(i)); |
---|
| 276 | #endif |
---|
| 277 | PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_INSTRUCTION_ENABLE" |
---|
| 278 | ,dest, "in_PREDICT_"+toString(i)+"_INSTRUCTION_ENABLE" ); |
---|
| 279 | } |
---|
| 280 | |
---|
| 281 | PORT_MAP(_component,src ,"out_PREDICT_VAL" |
---|
| 282 | ,dest,"out_PREDICT_VAL" ); |
---|
| 283 | PORT_MAP(_component,src , "in_PREDICT_ACK" |
---|
| 284 | ,dest, "in_PREDICT_ACK" ); |
---|
| 285 | PORT_MAP(_component,src ,"out_PREDICT_PC_PREVIOUS" |
---|
| 286 | ,dest,"out_PREDICT_PC_PREVIOUS" ); |
---|
| 287 | PORT_MAP(_component,src ,"out_PREDICT_PC_CURRENT" |
---|
| 288 | ,dest,"out_PREDICT_PC_CURRENT" ); |
---|
| 289 | PORT_MAP(_component,src ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE" |
---|
| 290 | ,dest,"out_PREDICT_PC_CURRENT_IS_DS_TAKE" ); |
---|
| 291 | PORT_MAP(_component,src , "in_PREDICT_PC_NEXT" |
---|
| 292 | ,dest, "in_PREDICT_PC_NEXT" ); |
---|
| 293 | PORT_MAP(_component,src , "in_PREDICT_PC_NEXT_IS_DS_TAKE" |
---|
| 294 | ,dest, "in_PREDICT_PC_NEXT_IS_DS_TAKE" ); |
---|
[88] | 295 | if (_param->_have_port_inst_ifetch_ptr) |
---|
[78] | 296 | PORT_MAP(_component,src , "in_PREDICT_INST_IFETCH_PTR" |
---|
| 297 | ,dest, "in_PREDICT_INST_IFETCH_PTR" ); |
---|
| 298 | PORT_MAP(_component,src , "in_PREDICT_BRANCH_STATE" |
---|
| 299 | ,dest, "in_PREDICT_BRANCH_STATE" ); |
---|
[88] | 300 | if (_param->_have_port_depth) |
---|
[78] | 301 | PORT_MAP(_component,src , "in_PREDICT_BRANCH_UPDATE_PREDICTION_ID" |
---|
| 302 | ,dest, "in_PREDICT_BRANCH_UPDATE_PREDICTION_ID"); |
---|
| 303 | } |
---|
| 304 | |
---|
| 305 | { |
---|
| 306 | dest = _name+"_ifetch_unit_glue"; |
---|
| 307 | |
---|
| 308 | #ifdef POSITION |
---|
| 309 | _component->interface_map (src ,"event", |
---|
| 310 | dest,"event"); |
---|
| 311 | _component->interface_map (src ,"event", |
---|
| 312 | _name,"event"); |
---|
| 313 | #endif |
---|
| 314 | |
---|
[85] | 315 | COMPONENT_MAP(_component,src , "in_EVENT_VAL" ,dest ,"out_EVENT_ADDRESS_VAL"); |
---|
| 316 | COMPONENT_MAP(_component,src ,"out_EVENT_ACK" ,dest , "in_EVENT_ADDRESS_ACK"); |
---|
| 317 | |
---|
| 318 | |
---|
| 319 | dest = _name; |
---|
[88] | 320 | PORT_MAP(_component,src , "in_EVENT_ADDRESS" ,dest , "in_EVENT_ADDRESS" ); |
---|
| 321 | PORT_MAP(_component,src , "in_EVENT_ADDRESS_NEXT" ,dest , "in_EVENT_ADDRESS_NEXT" ); |
---|
| 322 | PORT_MAP(_component,src , "in_EVENT_ADDRESS_NEXT_VAL",dest , "in_EVENT_ADDRESS_NEXT_VAL" ); |
---|
| 323 | PORT_MAP(_component,src , "in_EVENT_IS_DS_TAKE" ,dest , "in_EVENT_IS_DS_TAKE" ); |
---|
[78] | 324 | } |
---|
| 325 | } |
---|
| 326 | |
---|
| 327 | // =================================================================== |
---|
| 328 | // =====[ ifetch_queue ]============================================== |
---|
| 329 | // =================================================================== |
---|
| 330 | { |
---|
| 331 | src = _name+"_ifetch_queue"; |
---|
[131] | 332 | log_printf(INFO,Ifetch_unit,FUNCTION,_("Instance : %s"),src.c_str()); |
---|
[78] | 333 | |
---|
| 334 | { |
---|
| 335 | dest = _name; |
---|
| 336 | #ifdef POSITION |
---|
| 337 | _component->interface_map (src ,"", |
---|
| 338 | dest,""); |
---|
| 339 | #endif |
---|
| 340 | PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); |
---|
| 341 | PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); |
---|
| 342 | } |
---|
| 343 | |
---|
| 344 | { |
---|
| 345 | dest = _name; |
---|
| 346 | |
---|
| 347 | #ifdef POSITION |
---|
| 348 | _component->interface_map (src ,"address", |
---|
| 349 | dest,"address"); |
---|
| 350 | #endif |
---|
| 351 | |
---|
[88] | 352 | if (_param->_have_port_ifetch_queue_ptr) |
---|
[85] | 353 | PORT_MAP(_component,src ,"out_ADDRESS_IFETCH_QUEUE_ID" , |
---|
| 354 | dest,"out_ICACHE_REQ_PACKET_ID" ); |
---|
| 355 | |
---|
[78] | 356 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
---|
| 357 | { |
---|
| 358 | #ifdef POSITION |
---|
| 359 | _component->interface_map (src ,"address_"+toString(i), |
---|
| 360 | dest+"_address_management","address_"+toString(i)); |
---|
| 361 | #endif |
---|
[85] | 362 | |
---|
| 363 | //out_ADDRESS_INSTRUCTION_ENABLE - address_management |
---|
[78] | 364 | } |
---|
| 365 | |
---|
[85] | 366 | dest = _name+"_ifetch_unit_glue"; |
---|
| 367 | |
---|
| 368 | COMPONENT_MAP(_component,src , "in_ADDRESS_VAL" , |
---|
| 369 | dest,"out_ICACHE_REQ_QUEUE_VAL"); |
---|
| 370 | COMPONENT_MAP(_component,src ,"out_ADDRESS_ACK" , |
---|
| 371 | dest, "in_ICACHE_REQ_QUEUE_ACK"); |
---|
| 372 | COMPONENT_MAP(_component,src , "in_ADDRESS_INSTRUCTION_ADDRESS", |
---|
| 373 | dest,"out_ICACHE_REQ_QUEUE_ADDRESS"); |
---|
| 374 | // in_ADDRESS_INST_IFETCH_PTR - address_management |
---|
| 375 | // in_ADDRESS_BRANCH_STATE - address_management |
---|
| 376 | // in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID - address_management |
---|
[78] | 377 | } |
---|
| 378 | |
---|
| 379 | { |
---|
| 380 | dest = _name; |
---|
| 381 | |
---|
| 382 | #ifdef POSITION |
---|
| 383 | _component->interface_map (src ,"icache_rsp", |
---|
| 384 | dest,"icache_rsp"); |
---|
| 385 | #endif |
---|
| 386 | |
---|
| 387 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
---|
| 388 | { |
---|
| 389 | #ifdef POSITION |
---|
| 390 | _component->interface_map (src ,"icache_rsp_"+toString(i), |
---|
| 391 | dest,"icache_rsp_"+toString(i)); |
---|
| 392 | #endif |
---|
| 393 | |
---|
| 394 | PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_VAL" , |
---|
| 395 | dest,"out_DECOD_"+toString(i)+"_VAL" ); |
---|
| 396 | PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_ACK" , |
---|
| 397 | dest, "in_DECOD_"+toString(i)+"_ACK" ); |
---|
| 398 | PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_INSTRUCTION" , |
---|
| 399 | dest,"out_DECOD_"+toString(i)+"_INSTRUCTION" ); |
---|
[136] | 400 | PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_ADDRESS" , |
---|
| 401 | dest,"out_DECOD_"+toString(i)+"_ADDRESS" ); |
---|
| 402 | PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_BRANCH_STATE" , |
---|
| 403 | dest,"out_DECOD_"+toString(i)+"_BRANCH_STATE" ); |
---|
| 404 | if (_param->_have_port_depth) |
---|
| 405 | PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID", |
---|
| 406 | dest,"out_DECOD_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID"); |
---|
| 407 | PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_EXCEPTION" , |
---|
| 408 | dest,"out_DECOD_"+toString(i)+"_EXCEPTION" ); |
---|
[78] | 409 | } |
---|
| 410 | } |
---|
| 411 | |
---|
| 412 | { |
---|
| 413 | dest = _name; |
---|
| 414 | |
---|
| 415 | #ifdef POSITION |
---|
| 416 | _component->interface_map (src ,"icache_rsp", |
---|
| 417 | dest,"icache_rsp"); |
---|
| 418 | #endif |
---|
| 419 | |
---|
| 420 | PORT_MAP(_component,src , "in_ICACHE_RSP_VAL" ,dest, "in_ICACHE_RSP_VAL" ); |
---|
| 421 | PORT_MAP(_component,src ,"out_ICACHE_RSP_ACK" ,dest,"out_ICACHE_RSP_ACK" ); |
---|
[88] | 422 | if (_param->_have_port_ifetch_queue_ptr) |
---|
[78] | 423 | PORT_MAP(_component,src , "in_ICACHE_RSP_PACKET_ID",dest, "in_ICACHE_RSP_PACKET_ID"); |
---|
| 424 | PORT_MAP(_component,src , "in_ICACHE_RSP_ERROR" ,dest, "in_ICACHE_RSP_ERROR" ); |
---|
| 425 | |
---|
| 426 | for (uint32_t i=0; i<_param->_nb_instruction; i++) |
---|
| 427 | { |
---|
| 428 | #ifdef POSITION |
---|
| 429 | _component->interface_map (src ,"icache_rsp_"+toString(i), |
---|
| 430 | dest,"icache_rsp_"+toString(i)); |
---|
| 431 | #endif |
---|
| 432 | PORT_MAP(_component,src , "in_ICACHE_RSP_"+toString(i)+"_INSTRUCTION", |
---|
| 433 | dest, "in_ICACHE_RSP_"+toString(i)+"_INSTRUCTION"); |
---|
| 434 | } |
---|
| 435 | } |
---|
| 436 | |
---|
| 437 | { |
---|
| 438 | dest = _name+"_ifetch_unit_glue"; |
---|
| 439 | |
---|
| 440 | #ifdef POSITION |
---|
| 441 | _component->interface_map (src ,"event_reset", |
---|
| 442 | dest,"event"); |
---|
| 443 | #endif |
---|
| 444 | |
---|
[85] | 445 | COMPONENT_MAP(_component,src , "in_EVENT_RESET_VAL",dest,"out_EVENT_QUEUE_VAL"); |
---|
| 446 | COMPONENT_MAP(_component,src ,"out_EVENT_RESET_ACK",dest, "in_EVENT_QUEUE_ACK"); |
---|
[78] | 447 | } |
---|
| 448 | } |
---|
| 449 | |
---|
| 450 | // =================================================================== |
---|
| 451 | // =====[ ifetch_unit_glue ]========================================== |
---|
| 452 | // =================================================================== |
---|
| 453 | { |
---|
| 454 | src = _name+"_ifetch_unit_glue"; |
---|
[131] | 455 | log_printf(INFO,Ifetch_unit,FUNCTION,_("Instance : %s"),src.c_str()); |
---|
[78] | 456 | |
---|
| 457 | { |
---|
| 458 | dest = _name; |
---|
| 459 | #ifdef POSITION |
---|
| 460 | _component->interface_map (src ,"", |
---|
| 461 | dest,""); |
---|
| 462 | #endif |
---|
| 463 | PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); |
---|
| 464 | PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); |
---|
| 465 | } |
---|
| 466 | |
---|
| 467 | { |
---|
| 468 | dest = _name; |
---|
| 469 | |
---|
| 470 | #ifdef POSITION |
---|
| 471 | _component->interface_map (src ,"icache_req", |
---|
| 472 | dest,"icache_req"); |
---|
| 473 | #endif |
---|
| 474 | |
---|
[85] | 475 | PORT_MAP(_component,src ,"out_ICACHE_REQ_VAL" ,dest,"out_ICACHE_REQ_VAL"); |
---|
| 476 | PORT_MAP(_component,src , "in_ICACHE_REQ_ACK" ,dest, "in_ICACHE_REQ_ACK"); |
---|
| 477 | PORT_MAP(_component,src ,"out_ICACHE_REQ_TYPE" ,dest,"out_ICACHE_REQ_TYPE"); |
---|
| 478 | PORT_MAP(_component,src ,"out_ICACHE_REQ_ADDRESS",dest,"out_ICACHE_REQ_ADDRESS"); |
---|
| 479 | |
---|
| 480 | // in_ICACHE_REQ_ADDRESS_VAL - address_management |
---|
| 481 | //out_ICACHE_REQ_QUEUE_VAL - ifetch_queue |
---|
| 482 | //out_ICACHE_REQ_ADDRESS_ACK - address_management |
---|
| 483 | // in_ICACHE_REQ_QUEUE_ACK - ifetch_queue |
---|
| 484 | // in_ICACHE_REQ_ADDRESS_ADDRESS - address_management |
---|
| 485 | //out_ICACHE_REQ_QUEUE_ADDRESS - ifetch_queue |
---|
| 486 | |
---|
[78] | 487 | } |
---|
| 488 | |
---|
| 489 | { |
---|
| 490 | dest = _name; |
---|
| 491 | |
---|
| 492 | #ifdef POSITION |
---|
| 493 | _component->interface_map (src ,"event", |
---|
| 494 | dest,"event"); |
---|
| 495 | #endif |
---|
| 496 | |
---|
| 497 | PORT_MAP(_component,src , "in_EVENT_VAL" ,dest , "in_EVENT_VAL" ); |
---|
| 498 | PORT_MAP(_component,src ,"out_EVENT_ACK" ,dest ,"out_EVENT_ACK" ); |
---|
[85] | 499 | |
---|
| 500 | //out_EVENT_ADDRESS_VAL - address_management |
---|
| 501 | //out_EVENT_QUEUE_VAL - ifetch_queue |
---|
| 502 | // in_EVENT_ADDRESS_ACK - address_management |
---|
| 503 | // in_EVENT_QUEUE_ACK - ifetch_queue |
---|
[78] | 504 | } |
---|
| 505 | } |
---|
| 506 | |
---|
| 507 | // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[88] | 508 | #if DEBUG_Ifetch_unit == true |
---|
| 509 | _component->test_map(); |
---|
| 510 | #endif |
---|
| 511 | |
---|
[78] | 512 | #ifdef POSITION |
---|
[88] | 513 | if (usage_is_set(_usage,USE_POSITION)) |
---|
| 514 | _component->generate_file(); |
---|
[78] | 515 | #endif |
---|
| 516 | |
---|
| 517 | log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); |
---|
| 518 | }; |
---|
| 519 | |
---|
| 520 | }; // end namespace ifetch_unit |
---|
| 521 | }; // end namespace front_end |
---|
| 522 | }; // end namespace multi_front_end |
---|
| 523 | }; // end namespace core |
---|
| 524 | |
---|
| 525 | }; // end namespace behavioural |
---|
| 526 | }; // end namespace morpheo |
---|