source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_allocation.cpp @ 88

Last change on this file since 88 was 88, checked in by rosiere, 16 years ago

Almost complete design
with Test and test platform
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File size: 6.6 KB
Line 
1/*
2 * $Id: Branch_Target_Buffer_Glue_allocation.cpp 88 2008-12-10 18:31:39Z rosiere $
3 *
4 * [ Description ]
5 *
6 */
7
8#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h"
9#include "Behavioural/include/Allocation.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace core {
14namespace multi_front_end {
15namespace front_end {
16namespace prediction_unit {
17namespace branch_target_buffer {
18namespace branch_target_buffer_glue {
19
20
21
22#undef  FUNCTION
23#define FUNCTION "Branch_Target_Buffer_Glue::allocation"
24  void Branch_Target_Buffer_Glue::allocation (
25#ifdef STATISTICS
26                               morpheo::behavioural::Parameters_Statistics * param_statistics
27#else
28                               void
29#endif
30                               )
31  {
32    log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin");
33
34    _component   = new Component (_usage);
35
36    Entity * entity = _component->set_entity (_name       
37                                              ,"Branch_Target_Buffer_Glue"
38#ifdef POSITION
39                                              ,COMBINATORY
40#endif
41                                              );
42
43    _interfaces = entity->set_interfaces();
44
45    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
46    {
47      Interface * interface = _interfaces->set_interface(""
48#ifdef POSITION
49                                                         ,IN
50                                                         ,SOUTH,
51                                                         "Generalist interface"
52#endif
53                                                         );
54     
55      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
56      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
57    }
58
59    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
60    {
61      {
62        ALLOC1_INTERFACE("predict", IN, WEST, "predict",_param->_nb_inst_predict);
63
64        ALLOC1_SIGNAL_IN ( in_PREDICT_VAL           , "val"           ,Tcontrol_t         , 1);
65        ALLOC1_SIGNAL_OUT(out_PREDICT_ACK           , "ack"           ,Tcontrol_t         , 1);
66        ALLOC1_SIGNAL_OUT(out_PREDICT_HIT           , "hit"           ,Tcontrol_t         , 1);
67        ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC   , "address_src"   ,Tgeneral_data_t    , _param->_size_instruction_address);
68        ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST  , "address_dest"  ,Tgeneral_data_t    , _param->_size_instruction_address);
69        ALLOC1_SIGNAL_OUT(out_PREDICT_CONDITION     , "condition"     ,Tbranch_condition_t, _param->_size_branch_condition);
70        ALLOC1_SIGNAL_OUT(out_PREDICT_LAST_TAKE     , "last_take"     ,Tcontrol_t         , 1);
71        ALLOC1_SIGNAL_OUT(out_PREDICT_IS_ACCURATE   , "is_accurate"   ,Tcontrol_t         , 1);
72        ALLOC1_SIGNAL_OUT(out_PREDICT_REGISTER_VAL  , "register_val"  ,Tcontrol_t         , 1);
73        ALLOC1_SIGNAL_IN ( in_PREDICT_REGISTER_ACK  , "register_ack"  ,Tcontrol_t         , 1);
74        if (_param->_have_port_victim)
75          {
76        ALLOC1_SIGNAL_IN ( in_PREDICT_SORT_VAL  ,"sort_val"  ,Tptr_t,1);
77        ALLOC1_SIGNAL_IN ( in_PREDICT_SORT_INDEX,"sort_index",Tptr_t,_param->_size_victim);
78
79        ALLOC1_SIGNAL_OUT(out_PREDICT_VICTIM_VAL    , "victim_val"    ,Tcontrol_t         , 1);
80        ALLOC1_SIGNAL_IN ( in_PREDICT_VICTIM_ACK    , "victim_ack"    ,Tcontrol_t         , 1);
81        ALLOC1_SIGNAL_OUT(out_PREDICT_VICTIM_HIT    , "victim_hit"    ,Tcontrol_t         , 1);
82        ALLOC1_SIGNAL_OUT(out_PREDICT_VICTIM_ADDRESS, "victim_address",Tgeneral_data_t    , _param->_size_victim_address);
83        ALLOC1_SIGNAL_OUT(out_PREDICT_VICTIM_INDEX  , "victim_index"  ,Tptr_t             , _param->_size_victim);
84        ALLOC1_SIGNAL_IN ( in_PREDICT_VICTIM_VICTIM , "victim_victim" ,Tptr_t             , _param->_size_victim);
85          }
86      }
87      {
88        ALLOC2_INTERFACE("predict", IN, WEST, "predict",_param->_nb_inst_predict, _param->_associativity);
89
90        ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_HIT         ,"register_hit"         ,Tcontrol_t         ,1);
91        ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_ADDRESS_SRC ,"register_address_src" ,Tgeneral_data_t    ,_param->_size_instruction_address);
92        ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_ADDRESS_DEST,"register_address_dest",Tgeneral_data_t    ,_param->_size_instruction_address);
93        ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_CONDITION   ,"register_condition"   ,Tbranch_condition_t,_param->_size_branch_condition);
94        ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_LAST_TAKE   ,"register_last_take"   ,Tcontrol_t         ,1);
95        ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_IS_ACCURATE ,"register_is_accurate" ,Tcontrol_t         ,1);
96      }
97    }
98
99    // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
100    {
101      ALLOC1_INTERFACE("decod", IN, WEST, "decod",_param->_nb_inst_decod);
102
103      ALLOC1_SIGNAL_IN ( in_DECOD_VAL           ,"val"           ,Tcontrol_t     ,1);
104      ALLOC1_SIGNAL_OUT(out_DECOD_ACK           ,"ack"           ,Tcontrol_t     ,1);
105      if (not _param->_is_full_associative)
106      ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_SRC   ,"address_src"   ,Tgeneral_data_t,_param->_size_instruction_address);
107
108      ALLOC1_SIGNAL_OUT(out_DECOD_REGISTER_VAL  ,"register_val"  ,Tcontrol_t     ,1);
109      ALLOC1_SIGNAL_IN ( in_DECOD_REGISTER_ACK  ,"register_ack"  ,Tcontrol_t     ,1);
110
111      if (_param->_have_port_victim)
112        {
113      ALLOC1_SIGNAL_OUT(out_DECOD_VICTIM_VAL    ,"victim_val"    ,Tcontrol_t     ,1);
114      ALLOC1_SIGNAL_IN ( in_DECOD_VICTIM_ACK    ,"victim_ack"    ,Tcontrol_t     ,1);
115      ALLOC1_SIGNAL_OUT(out_DECOD_VICTIM_ADDRESS,"victim_address",Tgeneral_data_t,_param->_size_victim_address);
116        }
117    }
118
119    // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
120    {
121      ALLOC1_INTERFACE("update", IN, WEST, "update",_param->_nb_inst_update);
122
123      ALLOC1_SIGNAL_IN ( in_UPDATE_VAL           ,"val"           ,Tcontrol_t     ,1);
124      ALLOC1_SIGNAL_OUT(out_UPDATE_ACK           ,"ack"           ,Tcontrol_t     ,1);
125      if (not _param->_is_full_associative)
126      ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_SRC   ,"address_src"   ,Tgeneral_data_t,_param->_size_instruction_address);
127
128      ALLOC1_SIGNAL_OUT(out_UPDATE_REGISTER_VAL  ,"register_val"  ,Tcontrol_t     ,1);
129      ALLOC1_SIGNAL_IN ( in_UPDATE_REGISTER_ACK  ,"register_ack"  ,Tcontrol_t     ,1);
130
131      if (_param->_have_port_victim)
132        {
133      ALLOC1_SIGNAL_OUT(out_UPDATE_VICTIM_VAL    ,"victim_val"    ,Tcontrol_t     ,1);
134      ALLOC1_SIGNAL_IN ( in_UPDATE_VICTIM_ACK    ,"victim_ack"    ,Tcontrol_t     ,1);
135      ALLOC1_SIGNAL_OUT(out_UPDATE_VICTIM_ADDRESS,"victim_address",Tgeneral_data_t,_param->_size_victim_address);
136        }
137    }
138
139    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
140
141#ifdef POSITION
142    if (usage_is_set(_usage,USE_POSITION))
143      _component->generate_file();
144#endif
145
146    log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End");
147  };
148
149}; // end namespace branch_target_buffer_glue
150}; // end namespace branch_target_buffer
151}; // end namespace prediction_unit
152}; // end namespace front_end
153}; // end namespace multi_front_end
154}; // end namespace core
155
156}; // end namespace behavioural
157}; // end namespace morpheo             
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