[78] | 1 | /* |
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| 2 | * $Id: test.cpp 82 2008-05-01 16:48:45Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | * Test |
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| 7 | */ |
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| 8 | |
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[82] | 9 | #define NB_ITERATION 1024 |
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| 10 | #define CYCLE_MAX (128*NB_ITERATION) |
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| 11 | |
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[78] | 12 | #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test.h" |
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| 13 | #include "Common/include/Test.h" |
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| 14 | #include "Common/include/BitManipulation.h" |
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| 15 | #include "Behavioural/include/Allocation.h" |
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| 16 | |
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| 17 | class entry_t |
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| 18 | { |
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| 19 | public : Tcontrol_t _val ; |
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| 20 | public : Tcontext_t _context ; |
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| 21 | public : Tcontrol_t _address_dest_val; |
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| 22 | public : Tgeneral_data_t _address_src ; |
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| 23 | public : Tgeneral_data_t _address_dest ; |
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| 24 | public : Tbranch_condition_t _condition ; |
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| 25 | public : Tcontrol_t _last_take ; |
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| 26 | public : Tcounter_t _accurate ; |
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| 27 | |
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| 28 | public : bool hit (morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param, |
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| 29 | Tgeneral_data_t addr_test, |
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| 30 | Tcontext_t context) |
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| 31 | { |
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| 32 | Tgeneral_data_t addr_src_offset = (_address_src >> _param->_shift_offset)&_param->_mask_offset; |
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| 33 | Tgeneral_data_t addr_src_index = (_address_src >> _param->_shift_bank )&_param->_mask_bank ; |
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| 34 | Tgeneral_data_t addr_src_tag = (_address_src >> _param->_shift_tag ); |
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| 35 | |
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| 36 | Tgeneral_data_t addr_test_offset = (addr_test >> _param->_shift_offset)&_param->_mask_offset; |
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| 37 | Tgeneral_data_t addr_test_index = (addr_test >> _param->_shift_bank )&_param->_mask_bank ; |
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| 38 | Tgeneral_data_t addr_test_tag = (addr_test >> _param->_shift_tag ); |
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| 39 | |
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| 40 | bool is_hit = ( (_val == 1 ) and |
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| 41 | (_context == context ) and |
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| 42 | (addr_test_tag == addr_src_tag ) and |
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| 43 | (addr_test_index == addr_src_index ) and |
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| 44 | (addr_test_offset <= addr_src_offset )); |
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| 45 | |
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| 46 | LABEL("address_src (tag, index, offset) : %.8x %.8x %.8x",addr_src_tag, addr_src_index, addr_src_offset); |
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| 47 | LABEL("address_test (tag, index, offset) : %.8x %.8x %.8x - hit : %d",addr_test_tag, addr_test_index, addr_test_offset, is_hit); |
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| 48 | return is_hit; |
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| 49 | } |
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| 50 | |
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| 51 | public : void print (void) |
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| 52 | { |
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| 53 | LABEL("%d - %.2d %.8x %.1d %.8x %.3d %.1d %.4d", |
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| 54 | _val , |
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| 55 | _context , |
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| 56 | _address_src , |
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| 57 | _address_dest_val, |
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| 58 | _address_dest , |
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| 59 | _condition , |
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| 60 | _last_take , |
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| 61 | _accurate ); |
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| 62 | |
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| 63 | } |
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| 64 | |
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| 65 | }; |
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| 66 | |
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| 67 | |
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| 68 | |
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| 69 | Tgeneral_data_t gen_addr (morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param, |
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| 70 | Tgeneral_data_t index) |
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| 71 | { |
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| 72 | Tgeneral_data_t addr_tag = (rand()%(2*_param->_associativity)) << _param->_shift_tag ; |
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| 73 | Tgeneral_data_t addr_index = (index &_param->_mask_bank ) << _param->_shift_bank ; |
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| 74 | Tgeneral_data_t addr_offset = (rand()&_param->_mask_offset ) << _param->_shift_offset; |
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| 75 | |
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| 76 | LABEL("gen_addr (tag, index, offset) : %.8x %.8x %.8x",addr_tag, addr_index, addr_offset); |
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| 77 | |
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| 78 | return (addr_tag | |
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| 79 | addr_index | |
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| 80 | addr_offset ); |
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| 81 | } |
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| 82 | |
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| 83 | |
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| 84 | void test (string name, |
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| 85 | morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param) |
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| 86 | { |
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| 87 | msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); |
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| 88 | |
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| 89 | #ifdef STATISTICS |
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| 90 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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| 91 | #endif |
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| 92 | |
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[82] | 93 | Branch_Target_Buffer_Register * _Branch_Target_Buffer_Register = new Branch_Target_Buffer_Register |
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| 94 | (name.c_str(), |
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[78] | 95 | #ifdef STATISTICS |
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[82] | 96 | _parameters_statistics, |
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[78] | 97 | #endif |
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[82] | 98 | _param, |
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| 99 | USE_ALL); |
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[78] | 100 | |
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| 101 | #ifdef SYSTEMC |
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| 102 | /********************************************************************* |
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| 103 | * Déclarations des signaux |
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| 104 | *********************************************************************/ |
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| 105 | string rename; |
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| 106 | |
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| 107 | sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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| 108 | sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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| 109 | |
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| 110 | ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_predict); |
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| 111 | ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_predict); |
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| 112 | ALLOC1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ," in_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict); |
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| 113 | ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS ," in_PREDICT_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_predict); |
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| 114 | ALLOC2_SC_SIGNAL(out_PREDICT_HIT ,"out_PREDICT_HIT ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); |
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| 115 | ALLOC2_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_predict,_param->_associativity); |
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| 116 | ALLOC2_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_predict,_param->_associativity); |
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| 117 | ALLOC2_SC_SIGNAL(out_PREDICT_CONDITION ,"out_PREDICT_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict,_param->_associativity); |
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| 118 | ALLOC2_SC_SIGNAL(out_PREDICT_LAST_TAKE ,"out_PREDICT_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); |
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| 119 | ALLOC2_SC_SIGNAL(out_PREDICT_IS_ACCURATE ,"out_PREDICT_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); |
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| 120 | ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod); |
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| 121 | ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod); |
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| 122 | ALLOC1_SC_SIGNAL(out_DECOD_HIT ,"out_DECOD_HIT ",Tcontrol_t ,_param->_nb_inst_decod); |
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| 123 | ALLOC1_SC_SIGNAL(out_DECOD_HIT_INDEX ,"out_DECOD_HIT_INDEX ",Tptr_t ,_param->_nb_inst_decod); |
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| 124 | ALLOC1_SC_SIGNAL( in_DECOD_VICTIM ," in_DECOD_VICTIM ",Tptr_t ,_param->_nb_inst_decod); |
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| 125 | ALLOC1_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); |
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| 126 | ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod); |
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| 127 | ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_DEST ," in_DECOD_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod); |
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| 128 | ALLOC1_SC_SIGNAL( in_DECOD_CONDITION ," in_DECOD_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod); |
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| 129 | ALLOC1_SC_SIGNAL( in_DECOD_LAST_TAKE ," in_DECOD_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_decod); |
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| 130 | ALLOC1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ," in_DECOD_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_decod); |
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[82] | 131 | ALLOC1_SC_SIGNAL( in_DECOD_IS_ACCURATE ," in_DECOD_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_decod); |
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[78] | 132 | ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update); |
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| 133 | ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t ,_param->_nb_inst_update); |
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| 134 | ALLOC1_SC_SIGNAL(out_UPDATE_HIT ,"out_UPDATE_HIT ",Tcontrol_t ,_param->_nb_inst_update); |
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| 135 | ALLOC1_SC_SIGNAL(out_UPDATE_HIT_INDEX ,"out_UPDATE_HIT_INDEX ",Tptr_t ,_param->_nb_inst_update); |
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| 136 | ALLOC1_SC_SIGNAL( in_UPDATE_VICTIM ," in_UPDATE_VICTIM ",Tptr_t ,_param->_nb_inst_update); |
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| 137 | ALLOC1_SC_SIGNAL( in_UPDATE_CONTEXT_ID ," in_UPDATE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_update); |
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| 138 | ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_SRC ," in_UPDATE_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_update); |
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| 139 | ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_DEST ," in_UPDATE_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_update); |
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| 140 | ALLOC1_SC_SIGNAL( in_UPDATE_CONDITION ," in_UPDATE_CONDITION ",Tbranch_condition_t,_param->_nb_inst_update); |
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| 141 | ALLOC1_SC_SIGNAL( in_UPDATE_LAST_TAKE ," in_UPDATE_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_update); |
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| 142 | ALLOC1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION," in_UPDATE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_update); |
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| 143 | |
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| 144 | /******************************************************** |
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| 145 | * Instanciation |
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| 146 | ********************************************************/ |
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| 147 | |
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| 148 | msg(_("<%s> : Instanciation of _Branch_Target_Buffer_Register.\n"),name.c_str()); |
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| 149 | |
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| 150 | (*(_Branch_Target_Buffer_Register->in_CLOCK)) (*(in_CLOCK)); |
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| 151 | (*(_Branch_Target_Buffer_Register->in_NRESET)) (*(in_NRESET)); |
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| 152 | |
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| 153 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_PREDICT_VAL ,_param->_nb_inst_predict); |
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| 154 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_ACK ,_param->_nb_inst_predict); |
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| 155 | if (_param->_have_port_context_id) |
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| 156 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict); |
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| 157 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_PREDICT_ADDRESS ,_param->_nb_inst_predict); |
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| 158 | INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_HIT ,_param->_nb_inst_predict,_param->_associativity); |
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| 159 | INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_predict,_param->_associativity); |
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| 160 | INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_predict,_param->_associativity); |
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| 161 | INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_CONDITION ,_param->_nb_inst_predict,_param->_associativity); |
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| 162 | INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_LAST_TAKE ,_param->_nb_inst_predict,_param->_associativity); |
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| 163 | INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_IS_ACCURATE ,_param->_nb_inst_predict,_param->_associativity); |
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| 164 | |
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| 165 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_VAL ,_param->_nb_inst_decod); |
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| 166 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_DECOD_ACK ,_param->_nb_inst_decod); |
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[82] | 167 | if (_param->_have_port_victim) |
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| 168 | { |
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[78] | 169 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_DECOD_HIT ,_param->_nb_inst_decod); |
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| 170 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_DECOD_HIT_INDEX ,_param->_nb_inst_decod); |
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| 171 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_VICTIM ,_param->_nb_inst_decod); |
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[82] | 172 | } |
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[78] | 173 | if (_param->_have_port_context_id) |
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| 174 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod); |
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| 175 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_ADDRESS_SRC ,_param->_nb_inst_decod); |
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| 176 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_ADDRESS_DEST ,_param->_nb_inst_decod); |
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| 177 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_CONDITION ,_param->_nb_inst_decod); |
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| 178 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_LAST_TAKE ,_param->_nb_inst_decod); |
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| 179 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod); |
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[82] | 180 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_IS_ACCURATE ,_param->_nb_inst_decod); |
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[78] | 181 | |
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| 182 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_VAL ,_param->_nb_inst_update); |
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| 183 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_UPDATE_ACK ,_param->_nb_inst_update); |
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[82] | 184 | if (_param->_have_port_victim) |
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| 185 | { |
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[78] | 186 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_UPDATE_HIT ,_param->_nb_inst_update); |
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| 187 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_UPDATE_HIT_INDEX ,_param->_nb_inst_update); |
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| 188 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_VICTIM ,_param->_nb_inst_update); |
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[82] | 189 | } |
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[78] | 190 | if (_param->_have_port_context_id) |
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| 191 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_CONTEXT_ID ,_param->_nb_inst_update); |
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| 192 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_ADDRESS_SRC ,_param->_nb_inst_update); |
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| 193 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_ADDRESS_DEST ,_param->_nb_inst_update); |
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| 194 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_CONDITION ,_param->_nb_inst_update); |
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| 195 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_LAST_TAKE ,_param->_nb_inst_update); |
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| 196 | INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_MISS_PREDICTION,_param->_nb_inst_update); |
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| 197 | |
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| 198 | msg(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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| 199 | |
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| 200 | Time * _time = new Time(); |
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| 201 | |
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| 202 | /******************************************************** |
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| 203 | * Simulation - Begin |
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| 204 | ********************************************************/ |
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| 205 | |
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| 206 | // Initialisation |
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| 207 | |
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| 208 | const uint32_t seed = 0; |
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| 209 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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| 210 | |
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| 211 | srand(seed); |
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| 212 | |
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| 213 | const int32_t percent_transaction_predict = 75; |
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| 214 | const int32_t percent_transaction_decod = 75; |
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| 215 | const int32_t percent_transaction_update = 75; |
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| 216 | |
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| 217 | uint32_t num_index = 0; |
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| 218 | entry_t tab_old [_param->_associativity]; |
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| 219 | entry_t tab [_param->_associativity]; |
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| 220 | |
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| 221 | for (uint32_t i=0; i<_param->_associativity; i++) |
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| 222 | tab[i]._val = false; |
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| 223 | |
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| 224 | SC_START(0); |
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| 225 | LABEL("Initialisation"); |
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| 226 | |
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| 227 | for (uint32_t i=0; i<_param->_nb_inst_predict; i++) |
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| 228 | in_PREDICT_VAL [i]->write(0); |
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| 229 | for (uint32_t i=0; i<_param->_nb_inst_decod ; i++) |
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| 230 | in_DECOD_VAL [i]->write(0); |
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| 231 | for (uint32_t i=0; i<_param->_nb_inst_update ; i++) |
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| 232 | in_UPDATE_VAL [i]->write(0); |
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| 233 | |
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| 234 | LABEL("Reset"); |
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| 235 | in_NRESET->write(0); |
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| 236 | SC_START(5); |
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| 237 | in_NRESET->write(1); |
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| 238 | |
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| 239 | LABEL("Loop of Test"); |
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| 240 | |
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| 241 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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| 242 | { |
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| 243 | LABEL("Iteration %d",iteration); |
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| 244 | |
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| 245 | for (uint32_t j=0; j<_param->_associativity; j++) |
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| 246 | tab[j].print(); |
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| 247 | |
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| 248 | for (uint32_t i=0; i<_param->_nb_inst_predict; i++) |
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| 249 | { |
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| 250 | Tgeneral_data_t addr; |
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| 251 | uint32_t j = rand()%_param->_associativity; |
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| 252 | |
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| 253 | if ( ((rand()%100)<percent_transaction_predict) and |
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| 254 | tab [j]._val) |
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| 255 | addr = tab [j]._address_src; |
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| 256 | else |
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| 257 | addr = gen_addr(_param, num_index); |
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| 258 | |
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| 259 | in_PREDICT_VAL [i]->write((rand()%100)<percent_transaction_predict); |
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| 260 | in_PREDICT_CONTEXT_ID [i]->write(rand()%_param->_nb_context); |
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| 261 | in_PREDICT_ADDRESS [i]->write(addr); |
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| 262 | } |
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| 263 | |
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| 264 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 265 | { |
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| 266 | Tgeneral_data_t addr = gen_addr(_param, num_index); |
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| 267 | |
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| 268 | in_DECOD_VAL [i]->write((rand()%100)<percent_transaction_decod); |
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| 269 | in_DECOD_VICTIM [i]->write(rand()%_param->_associativity); |
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| 270 | in_DECOD_CONTEXT_ID [i]->write(rand()%_param->_nb_context); |
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| 271 | in_DECOD_ADDRESS_SRC [i]->write(addr); |
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| 272 | in_DECOD_ADDRESS_DEST [i]->write(~addr); |
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| 273 | in_DECOD_CONDITION [i]->write((addr&1)?BRANCH_CONDITION_FLAG_SET:BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK); |
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| 274 | in_DECOD_LAST_TAKE [i]->write(rand()%2); |
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| 275 | in_DECOD_MISS_PREDICTION [i]->write(rand()%2); |
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[82] | 276 | in_DECOD_IS_ACCURATE [i]->write(rand()%2); |
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[78] | 277 | } |
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| 278 | |
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| 279 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
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| 280 | { |
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| 281 | Tgeneral_data_t addr = gen_addr(_param, num_index); |
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| 282 | |
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| 283 | in_UPDATE_VAL [i]->write((rand()%100)<percent_transaction_update); |
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| 284 | in_UPDATE_VICTIM [i]->write(rand()%_param->_associativity); |
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| 285 | in_UPDATE_CONTEXT_ID [i]->write(rand()%_param->_nb_context); |
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| 286 | in_UPDATE_ADDRESS_SRC [i]->write(addr); |
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| 287 | in_UPDATE_ADDRESS_DEST [i]->write(~addr); |
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| 288 | in_UPDATE_CONDITION [i]->write((addr&1)?BRANCH_CONDITION_FLAG_SET:BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK); |
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| 289 | in_UPDATE_LAST_TAKE [i]->write(rand()%2); |
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| 290 | in_UPDATE_MISS_PREDICTION [i]->write(rand()%2); |
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| 291 | } |
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| 292 | |
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| 293 | SC_START(0); |
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| 294 | |
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| 295 | for (uint32_t i=0; i<_param->_associativity; i++) |
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| 296 | tab_old [i] = tab [i]; |
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| 297 | |
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| 298 | for (uint32_t i=0; i<_param->_nb_inst_predict ; i++) |
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| 299 | if (in_PREDICT_VAL [i]->read() and out_PREDICT_ACK [i]->read()) |
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| 300 | { |
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| 301 | LABEL("PREDICT [%d] : Transaction accepted",i); |
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| 302 | LABEL(" * context : %d" ,in_PREDICT_CONTEXT_ID [i]->read()); |
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| 303 | LABEL(" * address : %.8x",in_PREDICT_ADDRESS [i]->read()); |
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| 304 | |
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| 305 | Tcontext_t ctxt = in_PREDICT_CONTEXT_ID [i]->read(); |
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| 306 | Tgeneral_data_t addr = in_PREDICT_ADDRESS [i]->read(); |
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| 307 | |
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| 308 | for (uint32_t j=0; j<_param->_associativity; j++) |
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| 309 | { |
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| 310 | LABEL(" * [%d]",j); |
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| 311 | |
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| 312 | bool hit = tab_old[j].hit(_param, addr, ctxt); |
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| 313 | TEST(Tcontrol_t , out_PREDICT_HIT [i][j]->read(), hit); |
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| 314 | |
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| 315 | if (tab_old[j]._val) |
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| 316 | { |
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| 317 | Tgeneral_data_t addr_src = tab_old[j]._address_src; |
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| 318 | |
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| 319 | TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [i][j]->read(), addr_src); |
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| 320 | TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [i][j]->read(), ~addr_src); |
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| 321 | TEST(Tbranch_condition_t, out_PREDICT_CONDITION [i][j]->read(), ((addr_src&1)?BRANCH_CONDITION_FLAG_SET:BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK)); |
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| 322 | TEST(Tcontrol_t , out_PREDICT_LAST_TAKE [i][j]->read(), tab_old[j]._last_take); |
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| 323 | // TEST(Tcontrol_t , out_PREDICT_IS_ACCURATE [i][j]->read(), ); |
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| 324 | } |
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| 325 | } |
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| 326 | } |
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| 327 | |
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| 328 | for (uint32_t i=0; i<_param->_nb_inst_decod ; i++) |
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| 329 | if (in_DECOD_VAL [i]->read() and out_DECOD_ACK [i]->read()) |
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| 330 | { |
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| 331 | LABEL("DECOD [%d] : Transaction accepted",i); |
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| 332 | LABEL(" * context : %d" ,in_DECOD_CONTEXT_ID [i]->read()); |
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| 333 | LABEL(" * address_src : %.8x",in_DECOD_ADDRESS_SRC [i]->read()); |
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| 334 | |
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| 335 | bool hit = false; |
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| 336 | |
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| 337 | for (uint32_t j=0; j<_param->_associativity; j++) |
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| 338 | hit |= ((tab_old[j]._val == 1) and |
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| 339 | (tab_old[j]._context == in_DECOD_CONTEXT_ID [i]->read()) and |
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| 340 | (tab_old[j]._address_src == in_DECOD_ADDRESS_SRC [i]->read())); |
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| 341 | |
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| 342 | if (not hit) |
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| 343 | { |
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| 344 | Tptr_t k = in_DECOD_VICTIM [i]->read(); |
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| 345 | |
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| 346 | LABEL(" * miss"); |
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| 347 | LABEL(" * victim : %d",k); |
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| 348 | |
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| 349 | tab[k]._val = 1; |
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| 350 | tab[k]._context = in_DECOD_CONTEXT_ID [i]->read(); |
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| 351 | tab[k]._address_src = in_DECOD_ADDRESS_SRC [i]->read(); |
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| 352 | tab[k]._address_dest_val = in_DECOD_CONDITION [i]->read() == BRANCH_CONDITION_FLAG_SET; |
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| 353 | tab[k]._address_dest = in_DECOD_ADDRESS_DEST[i]->read(); |
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| 354 | tab[k]._condition = in_DECOD_CONDITION [i]->read(); |
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| 355 | tab[k]._last_take = in_DECOD_LAST_TAKE [i]->read(); |
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| 356 | //tab[k]._accurate = _param->_first_accurate_if_hit; |
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| 357 | } |
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| 358 | else |
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| 359 | { |
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| 360 | LABEL(" * miss"); |
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| 361 | } |
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| 362 | |
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| 363 | TEST(Tcontrol_t, out_DECOD_HIT [i]->read(), hit); |
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| 364 | } |
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| 365 | |
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| 366 | for (uint32_t i=0; i<_param->_nb_inst_update ; i++) |
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| 367 | if (in_UPDATE_VAL [i]->read() and out_UPDATE_ACK [i]->read()) |
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| 368 | { |
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| 369 | LABEL("UPDATE [%d] : Transaction accepted",i); |
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| 370 | LABEL(" * context : %d" ,in_UPDATE_CONTEXT_ID [i]->read()); |
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| 371 | LABEL(" * address_src : %.8x",in_UPDATE_ADDRESS_SRC [i]->read()); |
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| 372 | |
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| 373 | bool hit = false; |
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| 374 | |
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| 375 | Tptr_t k = 0; |
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| 376 | for (uint32_t j=0; j<_param->_associativity; j++) |
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| 377 | { |
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| 378 | hit |= ((tab_old[j]._val == 1) and |
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| 379 | (tab_old[j]._context == in_UPDATE_CONTEXT_ID [i]->read()) and |
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| 380 | (tab_old[j]._address_src == in_UPDATE_ADDRESS_SRC [i]->read())); |
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| 381 | if (hit) |
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| 382 | { |
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| 383 | k = j; |
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| 384 | break; |
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| 385 | } |
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| 386 | } |
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| 387 | |
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| 388 | if (not hit) |
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| 389 | { |
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| 390 | k = in_UPDATE_VICTIM [i]->read(); |
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| 391 | |
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| 392 | LABEL(" * miss"); |
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| 393 | LABEL(" * victim : %d",k); |
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| 394 | |
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| 395 | tab[k]._val = 1; |
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| 396 | tab[k]._context = in_UPDATE_CONTEXT_ID [i]->read(); |
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| 397 | tab[k]._address_src = in_UPDATE_ADDRESS_SRC [i]->read(); |
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| 398 | tab[k]._address_dest_val = 1; |
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| 399 | tab[k]._address_dest = in_UPDATE_ADDRESS_DEST[i]->read(); |
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| 400 | tab[k]._condition = in_UPDATE_CONDITION [i]->read(); |
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| 401 | tab[k]._last_take = in_UPDATE_LAST_TAKE [i]->read(); |
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| 402 | //tab[k]._accurate = (in_UPDATE_MISS_PREDICTION [i]->read())?_param->_first_accurate_if_miss:_param->_first_accurate_if_hit; |
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| 403 | } |
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| 404 | else |
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| 405 | { |
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| 406 | LABEL(" * hit"); |
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| 407 | LABEL(" * update : %d",k); |
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| 408 | |
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| 409 | tab[k]._val = 1; |
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| 410 | tab[k]._context = in_UPDATE_CONTEXT_ID [i]->read(); |
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| 411 | tab[k]._address_src = in_UPDATE_ADDRESS_SRC [i]->read(); |
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| 412 | tab[k]._address_dest_val = 1; |
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| 413 | tab[k]._address_dest = in_UPDATE_ADDRESS_DEST[i]->read(); |
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| 414 | tab[k]._condition = in_UPDATE_CONDITION [i]->read(); |
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| 415 | tab[k]._last_take = in_UPDATE_LAST_TAKE [i]->read(); |
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| 416 | //tab[k]._accurate = (in_UPDATE_MISS_PREDICTION [i]->read())?_param->_first_accurate_if_miss:_param->_first_accurate_if_hit; |
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| 417 | } |
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| 418 | |
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| 419 | TEST(Tcontrol_t, out_UPDATE_HIT [i]->read(), hit); |
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| 420 | } |
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| 421 | |
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| 422 | SC_START(1); |
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| 423 | } |
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| 424 | |
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| 425 | /******************************************************** |
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| 426 | * Simulation - End |
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| 427 | ********************************************************/ |
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| 428 | |
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| 429 | TEST_OK ("End of Simulation"); |
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| 430 | delete _time; |
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| 431 | |
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| 432 | msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
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| 433 | |
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| 434 | delete in_CLOCK; |
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| 435 | delete in_NRESET; |
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| 436 | |
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| 437 | delete [] in_PREDICT_VAL ; |
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| 438 | delete [] out_PREDICT_ACK ; |
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| 439 | delete [] in_PREDICT_CONTEXT_ID ; |
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| 440 | delete [] in_PREDICT_ADDRESS ; |
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| 441 | delete [] out_PREDICT_HIT ; |
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| 442 | delete [] out_PREDICT_ADDRESS_SRC ; |
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| 443 | delete [] out_PREDICT_ADDRESS_DEST ; |
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| 444 | delete [] out_PREDICT_CONDITION ; |
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| 445 | delete [] out_PREDICT_LAST_TAKE ; |
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| 446 | delete [] out_PREDICT_IS_ACCURATE ; |
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| 447 | delete [] in_DECOD_VAL ; |
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| 448 | delete [] out_DECOD_ACK ; |
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| 449 | delete [] out_DECOD_HIT ; |
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| 450 | delete [] out_DECOD_HIT_INDEX ; |
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| 451 | delete [] in_DECOD_VICTIM ; |
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| 452 | delete [] in_DECOD_CONTEXT_ID ; |
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| 453 | delete [] in_DECOD_ADDRESS_SRC ; |
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| 454 | delete [] in_DECOD_ADDRESS_DEST ; |
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| 455 | delete [] in_DECOD_CONDITION ; |
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| 456 | delete [] in_DECOD_LAST_TAKE ; |
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| 457 | delete [] in_DECOD_MISS_PREDICTION ; |
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[82] | 458 | delete [] in_DECOD_IS_ACCURATE ; |
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[78] | 459 | delete [] in_UPDATE_VAL ; |
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| 460 | delete [] out_UPDATE_ACK ; |
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| 461 | delete [] out_UPDATE_HIT ; |
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| 462 | delete [] out_UPDATE_HIT_INDEX ; |
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| 463 | delete [] in_UPDATE_VICTIM ; |
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| 464 | delete [] in_UPDATE_CONTEXT_ID ; |
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| 465 | delete [] in_UPDATE_ADDRESS_SRC ; |
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| 466 | delete [] in_UPDATE_ADDRESS_DEST ; |
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| 467 | delete [] in_UPDATE_CONDITION ; |
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| 468 | delete [] in_UPDATE_LAST_TAKE ; |
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| 469 | delete [] in_UPDATE_MISS_PREDICTION; |
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| 470 | |
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| 471 | #endif |
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| 472 | |
---|
| 473 | delete _Branch_Target_Buffer_Register; |
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| 474 | #ifdef STATISTICS |
---|
| 475 | delete _parameters_statistics; |
---|
| 476 | #endif |
---|
| 477 | } |
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