source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_allocation.cpp @ 78

Last change on this file since 78 was 78, checked in by rosiere, 16 years ago

Add :

  • Execute_loop (must be test systemC)
  • Prediction
    • Direction : predifined scheme
    • Branch Target Buffer
  • iFetch_unit
    • ifetch_queue
    • pc management
  • Decod_unit
    • coming soon : support for custom operation
  • Rename_unit
    • RAT
    • Free_list
    • Dependence RAW check
    • Load store unit pointer
  • New Environnement (hierarchy_memory will remove in a next version)


Modif :

  • Manage Custom Operation
  • All component in execute_loop to use the new statistics management

Not Finish :

  • Return Address Stack
  • Environnement
File size: 6.4 KB
Line 
1/*
2 * $Id$
3 *
4 * [ Description ]
5 *
6 */
7
8#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h"
9#include "Behavioural/include/Allocation.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace core {
14namespace multi_front_end {
15namespace front_end {
16namespace prediction_unit {
17namespace branch_target_buffer {
18namespace branch_target_buffer_register {
19
20
21
22#undef  FUNCTION
23#define FUNCTION "Branch_Target_Buffer_Register::allocation"
24  void Branch_Target_Buffer_Register::allocation (
25#ifdef STATISTICS
26                               morpheo::behavioural::Parameters_Statistics * param_statistics
27#else
28                               void
29#endif
30                               )
31  {
32    log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin");
33
34    _component   = new Component (_usage);
35
36    Entity * entity = _component->set_entity (_name       
37                                              ,"Branch_Target_Buffer_Register"
38#ifdef POSITION
39                                              ,COMBINATORY
40#endif
41                                              );
42
43    _interfaces = entity->set_interfaces();
44
45    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
46    {
47      Interface * interface = _interfaces->set_interface(""
48#ifdef POSITION
49                                                         ,IN
50                                                         ,SOUTH,
51                                                         "Generalist interface"
52#endif
53                                                         );
54     
55      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
56      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
57    }
58
59    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
60    {
61      ALLOC1_INTERFACE("predict", IN, SOUTH, "Compute next pc.", _param->_nb_inst_predict);
62
63      ALLOC1_VALACK_IN ( in_PREDICT_VAL         ,VAL);
64      ALLOC1_VALACK_OUT(out_PREDICT_ACK         ,ACK);
65      ALLOC1_SIGNAL_IN ( in_PREDICT_CONTEXT_ID  ,"context_id"  ,Tcontext_t         ,_param->_size_context_id);
66      ALLOC1_SIGNAL_IN ( in_PREDICT_ADDRESS     ,"address"     ,Tgeneral_data_t    ,_param->_size_address);
67
68      {
69        ALLOC2_INTERFACE("predict", OUT, SOUTH, "Compute next pc.", _param->_nb_inst_predict, _param->_associativity);
70 
71        ALLOC2_SIGNAL_OUT(out_PREDICT_HIT         ,"hit"         ,Tcontrol_t         ,1);
72        ALLOC2_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t    ,_param->_size_address);
73        ALLOC2_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST,"address_dest",Tgeneral_data_t    ,_param->_size_address);
74        ALLOC2_SIGNAL_OUT(out_PREDICT_CONDITION   ,"condition"   ,Tbranch_condition_t,_param->_size_branch_state);
75        ALLOC2_SIGNAL_OUT(out_PREDICT_LAST_TAKE   ,"last_take"   ,Tcontrol_t         ,1);
76        ALLOC2_SIGNAL_OUT(out_PREDICT_IS_ACCURATE ,"is_accurate" ,Tcontrol_t         ,1);
77      }
78    }
79
80    // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
81    {
82      ALLOC1_INTERFACE("decod", IN, SOUTH, "decod instruction", _param->_nb_inst_decod);
83
84      ALLOC1_VALACK_IN ( in_DECOD_VAL            ,VAL);
85      ALLOC1_VALACK_OUT(out_DECOD_ACK            ,ACK);
86      ALLOC1_SIGNAL_OUT(out_DECOD_HIT            ,"hit"            ,Tcontrol_t         ,1);
87      ALLOC1_SIGNAL_OUT(out_DECOD_HIT_INDEX      ,"hit_index"      ,Tptr_t             ,_param->_size_victim);
88      ALLOC1_SIGNAL_IN ( in_DECOD_VICTIM         ,"victim"         ,Tptr_t             ,_param->_size_victim);
89      ALLOC1_SIGNAL_IN ( in_DECOD_CONTEXT_ID     ,"context_id"     ,Tcontext_t         ,_param->_size_context_id);
90      ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_SRC    ,"address_src"    ,Tgeneral_data_t    ,_param->_size_address);
91      ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_DEST   ,"address_dest"   ,Tgeneral_data_t    ,_param->_size_address);
92      ALLOC1_SIGNAL_IN ( in_DECOD_CONDITION      ,"condition"      ,Tbranch_condition_t,_param->_size_branch_state);
93      ALLOC1_SIGNAL_IN ( in_DECOD_LAST_TAKE      ,"last_take"      ,Tcontrol_t         ,1);
94      ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION,"miss_prediction",Tcontrol_t         ,1);
95    }
96
97    // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
98    {
99      ALLOC1_INTERFACE("update", IN, SOUTH, "update instruction", _param->_nb_inst_update);
100
101      ALLOC1_VALACK_IN ( in_UPDATE_VAL            ,VAL);
102      ALLOC1_VALACK_OUT(out_UPDATE_ACK            ,ACK);
103      ALLOC1_SIGNAL_OUT(out_UPDATE_HIT            ,"hit"            ,Tcontrol_t         ,1);
104      ALLOC1_SIGNAL_OUT(out_UPDATE_HIT_INDEX      ,"hit_index"      ,Tptr_t             ,_param->_size_victim);
105      ALLOC1_SIGNAL_IN ( in_UPDATE_VICTIM         ,"victim"         ,Tptr_t             ,_param->_size_victim);
106      ALLOC1_SIGNAL_IN ( in_UPDATE_CONTEXT_ID     ,"context_id"     ,Tcontext_t         ,_param->_size_context_id);
107      ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_SRC    ,"address_src"    ,Tgeneral_data_t    ,_param->_size_address);
108      ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_DEST   ,"address_dest"   ,Tgeneral_data_t    ,_param->_size_address);
109      ALLOC1_SIGNAL_IN ( in_UPDATE_CONDITION      ,"condition"      ,Tbranch_condition_t,_param->_size_branch_state);
110      ALLOC1_SIGNAL_IN ( in_UPDATE_LAST_TAKE      ,"last_take"      ,Tcontrol_t         ,1);
111      ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION,"miss_prediction",Tcontrol_t         ,1);
112    }
113
114    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
115    reg_BTB = new btb_entry_t * [_param->_size_bank];
116    for (uint32_t i=0; i<_param->_size_bank; i++)
117      reg_BTB [i] = new btb_entry_t [_param->_associativity];
118
119    internal_DECOD_ACK        = new Tcontrol_t [_param->_nb_inst_decod];
120    internal_DECOD_HIT        = new Tcontrol_t [_param->_nb_inst_decod];
121    internal_DECOD_NUM_BANK   = new uint32_t   [_param->_nb_inst_decod];
122    internal_DECOD_NUM_ENTRY  = new uint32_t   [_param->_nb_inst_decod];
123
124    internal_UPDATE_ACK       = new Tcontrol_t [_param->_nb_inst_update];
125    internal_UPDATE_HIT       = new Tcontrol_t [_param->_nb_inst_update];
126    internal_UPDATE_NUM_BANK  = new uint32_t   [_param->_nb_inst_update];
127    internal_UPDATE_NUM_ENTRY = new uint32_t   [_param->_nb_inst_update];
128
129    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
130
131#ifdef POSITION
132    _component->generate_file();
133#endif
134
135    log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End");
136  };
137
138}; // end namespace branch_target_buffer_register
139}; // end namespace branch_target_buffer
140}; // end namespace prediction_unit
141}; // end namespace front_end
142}; // end namespace multi_front_end
143}; // end namespace core
144
145}; // end namespace behavioural
146}; // end namespace morpheo             
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