[78] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Branch_Target_Buffer_Register_genMealy_predict.cpp 81 2008-04-15 18:40:01Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace prediction_unit { |
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| 17 | namespace branch_target_buffer { |
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| 18 | namespace branch_target_buffer_register { |
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| 19 | |
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| 20 | #undef FUNCTION |
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| 21 | #define FUNCTION "Branch_Target_Buffer_Register::genMealy_predict" |
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| 22 | void Branch_Target_Buffer_Register::genMealy_predict (void) |
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| 23 | { |
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| 24 | log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); |
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| 25 | |
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| 26 | for (uint32_t i=0; i<_param->_nb_inst_predict; i++) |
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| 27 | { |
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| 28 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; |
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| 29 | Tgeneral_data_t address = PORT_READ(in_PREDICT_ADDRESS [i]); |
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| 30 | uint32_t num_bank = (address>>_param->_shift_bank)&_param->_mask_bank; |
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| 31 | |
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| 32 | Tgeneral_data_t address_tag = address >> _param->_shift_tag ; |
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| 33 | Tgeneral_data_t address_offset = (address >> _param->_shift_offset)&_param->_mask_offset; |
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| 34 | |
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| 35 | // log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION,"address_ (tag, bank, offset) : %.8x %.8x %.8x",address_tag,num_bank, address_offset); |
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| 36 | |
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| 37 | for (uint32_t j=0; j<_param->_associativity; j++) |
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| 38 | { |
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| 39 | Tgeneral_data_t address_src_tag = reg_BTB[num_bank][j]._address_src >> _param->_shift_tag ; |
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| 40 | Tgeneral_data_t address_src_offset = (reg_BTB[num_bank][j]._address_src >> _param->_shift_offset)&_param->_mask_offset; |
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| 41 | |
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| 42 | Tcontrol_t hit = ((reg_BTB[num_bank][j]._val == 1 ) and |
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| 43 | (reg_BTB[num_bank][j]._context == context ) and |
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| 44 | (address_src_tag == address_tag ) and |
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| 45 | //address_bank is the same |
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| 46 | (address_src_offset >= address_offset)); |
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| 47 | |
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| 48 | // log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION,"address_src (tag, bank, offset) : %.8x %.8x %.8x - hit : %d",address_src_tag,num_bank,address_src_offset, hit); |
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| 49 | |
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| 50 | // Hit : |
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| 51 | // * entry is valid |
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| 52 | // * context is the same |
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| 53 | // * address_src must be higher that the address, because the address lower is previous the current pc. |
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| 54 | PORT_WRITE(out_PREDICT_HIT [i][j],hit); |
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| 55 | PORT_WRITE(out_PREDICT_ADDRESS_SRC [i][j],reg_BTB[num_bank][j]._address_src ); |
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| 56 | PORT_WRITE(out_PREDICT_ADDRESS_DEST [i][j],reg_BTB[num_bank][j]._address_dest); |
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| 57 | PORT_WRITE(out_PREDICT_CONDITION [i][j],reg_BTB[num_bank][j]._condition ); |
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| 58 | PORT_WRITE(out_PREDICT_LAST_TAKE [i][j],reg_BTB[num_bank][j]._last_take ); |
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| 59 | PORT_WRITE(out_PREDICT_IS_ACCURATE [i][j],((reg_BTB[num_bank][j]._accurate >= _param->_accurate_limit) and |
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| 60 | (reg_BTB[num_bank][j]._address_dest_val == 1))); |
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| 61 | } |
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| 62 | } |
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| 63 | |
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| 64 | log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); |
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| 65 | }; |
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| 66 | |
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| 67 | }; // end namespace branch_target_buffer_register |
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| 68 | }; // end namespace branch_target_buffer |
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| 69 | }; // end namespace prediction_unit |
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| 70 | }; // end namespace front_end |
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| 71 | }; // end namespace multi_front_end |
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| 72 | }; // end namespace core |
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| 73 | |
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| 74 | }; // end namespace behavioural |
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| 75 | }; // end namespace morpheo |
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| 76 | #endif |
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