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test.cpp @ 88

Last change on this file since 88 was 88, checked in by rosiere, 16 years ago
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1	/*
2	* $Id: test.cpp 88 2008-12-10 18:31:39Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (10000*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14	#include "Behavioural/include/Allocation.h"
15	#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test_BTB.h"
16
17	void test (string name,
18	morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::Parameters * _param)
19	{
20	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
21
22	#ifdef STATISTICS
23	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
24	#endif
25
26	Tusage_t _usage = USE_ALL;
27
28	// _usage = usage_unset(_usage,USE_SYSTEMC );
29	// _usage = usage_unset(_usage,USE_VHDL );
30	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
31	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
32	// _usage = usage_unset(_usage,USE_POSITION );
33	// _usage = usage_unset(_usage,USE_STATISTICS );
34	// _usage = usage_unset(_usage,USE_INFORMATION );
35
36	Branch_Target_Buffer * _Branch_Target_Buffer = new Branch_Target_Buffer
37	(name.c_str(),
38	#ifdef STATISTICS
39	_parameters_statistics,
40	#endif
41	_param,
42	_usage);
43
44	#ifdef SYSTEMC
45	/*********************************************************************
46	* Déclarations des signaux
47	*********************************************************************/
48	string rename;
49
50	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
51	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
52
53	ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_predict);
54	ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_predict);
55	ALLOC1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ," in_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict);
56	ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS ," in_PREDICT_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_predict);
57	ALLOC1_SC_SIGNAL(out_PREDICT_HIT ,"out_PREDICT_HIT ",Tcontrol_t ,_param->_nb_inst_predict);
58	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_predict);
59	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_predict);
60	ALLOC1_SC_SIGNAL(out_PREDICT_CONDITION ,"out_PREDICT_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict);
61	ALLOC1_SC_SIGNAL(out_PREDICT_LAST_TAKE ,"out_PREDICT_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict);
62	ALLOC1_SC_SIGNAL(out_PREDICT_IS_ACCURATE ,"out_PREDICT_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict);
63	ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
64	ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
65	ALLOC1_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
66	ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod);
67	ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_DEST ," in_DECOD_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod);
68	ALLOC1_SC_SIGNAL( in_DECOD_CONDITION ," in_DECOD_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod);
69	ALLOC1_SC_SIGNAL( in_DECOD_LAST_TAKE ," in_DECOD_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_decod);
70	ALLOC1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ," in_DECOD_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_decod);
71	ALLOC1_SC_SIGNAL( in_DECOD_IS_ACCURATE ," in_DECOD_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_decod);
72	ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update);
73	ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t ,_param->_nb_inst_update);
74	ALLOC1_SC_SIGNAL( in_UPDATE_CONTEXT_ID ," in_UPDATE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_update);
75	ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_SRC ," in_UPDATE_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_update);
76	ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_DEST ," in_UPDATE_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_update);
77	ALLOC1_SC_SIGNAL( in_UPDATE_CONDITION ," in_UPDATE_CONDITION ",Tbranch_condition_t,_param->_nb_inst_update);
78	ALLOC1_SC_SIGNAL( in_UPDATE_LAST_TAKE ," in_UPDATE_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_update);
79	ALLOC1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION," in_UPDATE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_update);
80
81	/********************************************************
82	* Instanciation
83	********************************************************/
84
85	msg(_("<%s> : Instanciation of _Branch_Target_Buffer.\n"),name.c_str());
86
87	((_Branch_Target_Buffer->in_CLOCK)) ((in_CLOCK));
88	((_Branch_Target_Buffer->in_NRESET)) ((in_NRESET));
89
90	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_PREDICT_VAL ,_param->_nb_inst_predict);
91	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_ACK ,_param->_nb_inst_predict);
92	if (_param->_have_port_context_id)
93	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict);
94	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_PREDICT_ADDRESS ,_param->_nb_inst_predict);
95	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_HIT ,_param->_nb_inst_predict);
96	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_predict);
97	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_predict);
98	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_CONDITION ,_param->_nb_inst_predict);
99	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_LAST_TAKE ,_param->_nb_inst_predict);
100	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_IS_ACCURATE ,_param->_nb_inst_predict);
101	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_VAL ,_param->_nb_inst_decod);
102	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_DECOD_ACK ,_param->_nb_inst_decod);
103	if (_param->_have_port_context_id)
104	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
105	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_ADDRESS_SRC ,_param->_nb_inst_decod);
106	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_ADDRESS_DEST ,_param->_nb_inst_decod);
107	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_CONDITION ,_param->_nb_inst_decod);
108	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_LAST_TAKE ,_param->_nb_inst_decod);
109	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod);
110	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_IS_ACCURATE ,_param->_nb_inst_decod);
111	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_VAL ,_param->_nb_inst_update);
112	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_UPDATE_ACK ,_param->_nb_inst_update);
113	if (_param->_have_port_context_id)
114	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_CONTEXT_ID ,_param->_nb_inst_update);
115	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_ADDRESS_SRC ,_param->_nb_inst_update);
116	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_ADDRESS_DEST ,_param->_nb_inst_update);
117	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_CONDITION ,_param->_nb_inst_update);
118	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_LAST_TAKE ,_param->_nb_inst_update);
119	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_MISS_PREDICTION,_param->_nb_inst_update);
120
121	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
122
123	// Initialisation
124	const uint32_t seed = 0;
125	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
126
127	srand(seed);
128
129	const int32_t percent_transaction_decod = 75;
130	const int32_t percent_transaction_predict = 75;
131
132	SC_START(0);
133
134	Time * _time = new Time();
135
136	/********************************************************
137	* Simulation - Begin
138	********************************************************/
139
140	{
141	LABEL("Reset");
142	in_NRESET->write(0);
143	SC_START(5);
144	in_NRESET->write(1);
145
146	LABEL("Loop of Test");
147
148	Taddress_t btb_address [_param->_associativity];
149	Tcontext_t btb_context [_param->_associativity];
150
151	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
152	{
153	LABEL("Iteration %d",iteration);
154
155	// FIRST STEP - Test (without sort, with concurent access, same context)
156
157	// fill a btb line
158	#define NB_REQUEST (8*_param->_associativity)
159	uint32_t nb_request;
160	uint32_t index = rand()&_param->_param_branch_target_buffer_register->_mask_bank;
161	Tcontext_t context = rand()&_param->_nb_context;
162
163	for (uint32_t j=0; j<_param->_associativity; j++)
164	// btb_val [j] = false;
165	btb_address [j] = static_cast<Taddress_t>(-1);
166
167	{
168	uint32_t associativity = 0;
169
170	while (associativity < _param->_associativity)
171	{
172	for (uint32_t j=0; j<_param->_nb_inst_decod; j++)
173	{
174	Taddress_t address = ((associativity << _param->_param_branch_target_buffer_register->_shift_tag) \|
175	(index << _param->_param_branch_target_buffer_register->_shift_bank)\|
176	(0));
177
178	in_DECOD_VAL [j]->write(((rand()%100)<percent_transaction_decod) and ((associativity+j) < _param->_associativity));
179	in_DECOD_CONTEXT_ID [j]->write(context);
180	in_DECOD_ADDRESS_SRC [j]->write( address );
181	in_DECOD_ADDRESS_DEST [j]->write(~address );
182	in_DECOD_CONDITION [j]->write(BRANCH_CONDITION_FLAG_SET);
183	in_DECOD_LAST_TAKE [j]->write(address&1);
184	in_DECOD_MISS_PREDICTION [j]->write(1);
185	in_DECOD_IS_ACCURATE [j]->write(1);
186	}
187
188	SC_START(0);
189
190	for (uint32_t j=0; j<_param->_nb_inst_decod; j++)
191	if (in_DECOD_VAL [j]->read() and out_DECOD_ACK [j]->read())
192	{
193	LABEL("DECOD [%d] Transaction Accepted",j);
194
195	Taddress_t address = in_DECOD_ADDRESS_SRC [j]->read();
196
197	btb_address[associativity] = address;
198	btb_context[associativity] = context;
199	associativity ++;
200	}
201
202	SC_START(1);
203	}
204	}
205
206	nb_request = 0;
207
208	while (nb_request < NB_REQUEST)
209	{
210	for (uint32_t i=0; i<_param->_nb_inst_predict; i++)
211	{
212	in_PREDICT_VAL [i]->write(((rand()%100)<percent_transaction_predict));
213	in_PREDICT_CONTEXT_ID [i]->write(rand()&_param->_nb_context);
214	in_PREDICT_ADDRESS [i]->write(gen_addr(_param->_param_branch_target_buffer_register,index));
215	}
216
217	SC_START(0);
218
219	for (uint32_t i=0; i<_param->_nb_inst_predict; i++)
220	if (in_PREDICT_VAL [i]->read() and out_PREDICT_ACK [i]->read())
221	{
222	LABEL("PREDICT [%d] Transaction Accepted",i);
223
224	Tcontrol_t hit = out_PREDICT_HIT [i]->read();
225	Taddress_t address = in_PREDICT_ADDRESS [i]->read();
226	Taddress_t address_src = out_PREDICT_ADDRESS_SRC [i]->read();
227	Taddress_t address_dest = out_PREDICT_ADDRESS_DEST [i]->read();
228
229	Taddress_t tag = address >> _param->_param_branch_target_buffer_register->_shift_tag;
230
231	Tcontrol_t my_hit = false;
232	Tcontrol_t my_addr;
233
234	for (uint32_t i=0; i<_param->_associativity; i++)
235	{
236	Taddress_t btb_address [_param->_associativity];
237	Tcontext_t btb_context [_param->_associativity];
238	}
239
240	if (hit)
241	{
242	TEST(Tbranch_condition_t,out_PREDICT_CONDITION [i]->read(),BRANCH_CONDITION_FLAG_SET);
243	TEST(Tcontrol_t ,out_PREDICT_LAST_TAKE [i]->read(),address_src&1);
244	// TEST(Tcontrol_t ,out_PREDICT_IS_ACCURATE [i]->read(), );
245	}
246
247	nb_request ++;
248	}
249
250	SC_START(1);
251	}
252	}
253	}
254
255	/********************************************************
256	* Simulation - End
257	********************************************************/
258
259	TEST_OK ("End of Simulation");
260	delete _time;
261
262	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
263
264	delete in_CLOCK;
265	delete in_NRESET;
266
267	delete [] in_PREDICT_VAL ;
268	delete [] out_PREDICT_ACK ;
269	delete [] in_PREDICT_CONTEXT_ID ;
270	delete [] in_PREDICT_ADDRESS ;
271	delete [] out_PREDICT_HIT ;
272	delete [] out_PREDICT_ADDRESS_SRC ;
273	delete [] out_PREDICT_ADDRESS_DEST ;
274	delete [] out_PREDICT_CONDITION ;
275	delete [] out_PREDICT_LAST_TAKE ;
276	delete [] out_PREDICT_IS_ACCURATE ;
277
278	delete [] in_DECOD_VAL ;
279	delete [] out_DECOD_ACK ;
280	delete [] in_DECOD_CONTEXT_ID ;
281	delete [] in_DECOD_ADDRESS_SRC ;
282	delete [] in_DECOD_ADDRESS_DEST ;
283	delete [] in_DECOD_CONDITION ;
284	delete [] in_DECOD_LAST_TAKE ;
285	delete [] in_DECOD_MISS_PREDICTION ;
286	delete [] in_DECOD_IS_ACCURATE ;
287
288	delete [] in_UPDATE_VAL ;
289	delete [] out_UPDATE_ACK ;
290	delete [] in_UPDATE_CONTEXT_ID ;
291	delete [] in_UPDATE_ADDRESS_SRC ;
292	delete [] in_UPDATE_ADDRESS_DEST ;
293	delete [] in_UPDATE_CONDITION ;
294	delete [] in_UPDATE_LAST_TAKE ;
295	delete [] in_UPDATE_MISS_PREDICTION;
296	#endif
297
298	delete _Branch_Target_Buffer;
299	#ifdef STATISTICS
300	delete _parameters_statistics;
301	#endif
302	}

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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/src/test.cpp @ 88

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