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test.cpp @ 107

Last change on this file since 107 was 107, checked in by rosiere, 15 years ago
1) Fix test in Direction_Glue for Conditionnal Branch 2) Fix Instruction Address Compute
Property svn:keywords set to `Id`
File size: 28.2 KB

Line
1	/*
2	* $Id: test.cpp 107 2009-02-10 23:03:25Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 16
10	#define CYCLE_MAX (1024*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14	#include "Behavioural/include/Allocation.h"
15
16	void test (string name,
17	morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack::Parameters * _param)
18	{
19	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
20
21	#ifdef STATISTICS
22	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
23	#endif
24
25	Tusage_t _usage = USE_ALL;
26
27	// _usage = usage_unset(_usage,USE_SYSTEMC );
28	// _usage = usage_unset(_usage,USE_VHDL );
29	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
30	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
31	// _usage = usage_unset(_usage,USE_POSITION );
32	// _usage = usage_unset(_usage,USE_STATISTICS );
33	// _usage = usage_unset(_usage,USE_INFORMATION );
34
35	Return_Address_Stack * _Return_Address_Stack = new Return_Address_Stack
36	(name.c_str(),
37	#ifdef STATISTICS
38	_parameters_statistics,
39	#endif
40	_param,
41	_usage);
42
43	#ifdef SYSTEMC
44	/*********************************************************************
45	* Déclarations des signaux
46	*********************************************************************/
47	string rename;
48
49	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
50	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
51
52	ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t,_param->_nb_inst_predict);
53	ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t,_param->_nb_inst_predict);
54	ALLOC1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ," in_PREDICT_CONTEXT_ID ",Tcontext_t,_param->_nb_inst_predict);
55	ALLOC1_SC_SIGNAL(out_PREDICT_HIT ,"out_PREDICT_HIT ",Tcontrol_t,_param->_nb_inst_predict);
56	ALLOC1_SC_SIGNAL( in_PREDICT_PUSH ," in_PREDICT_PUSH ",Tcontrol_t,_param->_nb_inst_predict);
57	ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS_PUSH ," in_PREDICT_ADDRESS_PUSH ",Taddress_t,_param->_nb_inst_predict);
58	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_POP ,"out_PREDICT_ADDRESS_POP ",Taddress_t,_param->_nb_inst_predict);
59	ALLOC1_SC_SIGNAL(out_PREDICT_INDEX ,"out_PREDICT_INDEX ",Tptr_t ,_param->_nb_inst_predict);
60	ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t,_param->_nb_inst_decod );
61	ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t,_param->_nb_inst_decod );
62	ALLOC1_SC_SIGNAL( in_DECOD_PUSH ," in_DECOD_PUSH ",Tcontrol_t,_param->_nb_inst_decod );
63	ALLOC1_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t,_param->_nb_inst_decod );
64	ALLOC1_SC_SIGNAL(out_DECOD_HIT ,"out_DECOD_HIT ",Tcontrol_t,_param->_nb_inst_decod );
65	ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_PUSH ," in_DECOD_ADDRESS_PUSH ",Taddress_t,_param->_nb_inst_decod );
66	ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS_POP ,"out_DECOD_ADDRESS_POP ",Taddress_t,_param->_nb_inst_decod );
67	ALLOC1_SC_SIGNAL(out_DECOD_INDEX ,"out_DECOD_INDEX ",Tptr_t ,_param->_nb_inst_decod );
68	ALLOC1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ," in_DECOD_MISS_PREDICTION ",Tcontrol_t,_param->_nb_inst_decod );
69	ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t,_param->_nb_inst_update );
70	ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t,_param->_nb_inst_update );
71	ALLOC1_SC_SIGNAL( in_UPDATE_CONTEXT_ID ," in_UPDATE_CONTEXT_ID ",Tcontext_t,_param->_nb_inst_update );
72	ALLOC1_SC_SIGNAL( in_UPDATE_PUSH ," in_UPDATE_PUSH ",Tcontrol_t,_param->_nb_inst_update );
73	ALLOC1_SC_SIGNAL( in_UPDATE_FLUSH ," in_UPDATE_FLUSH ",Tcontrol_t,_param->_nb_inst_update );
74	ALLOC1_SC_SIGNAL( in_UPDATE_INDEX ," in_UPDATE_INDEX ",Tptr_t ,_param->_nb_inst_update );
75	ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS ," in_UPDATE_ADDRESS ",Taddress_t,_param->_nb_inst_update );
76	ALLOC1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION," in_UPDATE_MISS_PREDICTION",Tcontrol_t,_param->_nb_inst_update );
77	ALLOC1_SC_SIGNAL( in_UPDATE_PREDICTION_IFETCH," in_UPDATE_PREDICTION_IFETCH",Tcontrol_t,_param->_nb_inst_update );
78
79	/********************************************************
80	* Instanciation
81	********************************************************/
82
83	msg(_("<%s> : Instanciation of _Return_Address_Stack.\n"),name.c_str());
84
85	((_Return_Address_Stack->in_CLOCK)) ((in_CLOCK));
86	((_Return_Address_Stack->in_NRESET)) ((in_NRESET));
87
88	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_PREDICT_VAL ,_param->_nb_inst_predict);
89	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_PREDICT_ACK ,_param->_nb_inst_predict);
90	if (_param->_have_port_context_id)
91	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict);
92	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_PREDICT_HIT ,_param->_nb_inst_predict);
93	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_PREDICT_PUSH ,_param->_nb_inst_predict);
94	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_PREDICT_ADDRESS_PUSH ,_param->_nb_inst_predict);
95	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_PREDICT_ADDRESS_POP ,_param->_nb_inst_predict);
96	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_PREDICT_INDEX ,_param->_nb_inst_predict);
97	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_VAL ,_param->_nb_inst_decod );
98	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_DECOD_ACK ,_param->_nb_inst_decod );
99	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_PUSH ,_param->_nb_inst_decod );
100	if (_param->_have_port_context_id)
101	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod );
102	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_DECOD_HIT ,_param->_nb_inst_decod );
103	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_ADDRESS_PUSH ,_param->_nb_inst_decod );
104	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_DECOD_ADDRESS_POP ,_param->_nb_inst_decod );
105	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_DECOD_INDEX ,_param->_nb_inst_decod );
106	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod );
107	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_VAL ,_param->_nb_inst_update );
108	INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_UPDATE_ACK ,_param->_nb_inst_update );
109	if (_param->_have_port_context_id)
110	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_CONTEXT_ID ,_param->_nb_inst_update );
111	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_PUSH ,_param->_nb_inst_update );
112	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_FLUSH ,_param->_nb_inst_update );
113	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_INDEX ,_param->_nb_inst_update );
114	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_ADDRESS ,_param->_nb_inst_update );
115	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_MISS_PREDICTION,_param->_nb_inst_update );
116	INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_PREDICTION_IFETCH,_param->_nb_inst_update );
117
118	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
119
120	Time * _time = new Time();
121
122	/********************************************************
123	* Simulation - Begin
124	********************************************************/
125
126	// Initialisation
127	const bool test1 = true;
128	const bool test2 = true;
129	const bool test3 = true;
130	const bool test4 = true;
131
132	const uint32_t seed = 0;
133	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
134
135	srand(seed);
136
137	SC_START(0);
138	LABEL("Initialisation");
139
140	LABEL("Reset");
141	in_NRESET->write(0);
142	SC_START(5);
143	in_NRESET->write(1);
144
145	LABEL("Loop of Test");
146
147	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
148	{
149	LABEL("Iteration %d",iteration);
150
151	if (test1)
152	{
153	uint32_t port = rand()%_param->_nb_inst_predict;
154
155	LABEL("PREDICT - PUSH");
156
157	in_PREDICT_VAL [port]->write(1);
158	in_PREDICT_PUSH [port]->write(1);
159
160	for (uint32_t i=0; i<_param->_nb_context; i++)
161	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
162	{
163	in_PREDICT_CONTEXT_ID [port]->write(i);
164	in_PREDICT_ADDRESS_PUSH [port]->write(0xdeadbeef+j);
165
166	SC_START(0);
167
168	TEST(Tcontrol_t, out_PREDICT_ACK [port]->read(), 1);
169	TEST(Tptr_t , out_PREDICT_INDEX[port]->read(),(j+1)%_param->_size_queue[i]);
170
171	SC_START(1);
172
173	}
174	in_PREDICT_VAL [port]->write(0);
175
176	SC_START(1);
177
178	in_PREDICT_VAL [port]->write(1);
179	in_PREDICT_PUSH [port]->write(1);
180	for (uint32_t i=0; i<_param->_nb_context; i++)
181	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
182	{
183	in_PREDICT_CONTEXT_ID [port]->write(i);
184	in_PREDICT_ADDRESS_PUSH [port]->write(0x21071981+j);
185
186	SC_START(0);
187
188	TEST(Tcontrol_t, out_PREDICT_ACK [port]->read(), 1);
189	TEST(Tptr_t , out_PREDICT_INDEX [port]->read(),(j+1)%_param->_size_queue[i]);
190	TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port]->read(),0xdeadbeef+j);
191
192	SC_START(1);
193	}
194	in_PREDICT_VAL [port]->write(0);
195
196	LABEL("PREDICT - POP");
197
198	in_PREDICT_VAL [port]->write(1);
199	in_PREDICT_PUSH [port]->write(0);
200	for (uint32_t i=0; i<_param->_nb_context; i++)
201	for (uint32_t j=0; j< _param->_size_queue[i]; j++)
202	{
203	in_PREDICT_CONTEXT_ID [port]->write(i);
204	in_PREDICT_ADDRESS_PUSH [port]->write(0xbabedead);
205
206	SC_START(0);
207
208	TEST(Tcontrol_t, out_PREDICT_ACK [port]->read(), 1);
209	TEST(Tcontrol_t, out_PREDICT_HIT [port]->read(), 1);
210	uint32_t k=(_param->_size_queue[i]-j)%_param->_size_queue[i];
211	TEST(Tptr_t , out_PREDICT_INDEX [port]->read(), k);
212	TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port]->read(),(0x21071981+((k==0)?(_param->_size_queue[i]-1):(k-1))));
213
214	SC_START(1);
215	}
216	in_PREDICT_VAL [port]->write(0);
217
218	// Now, the stack is empty
219	}
220
221	if (test2)
222	{
223	uint32_t port = rand()%_param->_nb_inst_decod;
224
225	LABEL("DECOD - without predict");
226
227	LABEL("DECOD - PUSH");
228
229	in_DECOD_VAL [port]->write(1);
230	in_DECOD_PUSH [port]->write(1);
231	in_DECOD_MISS_PREDICTION [port]->write(0);
232
233	for (uint32_t i=0; i<_param->_nb_context; i++)
234	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
235	{
236	in_DECOD_CONTEXT_ID [port]->write(i);
237	in_DECOD_ADDRESS_PUSH [port]->write(0xbeefcaca+j);
238
239	SC_START(0);
240
241	TEST(Tcontrol_t, out_DECOD_ACK [port]->read(), 1);
242	TEST(Tptr_t , out_DECOD_INDEX[port]->read(),(j+1)%_param->_size_queue[i]);
243
244	SC_START(1);
245
246	}
247	in_DECOD_VAL [port]->write(0);
248
249	SC_START(1);
250
251	in_DECOD_VAL [port]->write(1);
252	in_DECOD_PUSH [port]->write(1);
253	for (uint32_t i=0; i<_param->_nb_context; i++)
254	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
255	{
256	in_DECOD_CONTEXT_ID [port]->write(i);
257	in_DECOD_ADDRESS_PUSH [port]->write(0x21071981+j);
258
259	SC_START(0);
260
261	TEST(Tcontrol_t, out_DECOD_ACK [port]->read(), 1);
262	TEST(Tptr_t , out_DECOD_INDEX [port]->read(),(j+1)%_param->_size_queue[i]);
263	TEST(Taddress_t, out_DECOD_ADDRESS_POP[port]->read(),0xbeefcaca+j);
264
265	SC_START(1);
266	}
267	in_DECOD_VAL [port]->write(0);
268
269	LABEL("DECOD - POP");
270
271	in_DECOD_VAL [port]->write(1);
272	in_DECOD_PUSH [port]->write(0);
273	for (uint32_t i=0; i<_param->_nb_context; i++)
274	for (uint32_t j=0; j< _param->_size_queue[i]; j++)
275	{
276	in_DECOD_CONTEXT_ID [port]->write(i);
277	in_DECOD_ADDRESS_PUSH [port]->write(0xbabedead);
278
279	SC_START(0);
280
281	TEST(Tcontrol_t, out_DECOD_ACK [port]->read(), 1);
282	TEST(Tcontrol_t, out_DECOD_HIT [port]->read(), 1);
283	uint32_t k=(_param->_size_queue[i]-j)%_param->_size_queue[i];
284	TEST(Tptr_t , out_DECOD_INDEX [port]->read(), k);
285	TEST(Taddress_t, out_DECOD_ADDRESS_POP[port]->read(),(0x21071981+((k==0)?(_param->_size_queue[i]-1):(k-1))));
286
287	SC_START(1);
288	}
289	in_DECOD_VAL [port]->write(0);
290	// Now, the stack is empty
291	}
292
293	if (test3)
294	{
295	uint32_t port1 = rand()%_param->_nb_inst_predict;
296	uint32_t port2 = rand()%_param->_nb_inst_decod;
297	uint32_t port3 = rand()%_param->_nb_inst_update;
298
299	LABEL("Test UPDATE");
300
301	LABEL("Predict");
302	in_PREDICT_VAL [port1]->write(1);
303	in_PREDICT_PUSH [port1]->write(1);
304	for (uint32_t i=0; i<_param->_nb_context; i++)
305	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
306	{
307	in_PREDICT_CONTEXT_ID [port1]->write(i);
308	in_PREDICT_ADDRESS_PUSH [port1]->write(0x25071959+j);
309
310	SC_START(0);
311
312	TEST(Tcontrol_t, out_PREDICT_ACK [port1]->read(), 1);
313	TEST(Tptr_t , out_PREDICT_INDEX [port1]->read(),(j+1)%_param->_size_queue[i]);
314	// TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port1]->read(),0xdeadbeef+j);
315
316	SC_START(1);
317	}
318	in_PREDICT_VAL [port1]->write(0);
319
320	LABEL("Decod");
321	in_DECOD_VAL [port2]->write(1);
322	in_DECOD_PUSH [port2]->write(1);
323	for (uint32_t i=0; i<_param->_nb_context; i++)
324	for (uint32_t j=0; j<_param->_size_queue[i]/2; j++)
325	{
326	in_DECOD_CONTEXT_ID [port2]->write(i);
327	in_DECOD_ADDRESS_PUSH [port2]->write(0x25071959+j);
328	in_DECOD_MISS_PREDICTION [port2]->write(0);
329
330	SC_START(0);
331
332	TEST(Tcontrol_t, out_DECOD_ACK [port2]->read(), 1);
333	TEST(Tptr_t , out_DECOD_INDEX [port2]->read(),(j+1)%_param->_size_queue[i]);
334	TEST(Taddress_t, out_DECOD_ADDRESS_POP[port2]->read(),0x25071959+j);
335
336	SC_START(1);
337	}
338	in_DECOD_VAL [port2]->write(0);
339
340	LABEL("Update Decod OK");
341	in_UPDATE_VAL [port3]->write(1);
342	in_UPDATE_PUSH [port3]->write(1);
343	in_UPDATE_FLUSH[port3]->write(0);
344	for (uint32_t i=0; i<_param->_nb_context; i++)
345	for (uint32_t j=0; j<_param->_size_queue[i]/2; j++)
346	{
347	uint32_t x=(_param->_size_queue[i]/2)-1;
348	in_UPDATE_CONTEXT_ID [port3]->write(i);
349	in_UPDATE_MISS_PREDICTION [port3]->write(0);
350	in_UPDATE_PREDICTION_IFETCH [port3]->write(0);
351	in_UPDATE_INDEX [port3]->write((x+1)%_param->_size_queue[i]);
352	in_UPDATE_ADDRESS [port3]->write(0x25071959+x);
353
354	SC_START(0);
355
356	TEST(Tcontrol_t, out_UPDATE_ACK [port3]->read(), 1);
357
358	SC_START(1);
359	}
360	in_UPDATE_VAL [port3]->write(0);
361
362	LABEL("Update FLUSH");
363	in_UPDATE_VAL [port3]->write(1);
364	in_UPDATE_FLUSH[port3]->write(1);
365	in_UPDATE_PUSH [port3]->write(0);
366	for (uint32_t i=0; i<_param->_nb_context; i++)
367	for (uint32_t j=0; j<_param->_size_queue[i]/2; j++)
368	{
369	in_UPDATE_CONTEXT_ID [port3]->write(i);
370	SC_START(1);
371	TEST(Tcontrol_t, out_UPDATE_ACK [port3]->read(), 1);
372	}
373	in_UPDATE_VAL [port3]->write(0);
374
375
376	// Tcontrol_t, in_UPDATE_VAL
377	// Tcontrol_t,out_UPDATE_ACK
378	// Tcontext_t, in_UPDATE_CONTEXT_ID
379	// Tcontrol_t, in_UPDATE_PUSH
380	// Tcontrol_t, in_UPDATE_FLUSH
381	// Tptr_t , in_UPDATE_INDEX
382	// Taddress_t, in_UPDATE_ADDRESS
383	// Tcontrol_t, in_UPDATE_MISS_PREDICTION
384	// Tcontrol_t, in_UPDATE_PREDICTION_IFETCH
385
386
387	}
388
389	if (test4)
390	{
391	uint32_t port1 = rand()%_param->_nb_inst_predict;
392	uint32_t port2 = rand()%_param->_nb_inst_decod;
393	uint32_t port3 = rand()%_param->_nb_inst_update;
394
395	LABEL("Test UPDATE");
396
397	LABEL("Predict");
398	in_PREDICT_VAL [port1]->write(1);
399	in_PREDICT_PUSH [port1]->write(1);
400	for (uint32_t i=0; i<_param->_nb_context; i++)
401	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
402	{
403	in_PREDICT_CONTEXT_ID [port1]->write(i);
404	in_PREDICT_ADDRESS_PUSH [port1]->write(0x14011959+j);
405
406	SC_START(0);
407
408	TEST(Tcontrol_t, out_PREDICT_ACK [port1]->read(), 1);
409	TEST(Tptr_t , out_PREDICT_INDEX [port1]->read(),(j+1)%_param->_size_queue[i]);
410	// TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port1]->read(),0xdeadbeef+j);
411
412	SC_START(1);
413	}
414	in_PREDICT_VAL [port1]->write(0);
415
416	LABEL("Decod");
417	in_DECOD_VAL [port2]->write(1);
418	in_DECOD_PUSH [port2]->write(1);
419	for (uint32_t i=0; i<_param->_nb_context; i++)
420	for (uint32_t j=0; j<_param->_size_queue[i]/2; j++)
421	{
422	in_DECOD_CONTEXT_ID [port2]->write(i);
423	in_DECOD_ADDRESS_PUSH [port2]->write(0x14011959+j);
424	in_DECOD_MISS_PREDICTION [port2]->write(0);
425
426	SC_START(0);
427
428	TEST(Tcontrol_t, out_DECOD_ACK [port2]->read(), 1);
429	TEST(Tptr_t , out_DECOD_INDEX [port2]->read(),(j+1)%_param->_size_queue[i]);
430	TEST(Taddress_t, out_DECOD_ADDRESS_POP[port2]->read(),0x14011959+j);
431
432	SC_START(1);
433	}
434	in_DECOD_VAL [port2]->write(0);
435
436	LABEL("Update Decod KO");
437	in_UPDATE_VAL [port3]->write(1);
438	in_UPDATE_PUSH [port3]->write(1);
439	in_UPDATE_FLUSH[port3]->write(0);
440	for (uint32_t i=0; i<_param->_nb_context; i++)
441	for (uint32_t j=0; j<_param->_size_queue[i]/2; j++)
442	{
443	uint32_t x=(_param->_size_queue[i]/2);
444	in_UPDATE_CONTEXT_ID [port3]->write(i);
445	in_UPDATE_MISS_PREDICTION [port3]->write(1);
446	in_UPDATE_PREDICTION_IFETCH [port3]->write(0);
447	in_UPDATE_INDEX [port3]->write((x-j)%_param->_size_queue[i]);
448	in_UPDATE_ADDRESS [port3]->write(0xffffffff+x);
449
450	SC_START(0);
451
452	TEST(Tcontrol_t, out_UPDATE_ACK [port3]->read(), 1);
453
454	SC_START(1);
455	}
456	in_UPDATE_VAL [port3]->write(0);
457
458	LABEL("Decod");
459	in_DECOD_VAL [port2]->write(1);
460	in_DECOD_PUSH [port2]->write(1);
461	for (uint32_t i=0; i<_param->_nb_context; i++)
462	for (uint32_t j=0; j<_param->_size_queue[i]/2; j++)
463	{
464	in_DECOD_CONTEXT_ID [port2]->write(i);
465	in_DECOD_ADDRESS_PUSH [port2]->write(0x14011959+j);
466	in_DECOD_MISS_PREDICTION [port2]->write(0);
467
468	SC_START(0);
469
470	TEST(Tcontrol_t, out_DECOD_ACK [port2]->read(), 1);
471	TEST(Tptr_t , out_DECOD_INDEX [port2]->read(),(j+1)%_param->_size_queue[i]);
472	TEST(Taddress_t, out_DECOD_ADDRESS_POP[port2]->read(),0x14011959+j);
473
474	SC_START(1);
475	}
476	in_DECOD_VAL [port2]->write(0);
477
478
479	LABEL("Update Decod KO");
480	in_UPDATE_VAL [port3]->write(1);
481	in_UPDATE_PUSH [port3]->write(1);
482	in_UPDATE_FLUSH[port3]->write(0);
483	for (uint32_t i=0; i<_param->_nb_context; i++)
484	for (uint32_t j=0; j<_param->_size_queue[i]/2; j++)
485	{
486	uint32_t x=(_param->_size_queue[i]/2);
487	in_UPDATE_CONTEXT_ID [port3]->write(i);
488	in_UPDATE_MISS_PREDICTION [port3]->write(1);
489	in_UPDATE_PREDICTION_IFETCH [port3]->write(0);
490	in_UPDATE_INDEX [port3]->write((x-j)%_param->_size_queue[i]);
491	in_UPDATE_ADDRESS [port3]->write(0xffffffff+x);
492
493	SC_START(0);
494
495	TEST(Tcontrol_t, out_UPDATE_ACK [port3]->read(), 1);
496
497	SC_START(1);
498	}
499	in_UPDATE_VAL [port3]->write(0);
500
501	LABEL("Update Predict KO");
502	in_UPDATE_VAL [port3]->write(1);
503	in_UPDATE_PUSH [port3]->write(1);
504	in_UPDATE_FLUSH[port3]->write(0);
505	for (uint32_t i=0; i<_param->_nb_context; i++)
506	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
507	{
508	uint32_t x=(_param->_size_queue[i]);
509	in_UPDATE_CONTEXT_ID [port3]->write(i);
510	in_UPDATE_MISS_PREDICTION [port3]->write(1);
511	in_UPDATE_PREDICTION_IFETCH [port3]->write(1);
512	in_UPDATE_INDEX [port3]->write((x-j)%_param->_size_queue[i]);
513	in_UPDATE_ADDRESS [port3]->write(0xffffffff+x);
514
515	SC_START(0);
516
517	TEST(Tcontrol_t, out_UPDATE_ACK [port3]->read(), 1);
518
519	SC_START(1);
520	}
521	in_UPDATE_VAL [port3]->write(0);
522
523	LABEL("Predict");
524	in_PREDICT_VAL [port1]->write(1);
525	in_PREDICT_PUSH [port1]->write(1);
526	for (uint32_t i=0; i<_param->_nb_context; i++)
527	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
528	{
529	in_PREDICT_CONTEXT_ID [port1]->write(i);
530	in_PREDICT_ADDRESS_PUSH [port1]->write(0x14011959+j);
531
532	SC_START(0);
533
534	TEST(Tcontrol_t, out_PREDICT_ACK [port1]->read(), 1);
535	TEST(Tptr_t , out_PREDICT_INDEX [port1]->read(),(j+1)%_param->_size_queue[i]);
536	TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port1]->read(),0x14011959+j);
537
538	SC_START(1);
539	}
540	in_PREDICT_VAL [port1]->write(0);
541
542	LABEL("Update Predict KO");
543	in_UPDATE_VAL [port3]->write(1);
544	in_UPDATE_PUSH [port3]->write(0);
545	in_UPDATE_FLUSH[port3]->write(0);
546	for (uint32_t i=0; i<_param->_nb_context; i++)
547	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
548	{
549	uint32_t x=(_param->_size_queue[i]);
550	in_UPDATE_CONTEXT_ID [port3]->write(i);
551	in_UPDATE_MISS_PREDICTION [port3]->write(1);
552	in_UPDATE_PREDICTION_IFETCH [port3]->write(1);
553	in_UPDATE_INDEX [port3]->write((x+j+1)%_param->_size_queue[i]);
554	in_UPDATE_ADDRESS [port3]->write(0x87654321+j);
555
556	SC_START(0);
557
558	TEST(Tcontrol_t, out_UPDATE_ACK [port3]->read(), 1);
559
560	SC_START(1);
561	}
562	in_UPDATE_VAL [port3]->write(0);
563
564	LABEL("Predict");
565	in_PREDICT_VAL [port1]->write(1);
566	in_PREDICT_PUSH [port1]->write(1);
567	for (uint32_t i=0; i<_param->_nb_context; i++)
568	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
569	{
570	in_PREDICT_CONTEXT_ID [port1]->write(i);
571	in_PREDICT_ADDRESS_PUSH [port1]->write(0x14011959+j);
572
573	SC_START(0);
574
575	TEST(Tcontrol_t, out_PREDICT_ACK [port1]->read(), 1);
576	TEST(Tptr_t , out_PREDICT_INDEX [port1]->read(),(j+1)%_param->_size_queue[i]);
577	TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port1]->read(),0x87654321+j);
578
579	SC_START(1);
580	}
581	in_PREDICT_VAL [port1]->write(0);
582
583	LABEL("Update FLUSH");
584	in_UPDATE_VAL [port3]->write(1);
585	in_UPDATE_PUSH [port3]->write(0);
586	in_UPDATE_FLUSH[port3]->write(1);
587	for (uint32_t i=0; i<_param->_nb_context; i++)
588	for (uint32_t j=0; j<_param->_size_queue[i]/2; j++)
589	{
590	in_UPDATE_CONTEXT_ID [port3]->write(i);
591	SC_START(1);
592	TEST(Tcontrol_t, out_UPDATE_ACK [port3]->read(), 1);
593	}
594	in_UPDATE_VAL [port3]->write(0);
595	}
596	}
597
598	/********************************************************
599	* Simulation - End
600	********************************************************/
601
602	TEST_OK ("End of Simulation");
603	delete _time;
604
605	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
606
607	delete in_CLOCK;
608	delete in_NRESET;
609
610	DELETE1_SC_SIGNAL( in_PREDICT_VAL ,_param->_nb_inst_predict);
611	DELETE1_SC_SIGNAL(out_PREDICT_ACK ,_param->_nb_inst_predict);
612	DELETE1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict);
613	DELETE1_SC_SIGNAL(out_PREDICT_HIT ,_param->_nb_inst_predict);
614	DELETE1_SC_SIGNAL( in_PREDICT_PUSH ,_param->_nb_inst_predict);
615	DELETE1_SC_SIGNAL( in_PREDICT_ADDRESS_PUSH ,_param->_nb_inst_predict);
616	DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_POP ,_param->_nb_inst_predict);
617	DELETE1_SC_SIGNAL(out_PREDICT_INDEX ,_param->_nb_inst_predict);
618
619	DELETE1_SC_SIGNAL( in_DECOD_VAL ,_param->_nb_inst_decod);
620	DELETE1_SC_SIGNAL(out_DECOD_ACK ,_param->_nb_inst_decod);
621	DELETE1_SC_SIGNAL( in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
622	DELETE1_SC_SIGNAL(out_DECOD_HIT ,_param->_nb_inst_decod);
623	DELETE1_SC_SIGNAL( in_DECOD_PUSH ,_param->_nb_inst_decod);
624	DELETE1_SC_SIGNAL( in_DECOD_ADDRESS_PUSH ,_param->_nb_inst_decod);
625	DELETE1_SC_SIGNAL(out_DECOD_ADDRESS_POP ,_param->_nb_inst_decod);
626	DELETE1_SC_SIGNAL(out_DECOD_INDEX ,_param->_nb_inst_decod);
627	DELETE1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod);
628
629	DELETE1_SC_SIGNAL( in_UPDATE_VAL ,_param->_nb_inst_update);
630	DELETE1_SC_SIGNAL(out_UPDATE_ACK ,_param->_nb_inst_update);
631	DELETE1_SC_SIGNAL( in_UPDATE_CONTEXT_ID ,_param->_nb_inst_update);
632	DELETE1_SC_SIGNAL( in_UPDATE_PUSH ,_param->_nb_inst_update);
633	DELETE1_SC_SIGNAL( in_UPDATE_FLUSH ,_param->_nb_inst_update);
634	DELETE1_SC_SIGNAL( in_UPDATE_ADDRESS ,_param->_nb_inst_update);
635	DELETE1_SC_SIGNAL( in_UPDATE_INDEX ,_param->_nb_inst_update);
636	DELETE1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION ,_param->_nb_inst_update);
637	DELETE1_SC_SIGNAL( in_UPDATE_PREDICTION_IFETCH,_param->_nb_inst_update);
638
639	#endif
640
641	delete _Return_Address_Stack;
642	#ifdef STATISTICS
643	delete _parameters_statistics;
644	#endif
645	}

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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp @ 107

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