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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp @ 101

Last change on this file since 101 was 101, checked in by rosiere, 15 years ago
1) Add soc test 2) fix bug (Pc management, Decod and execute, Update prediction ...)
Property svn:keywords set to `Id`
File size: 24.3 KB

Line
1	/*
2	* $Id: test.cpp 101 2009-01-15 17:19:08Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX 1000000
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14	#include "Behavioural/include/Allocation.h"
15
16	void test (string name,
17	morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters * _param)
18	{
19	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
20
21	#ifdef STATISTICS
22	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
23	#endif
24
25	Tusage_t _usage = USE_ALL;
26
27	// _usage = usage_unset(_usage,USE_SYSTEMC );
28	// _usage = usage_unset(_usage,USE_VHDL );
29	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
30	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
31	// _usage = usage_unset(_usage,USE_POSITION );
32	// _usage = usage_unset(_usage,USE_STATISTICS );
33	// _usage = usage_unset(_usage,USE_INFORMATION );
34
35	Prediction_unit * _Prediction_unit = new Prediction_unit
36	(name.c_str(),
37	#ifdef STATISTICS
38	_parameters_statistics,
39	#endif
40	_param,
41	_usage);
42
43	#ifdef SYSTEMC
44	/*********************************************************************
45	* Déclarations des signaux
46	*********************************************************************/
47	string rename;
48
49	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
50	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
51
52
53	ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_context);
54	ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_context);
55	ALLOC1_SC_SIGNAL( in_PREDICT_PC_PREVIOUS ," in_PREDICT_PC_PREVIOUS ",Taddress_t ,_param->_nb_context);
56	ALLOC1_SC_SIGNAL( in_PREDICT_PC_CURRENT ," in_PREDICT_PC_CURRENT ",Taddress_t ,_param->_nb_context);
57	ALLOC1_SC_SIGNAL( in_PREDICT_PC_CURRENT_IS_DS_TAKE ," in_PREDICT_PC_CURRENT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context);
58	ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT ,"out_PREDICT_PC_NEXT ",Taddress_t ,_param->_nb_context);
59	ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE ,"out_PREDICT_PC_NEXT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context);
60	ALLOC2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,"out_PREDICT_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_context,_param->_nb_instruction[it1]);
61	ALLOC1_SC_SIGNAL(out_PREDICT_INST_IFETCH_PTR ,"out_PREDICT_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context);
62	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context);
63	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_context);
64
65	ALLOC2_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
66	ALLOC2_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
67	ALLOC2_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
68	ALLOC2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR ," in_DECOD_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
69	ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_STATE ," in_DECOD_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
70	ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID ," in_DECOD_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
71	ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION ," in_DECOD_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
72	ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION ," in_DECOD_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
73	ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Taddress_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
74	ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_DEST ," in_DECOD_ADDRESS_DEST ",Taddress_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
75
76	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete);
77	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,"out_BRANCH_COMPLETE_ACK ",Tcontrol_t ,_param->_nb_inst_branch_complete);
78	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ," in_BRANCH_COMPLETE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_branch_complete);
79	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete);
80	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS ," in_BRANCH_COMPLETE_ADDRESS ",Taddress_t ,_param->_nb_inst_branch_complete);
81	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_NO_SEQUENCE ," in_BRANCH_COMPLETE_NO_SEQUENCE ",Tcontrol_t ,_param->_nb_inst_branch_complete);
82	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION ,"out_BRANCH_COMPLETE_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_branch_complete);
83	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,"out_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete);
84	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,"out_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete);
85	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,"out_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete);
86
87	ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_VAL ,"out_BRANCH_EVENT_VAL ",Tcontrol_t ,_param->_nb_context);
88	ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ACK ," in_BRANCH_EVENT_ACK ",Tcontrol_t ,_param->_nb_context);
89	//ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_CONTEXT_ID ,"out_BRANCH_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_context);
90	ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_DEPTH ,"out_BRANCH_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context);
91	//ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_MISS_PREDICTION ,"out_BRANCH_EVENT_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_context);
92	ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_SRC ,"out_BRANCH_EVENT_ADDRESS_SRC ",Taddress_t ,_param->_nb_context);
93	ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,"out_BRANCH_EVENT_ADDRESS_DEST_VAL ",Tcontrol_t ,_param->_nb_context);
94	ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,"out_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context);
95
96	ALLOC1_SC_SIGNAL( in_EVENT_VAL ," in_EVENT_VAL ",Tcontrol_t ,_param->_nb_context);
97	ALLOC1_SC_SIGNAL(out_EVENT_ACK ,"out_EVENT_ACK ",Tcontrol_t ,_param->_nb_context);
98	ALLOC1_SC_SIGNAL( in_EVENT_TYPE ," in_EVENT_TYPE ",Tevent_type_t ,_param->_nb_context);
99	ALLOC1_SC_SIGNAL( in_EVENT_DEPTH ," in_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context);
100
101	ALLOC1_SC_SIGNAL(out_DEPTH_VAL ,"out_DEPTH_VAL ",Tcontrol_t ,_param->_nb_context);
102	ALLOC1_SC_SIGNAL(out_DEPTH_CURRENT ,"out_DEPTH_CURRENT ",Tdepth_t ,_param->_nb_context);
103	ALLOC1_SC_SIGNAL(out_DEPTH_MIN ,"out_DEPTH_MIN ",Tdepth_t ,_param->_nb_context);
104	ALLOC1_SC_SIGNAL(out_DEPTH_MAX ,"out_DEPTH_MAX ",Tdepth_t ,_param->_nb_context);
105	ALLOC1_SC_SIGNAL(out_DEPTH_FULL ,"out_DEPTH_FULL ",Tcontrol_t ,_param->_nb_context);
106
107	/********************************************************
108	* Instanciation
109	********************************************************/
110
111	msg(_("<%s> : Instanciation of _Prediction_unit.\n"),name.c_str());
112
113	((_Prediction_unit->in_CLOCK)) ((in_CLOCK));
114	((_Prediction_unit->in_NRESET)) ((in_NRESET));
115
116	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_PREDICT_VAL ,_param->_nb_context);
117	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_ACK ,_param->_nb_context);
118	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_PREDICT_PC_PREVIOUS ,_param->_nb_context);
119	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_PREDICT_PC_CURRENT ,_param->_nb_context);
120	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_PREDICT_PC_CURRENT_IS_DS_TAKE ,_param->_nb_context);
121	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_PC_NEXT ,_param->_nb_context);
122	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_PC_NEXT_IS_DS_TAKE ,_param->_nb_context);
123	INSTANCE2_SC_SIGNAL(_Prediction_unit,out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[it1]);
124	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_STATE ,_param->_nb_context);
125	if (_param->_have_port_inst_ifetch_ptr)
126	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_INST_IFETCH_PTR ,_param->_nb_context);
127	if (_param->_have_port_depth)
128	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context);
129	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_VAL ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
130	INSTANCE2_SC_SIGNAL(_Prediction_unit,out_DECOD_ACK ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
131	if (_param->_have_port_context_id)
132	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_CONTEXT_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
133	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_MATCH_INST_IFETCH_PTR ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
134	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_STATE ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
135	if (_param->_have_port_depth)
136	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
137	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_CONDITION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
138	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_DIRECTION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
139	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
140	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
141
142	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete);
143	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete);
144	if (_param->_have_port_context_id)
145	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete);
146	if (_param->_have_port_depth)
147	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete);
148	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_ADDRESS ,_param->_nb_inst_branch_complete);
149	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_NO_SEQUENCE ,_param->_nb_inst_branch_complete);
150	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_MISS_PREDICTION ,_param->_nb_inst_branch_complete);
151	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete);
152	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete);
153	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete);
154
155	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_VAL ,_param->_nb_context);
156	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_EVENT_ACK ,_param->_nb_context);
157	//if (_param->_have_port_context_id)
158	//INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context);
159	if (_param->_have_port_depth)
160	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_DEPTH ,_param->_nb_context);
161	//INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context);
162	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context);
163	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context);
164	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context);
165
166	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_EVENT_VAL ,_param->_nb_context);
167	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_EVENT_ACK ,_param->_nb_context);
168	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_EVENT_TYPE ,_param->_nb_context);
169	if (_param->_have_port_depth)
170	{
171	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_EVENT_DEPTH ,_param->_nb_context);
172	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_CURRENT ,_param->_nb_context);
173	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_MIN ,_param->_nb_context);
174	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_MAX ,_param->_nb_context);
175	}
176	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_VAL ,_param->_nb_context);
177	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_FULL ,_param->_nb_context);
178
179	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
180
181	Time * _time = new Time();
182
183	/********************************************************
184	* Simulation - Begin
185	********************************************************/
186
187	// Initialisation
188
189	const uint32_t seed = 0;
190	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
191
192	const int32_t percent_transaction_predict = 80;
193	const int32_t percent_transaction_decod = 80;
194	const int32_t percent_transaction_branch_complete = 80;
195	const int32_t percent_transaction_branch_event = 80;
196
197	srand(seed);
198
199	uint32_t test1 = 1024; // TEST 1 : instruction without branch
200	uint32_t test2 = 1024; // TEST 2 : sequence : 1 branch, 1 delayed slot
201
202	SC_START(0);
203	LABEL("Initialisation");
204
205	for (uint32_t i=0; i<_param->_nb_context; ++i)
206	{
207	in_PREDICT_VAL [i]->write(0);
208	in_BRANCH_EVENT_ACK [i]->write(0);
209	}
210
211	for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
212	for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
213	{
214	in_DECOD_VAL [i][j]->write(0);
215	}
216
217	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
218	{
219	in_BRANCH_COMPLETE_VAL [i]->write(0);
220	}
221
222	LABEL("Reset");
223	in_NRESET->write(0);
224	SC_START(5);
225	in_NRESET->write(1);
226
227	for (uint32_t i=0; i<_param->_nb_context; ++i)
228	{
229	// TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(),1); // Accept new request
230	TEST(Tcontrol_t,out_BRANCH_EVENT_VAL [i]->read(),0);
231	TEST(Tdepth_t ,out_DEPTH_CURRENT [i]->read(),0);
232	TEST(Tdepth_t ,out_DEPTH_MIN [i]->read(),0);
233	TEST(Tdepth_t ,out_DEPTH_MAX [i]->read(),0);
234	}
235
236	for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
237	for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
238	{
239	TEST(Tcontrol_t,out_DECOD_ACK [i][j]->read(),0); // No decod instruction
240	}
241
242	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
243	{
244	TEST(Tcontrol_t,out_BRANCH_COMPLETE_ACK [i]->read(),1); // Accept new branch_complete
245	}
246
247	LABEL("Loop of Test");
248
249	Taddress_t PC_PREVIOUS [_param->_nb_context];
250	Taddress_t PC_CURRENT [_param->_nb_context];
251	Tcontrol_t PC_CURRENT_IS_DS_TAKE [_param->_nb_context];
252
253	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
254	{
255	LABEL("Iteration %d",iteration);
256
257	// TEST 1 : instruction without branch
258	for (uint32_t test=0; test<test1; ++test)
259	{
260	for (uint32_t i=0; i<_param->_nb_context; ++i)
261	{
262	PC_CURRENT [i] = (0x100000>>2);
263	PC_CURRENT_IS_DS_TAKE [i] = 0;
264	PC_PREVIOUS [i] = PC_CURRENT[i]-1;
265	}
266
267	for (uint32_t i=0; i<_param->_nb_context; ++i)
268	{
269	in_PREDICT_VAL [i]->write((rand()%100)<percent_transaction_predict);
270	in_PREDICT_PC_PREVIOUS [i]->write(PC_PREVIOUS [i]);
271	in_PREDICT_PC_CURRENT [i]->write(PC_CURRENT [i]);
272	in_PREDICT_PC_CURRENT_IS_DS_TAKE [i]->write(PC_CURRENT_IS_DS_TAKE[i]);
273	}
274
275	SC_START(1);
276
277	for (uint32_t i=0; i<_param->_nb_context; ++i)
278	// Test if transaction
279	if (in_PREDICT_VAL [i]->read() and out_PREDICT_ACK [i]->read())
280	{
281	TEST(Taddress_t ,out_PREDICT_PC_NEXT [i]->read(),PC_CURRENT[i]+_param->_nb_instruction[i]);
282	TEST(Tcontrol_t ,out_PREDICT_PC_NEXT_IS_DS_TAKE [i]->read(),0);
283	for (uint32_t j=0; j<_param->_nb_instruction[i]; ++j)
284	TEST(Tcontrol_t ,out_PREDICT_INSTRUCTION_ENABLE [i][j]->read(),1);
285	TEST(Tinst_ifetch_ptr_t,out_PREDICT_INST_IFETCH_PTR [i]->read(),0);
286	TEST(Tbranch_state_t ,out_PREDICT_BRANCH_STATE [i]->read(),BRANCH_STATE_NONE);
287	TEST(Tprediction_ptr_t ,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]->read(),0);
288
289	PC_PREVIOUS [i] = PC_CURRENT [i];
290	PC_CURRENT [i] = out_PREDICT_PC_NEXT [i]->read();
291	PC_CURRENT_IS_DS_TAKE [i] = out_PREDICT_PC_NEXT_IS_DS_TAKE [i]->read();
292	}
293
294	// Test another output
295	for (uint32_t i=0; i<_param->_nb_context; ++i)
296	{
297	TEST(Tcontrol_t,out_BRANCH_EVENT_VAL [i]->read(),0);
298	TEST(Tdepth_t ,out_DEPTH_CURRENT [i]->read(),0);
299	TEST(Tdepth_t ,out_DEPTH_MIN [i]->read(),0);
300	TEST(Tdepth_t ,out_DEPTH_MAX [i]->read(),0);
301	}
302
303	for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
304	for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
305	{
306	TEST(Tcontrol_t,out_DECOD_ACK [i][j]->read(),0); // No decod instruction
307	}
308
309	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
310	{
311	TEST(Tcontrol_t,out_BRANCH_COMPLETE_ACK [i]->read(),1); // Accept new branch_complete
312	}
313	}
314
315	SC_START(1);
316	}
317
318	/********************************************************
319	* Simulation - End
320	********************************************************/
321
322	TEST_OK ("End of Simulation");
323	delete _time;
324
325	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
326
327	delete in_CLOCK;
328	delete in_NRESET;
329
330	DELETE1_SC_SIGNAL( in_PREDICT_VAL ,_param->_nb_context);
331	DELETE1_SC_SIGNAL(out_PREDICT_ACK ,_param->_nb_context);
332	DELETE1_SC_SIGNAL( in_PREDICT_PC_PREVIOUS ,_param->_nb_context);
333	DELETE1_SC_SIGNAL( in_PREDICT_PC_CURRENT ,_param->_nb_context);
334	DELETE1_SC_SIGNAL( in_PREDICT_PC_CURRENT_IS_DS_TAKE ,_param->_nb_context);
335	DELETE1_SC_SIGNAL(out_PREDICT_PC_NEXT ,_param->_nb_context);
336	DELETE1_SC_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE ,_param->_nb_context);
337	DELETE1_SC_SIGNAL(out_PREDICT_INST_IFETCH_PTR ,_param->_nb_context);
338	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,_param->_nb_context);
339	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context);
340
341	DELETE2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[it1]);
342	DELETE2_SC_SIGNAL( in_DECOD_VAL ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
343	DELETE2_SC_SIGNAL(out_DECOD_ACK ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
344	DELETE2_SC_SIGNAL( in_DECOD_CONTEXT_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
345	DELETE2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
346	DELETE2_SC_SIGNAL( in_DECOD_BRANCH_STATE ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
347	DELETE2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
348	DELETE2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
349	DELETE2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
350	DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
351	DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
352
353	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete);
354	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete);
355	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete);
356	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete);
357	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS ,_param->_nb_inst_branch_complete);
358	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_NO_SEQUENCE ,_param->_nb_inst_branch_complete);
359	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
360	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete);
361	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete);
362	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete);
363
364	DELETE1_SC_SIGNAL(out_BRANCH_EVENT_VAL ,_param->_nb_context);
365	DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ACK ,_param->_nb_context);
366	//DELETE1_SC_SIGNAL(out_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context);
367	DELETE1_SC_SIGNAL(out_BRANCH_EVENT_DEPTH ,_param->_nb_context);
368	//DELETE1_SC_SIGNAL(out_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context);
369	DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context);
370	DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context);
371	DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context);
372
373	DELETE1_SC_SIGNAL( in_EVENT_VAL ,_param->_nb_context);
374	DELETE1_SC_SIGNAL(out_EVENT_ACK ,_param->_nb_context);
375	DELETE1_SC_SIGNAL( in_EVENT_TYPE ,_param->_nb_context);
376	DELETE1_SC_SIGNAL( in_EVENT_DEPTH ,_param->_nb_context);
377
378	DELETE1_SC_SIGNAL(out_DEPTH_VAL ,_param->_nb_context);
379	DELETE1_SC_SIGNAL(out_DEPTH_CURRENT ,_param->_nb_context);
380	DELETE1_SC_SIGNAL(out_DEPTH_MIN ,_param->_nb_context);
381	DELETE1_SC_SIGNAL(out_DEPTH_MAX ,_param->_nb_context);
382	DELETE1_SC_SIGNAL(out_DEPTH_FULL ,_param->_nb_context);
383	#endif
384
385	delete _Prediction_unit;
386	#ifdef STATISTICS
387	delete _parameters_statistics;
388	#endif
389	}

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