Context Navigation

source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp @ 88

Last change on this file since 88 was 88, checked in by rosiere, 16 years ago
Almost complete design with Test and test platform
Property svn:keywords set to `Id`
File size: 22.1 KB

Line
1	/*
2	* $Id: test.cpp 88 2008-12-10 18:31:39Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX 1000000
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14	#include "Behavioural/include/Allocation.h"
15
16	void test (string name,
17	morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters * _param)
18	{
19	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
20
21	#ifdef STATISTICS
22	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
23	#endif
24
25	Tusage_t _usage = USE_ALL;
26
27	// _usage = usage_unset(_usage,USE_SYSTEMC );
28	// _usage = usage_unset(_usage,USE_VHDL );
29	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
30	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
31	// _usage = usage_unset(_usage,USE_POSITION );
32	// _usage = usage_unset(_usage,USE_STATISTICS );
33	// _usage = usage_unset(_usage,USE_INFORMATION );
34
35	Prediction_unit * _Prediction_unit = new Prediction_unit
36	(name.c_str(),
37	#ifdef STATISTICS
38	_parameters_statistics,
39	#endif
40	_param,
41	_usage);
42
43	#ifdef SYSTEMC
44	/*********************************************************************
45	* Déclarations des signaux
46	*********************************************************************/
47	string rename;
48
49	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
50	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
51
52
53	ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_context);
54	ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_context);
55	ALLOC1_SC_SIGNAL( in_PREDICT_PC_PREVIOUS ," in_PREDICT_PC_PREVIOUS ",Taddress_t ,_param->_nb_context);
56	ALLOC1_SC_SIGNAL( in_PREDICT_PC_CURRENT ," in_PREDICT_PC_CURRENT ",Taddress_t ,_param->_nb_context);
57	ALLOC1_SC_SIGNAL( in_PREDICT_PC_CURRENT_IS_DS_TAKE ," in_PREDICT_PC_CURRENT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context);
58	ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT ,"out_PREDICT_PC_NEXT ",Taddress_t ,_param->_nb_context);
59	ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE ,"out_PREDICT_PC_NEXT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context);
60	ALLOC2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,"out_PREDICT_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_context,_param->_nb_instruction[it1]);
61	ALLOC1_SC_SIGNAL(out_PREDICT_INST_IFETCH_PTR ,"out_PREDICT_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context);
62	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context);
63	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_context);
64
65	ALLOC2_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
66	ALLOC2_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
67	ALLOC2_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
68	ALLOC2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR ," in_DECOD_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
69	ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_STATE ," in_DECOD_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
70	ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID ," in_DECOD_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
71	ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION ," in_DECOD_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
72	ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION ," in_DECOD_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
73	ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Taddress_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
74	ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_DEST ," in_DECOD_ADDRESS_DEST ",Taddress_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
75
76	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete);
77	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,"out_BRANCH_COMPLETE_ACK ",Tcontrol_t ,_param->_nb_inst_branch_complete);
78	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ," in_BRANCH_COMPLETE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_branch_complete);
79	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete);
80	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS ," in_BRANCH_COMPLETE_ADDRESS ",Taddress_t ,_param->_nb_inst_branch_complete);
81	ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_FLAG ," in_BRANCH_COMPLETE_FLAG ",Tcontrol_t ,_param->_nb_inst_branch_complete);
82	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION ,"out_BRANCH_COMPLETE_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_branch_complete);
83	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,"out_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete);
84	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,"out_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete);
85	ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,"out_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete);
86
87	ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_VAL ,"out_BRANCH_EVENT_VAL ",Tcontrol_t ,_param->_nb_context);
88	ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ACK ," in_BRANCH_EVENT_ACK ",Tcontrol_t ,_param->_nb_context);
89	//ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_CONTEXT_ID ,"out_BRANCH_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_context);
90	//ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_DEPTH ,"out_BRANCH_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context);
91	//ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_MISS_PREDICTION ,"out_BRANCH_EVENT_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_context);
92	ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_SRC ,"out_BRANCH_EVENT_ADDRESS_SRC ",Taddress_t ,_param->_nb_context);
93	ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,"out_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context);
94
95	ALLOC1_SC_SIGNAL(out_DEPTH_CURRENT ,"out_DEPTH_CURRENT ",Tdepth_t ,_param->_nb_context);
96	ALLOC1_SC_SIGNAL(out_DEPTH_MIN ,"out_DEPTH_MIN ",Tdepth_t ,_param->_nb_context);
97	ALLOC1_SC_SIGNAL(out_DEPTH_MAX ,"out_DEPTH_MAX ",Tdepth_t ,_param->_nb_context);
98
99	/********************************************************
100	* Instanciation
101	********************************************************/
102
103	msg(_("<%s> : Instanciation of _Prediction_unit.\n"),name.c_str());
104
105	((_Prediction_unit->in_CLOCK)) ((in_CLOCK));
106	((_Prediction_unit->in_NRESET)) ((in_NRESET));
107
108	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_PREDICT_VAL ,_param->_nb_context);
109	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_ACK ,_param->_nb_context);
110	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_PREDICT_PC_PREVIOUS ,_param->_nb_context);
111	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_PREDICT_PC_CURRENT ,_param->_nb_context);
112	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_PREDICT_PC_CURRENT_IS_DS_TAKE ,_param->_nb_context);
113	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_PC_NEXT ,_param->_nb_context);
114	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_PC_NEXT_IS_DS_TAKE ,_param->_nb_context);
115	INSTANCE2_SC_SIGNAL(_Prediction_unit,out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[it1]);
116	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_STATE ,_param->_nb_context);
117	if (_param->_have_port_inst_ifetch_ptr)
118	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_INST_IFETCH_PTR ,_param->_nb_context);
119	if (_param->_have_port_depth)
120	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context);
121	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_VAL ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
122	INSTANCE2_SC_SIGNAL(_Prediction_unit,out_DECOD_ACK ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
123	if (_param->_have_port_context_id)
124	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_CONTEXT_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
125	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_MATCH_INST_IFETCH_PTR ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
126	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_STATE ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
127	if (_param->_have_port_depth)
128	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
129	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_CONDITION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
130	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_DIRECTION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
131	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
132	INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
133
134	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete);
135	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete);
136	if (_param->_have_port_context_id)
137	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete);
138	if (_param->_have_port_depth)
139	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete);
140	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_ADDRESS ,_param->_nb_inst_branch_complete);
141	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_FLAG ,_param->_nb_inst_branch_complete);
142	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_MISS_PREDICTION ,_param->_nb_inst_branch_complete);
143	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete);
144	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete);
145	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete);
146
147	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_VAL ,_param->_nb_context);
148	INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_EVENT_ACK ,_param->_nb_context);
149	//if (_param->_have_port_context_id)
150	//INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context);
151	//INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_DEPTH ,_param->_nb_context);
152	//INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context);
153	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context);
154	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context);
155
156	if (_param->_have_port_depth)
157	{
158	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_CURRENT ,_param->_nb_context);
159	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_MIN ,_param->_nb_context);
160	}
161	INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_MAX ,_param->_nb_context);
162
163	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
164
165	Time * _time = new Time();
166
167	/********************************************************
168	* Simulation - Begin
169	********************************************************/
170
171	// Initialisation
172
173	const uint32_t seed = 0;
174	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
175
176	const int32_t percent_transaction_predict = 80;
177	const int32_t percent_transaction_decod = 80;
178	const int32_t percent_transaction_branch_complete = 80;
179	const int32_t percent_transaction_branch_event = 80;
180
181	srand(seed);
182
183	uint32_t test1 = 1024; // TEST 1 : instruction without branch
184	uint32_t test2 = 1024; // TEST 2 : sequence : 1 branch, 1 delayed slot
185
186	SC_START(0);
187	LABEL("Initialisation");
188
189	for (uint32_t i=0; i<_param->_nb_context; ++i)
190	{
191	in_PREDICT_VAL [i]->write(0);
192	in_BRANCH_EVENT_ACK [i]->write(0);
193	}
194
195	for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
196	for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
197	{
198	in_DECOD_VAL [i][j]->write(0);
199	}
200
201	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
202	{
203	in_BRANCH_COMPLETE_VAL [i]->write(0);
204	}
205
206	LABEL("Reset");
207	in_NRESET->write(0);
208	SC_START(5);
209	in_NRESET->write(1);
210
211	for (uint32_t i=0; i<_param->_nb_context; ++i)
212	{
213	TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(),1); // Accept new request
214	TEST(Tcontrol_t,out_BRANCH_EVENT_VAL [i]->read(),0);
215	TEST(Tdepth_t ,out_DEPTH_CURRENT [i]->read(),0);
216	TEST(Tdepth_t ,out_DEPTH_MIN [i]->read(),0);
217	TEST(Tdepth_t ,out_DEPTH_MAX [i]->read(),0);
218	}
219
220	for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
221	for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
222	{
223	TEST(Tcontrol_t,out_DECOD_ACK [i][j]->read(),0); // No decod instruction
224	}
225
226	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
227	{
228	TEST(Tcontrol_t,out_BRANCH_COMPLETE_ACK [i]->read(),1); // Accept new branch_complete
229	}
230
231	LABEL("Loop of Test");
232
233	Taddress_t PC_PREVIOUS [_param->_nb_context];
234	Taddress_t PC_CURRENT [_param->_nb_context];
235	Tcontrol_t PC_CURRENT_IS_DS_TAKE [_param->_nb_context];
236
237	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
238	{
239	LABEL("Iteration %d",iteration);
240
241	// TEST 1 : instruction without branch
242	for (uint32_t test=0; test<test1; ++test)
243	{
244	for (uint32_t i=0; i<_param->_nb_context; ++i)
245	{
246	PC_CURRENT [i] = (0x100000>>2);
247	PC_CURRENT_IS_DS_TAKE [i] = 0;
248	PC_PREVIOUS [i] = PC_CURRENT[i]-1;
249	}
250
251	for (uint32_t i=0; i<_param->_nb_context; ++i)
252	{
253	in_PREDICT_VAL [i]->write((rand()%100)<percent_transaction_predict);
254	in_PREDICT_PC_PREVIOUS [i]->write(PC_PREVIOUS [i]);
255	in_PREDICT_PC_CURRENT [i]->write(PC_CURRENT [i]);
256	in_PREDICT_PC_CURRENT_IS_DS_TAKE [i]->write(PC_CURRENT_IS_DS_TAKE[i]);
257	}
258
259	SC_START(1);
260
261	for (uint32_t i=0; i<_param->_nb_context; ++i)
262	// Test if transaction
263	if (in_PREDICT_VAL [i]->read() and out_PREDICT_ACK [i]->read())
264	{
265	TEST(Taddress_t ,out_PREDICT_PC_NEXT [i]->read(),PC_CURRENT[i]+_param->_nb_instruction[i]);
266	TEST(Tcontrol_t ,out_PREDICT_PC_NEXT_IS_DS_TAKE [i]->read(),0);
267	for (uint32_t j=0; j<_param->_nb_instruction[i]; ++j)
268	TEST(Tcontrol_t ,out_PREDICT_INSTRUCTION_ENABLE [i][j]->read(),1);
269	TEST(Tinst_ifetch_ptr_t,out_PREDICT_INST_IFETCH_PTR [i]->read(),0);
270	TEST(Tbranch_state_t ,out_PREDICT_BRANCH_STATE [i]->read(),BRANCH_STATE_NONE);
271	TEST(Tprediction_ptr_t ,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]->read(),0);
272
273	PC_PREVIOUS [i] = PC_CURRENT [i];
274	PC_CURRENT [i] = out_PREDICT_PC_NEXT [i]->read();
275	PC_CURRENT_IS_DS_TAKE [i] = out_PREDICT_PC_NEXT_IS_DS_TAKE [i]->read();
276	}
277
278	// Test another output
279	for (uint32_t i=0; i<_param->_nb_context; ++i)
280	{
281	TEST(Tcontrol_t,out_BRANCH_EVENT_VAL [i]->read(),0);
282	TEST(Tdepth_t ,out_DEPTH_CURRENT [i]->read(),0);
283	TEST(Tdepth_t ,out_DEPTH_MIN [i]->read(),0);
284	TEST(Tdepth_t ,out_DEPTH_MAX [i]->read(),0);
285	}
286
287	for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
288	for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
289	{
290	TEST(Tcontrol_t,out_DECOD_ACK [i][j]->read(),0); // No decod instruction
291	}
292
293	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
294	{
295	TEST(Tcontrol_t,out_BRANCH_COMPLETE_ACK [i]->read(),1); // Accept new branch_complete
296	}
297	}
298
299	SC_START(1);
300	}
301
302	/********************************************************
303	* Simulation - End
304	********************************************************/
305
306	TEST_OK ("End of Simulation");
307	delete _time;
308
309	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
310
311	delete in_CLOCK;
312	delete in_NRESET;
313
314	DELETE1_SC_SIGNAL( in_PREDICT_VAL ,_param->_nb_context);
315	DELETE1_SC_SIGNAL(out_PREDICT_ACK ,_param->_nb_context);
316	DELETE1_SC_SIGNAL( in_PREDICT_PC_PREVIOUS ,_param->_nb_context);
317	DELETE1_SC_SIGNAL( in_PREDICT_PC_CURRENT ,_param->_nb_context);
318	DELETE1_SC_SIGNAL( in_PREDICT_PC_CURRENT_IS_DS_TAKE ,_param->_nb_context);
319	DELETE1_SC_SIGNAL(out_PREDICT_PC_NEXT ,_param->_nb_context);
320	DELETE1_SC_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE ,_param->_nb_context);
321	DELETE1_SC_SIGNAL(out_PREDICT_INST_IFETCH_PTR ,_param->_nb_context);
322	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,_param->_nb_context);
323	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context);
324
325	DELETE2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[it1]);
326	DELETE2_SC_SIGNAL( in_DECOD_VAL ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
327	DELETE2_SC_SIGNAL(out_DECOD_ACK ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
328	DELETE2_SC_SIGNAL( in_DECOD_CONTEXT_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
329	DELETE2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
330	DELETE2_SC_SIGNAL( in_DECOD_BRANCH_STATE ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
331	DELETE2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
332	DELETE2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
333	DELETE2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
334	DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
335	DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
336
337	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete);
338	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete);
339	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete);
340	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete);
341	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS ,_param->_nb_inst_branch_complete);
342	DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_FLAG ,_param->_nb_inst_branch_complete);
343	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
344	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete);
345	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete);
346	DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete);
347
348	DELETE1_SC_SIGNAL(out_BRANCH_EVENT_VAL ,_param->_nb_context);
349	DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ACK ,_param->_nb_context);
350	//DELETE1_SC_SIGNAL(out_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context);
351	//DELETE1_SC_SIGNAL(out_BRANCH_EVENT_DEPTH ,_param->_nb_context);
352	//DELETE1_SC_SIGNAL(out_BRANCH_EVENT_MISS_PREDICTION,_param->_nb_context);
353	DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context);
354	DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context);
355
356	DELETE1_SC_SIGNAL(out_DEPTH_CURRENT ,_param->_nb_context);
357	DELETE1_SC_SIGNAL(out_DEPTH_MIN ,_param->_nb_context);
358	DELETE1_SC_SIGNAL(out_DEPTH_MAX ,_param->_nb_context);
359	#endif
360
361	delete _Prediction_unit;
362	#ifdef STATISTICS
363	delete _parameters_statistics;
364	#endif
365	}

Note: See TracBrowser for help on using the repository browser.

Download in other formats: