[81] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id$ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace prediction_unit { |
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| 17 | namespace update_prediction_table { |
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| 18 | |
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| 19 | |
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| 20 | #undef FUNCTION |
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| 21 | #define FUNCTION "Update_Prediction_Table::genMoore" |
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| 22 | void Update_Prediction_Table::genMoore (void) |
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| 23 | { |
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[88] | 24 | log_begin(Update_Prediction_Table,FUNCTION); |
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| 25 | log_function(Update_Prediction_Table,FUNCTION,_name.c_str()); |
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[81] | 26 | |
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[88] | 27 | if (PORT_READ(in_NRESET) == 1) |
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| 28 | { |
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| 29 | |
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[81] | 30 | // =================================================================== |
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| 31 | // =====[ DEPTH ]===================================================== |
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| 32 | // =================================================================== |
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| 33 | |
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[82] | 34 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 35 | { |
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[101] | 36 | // is a valid instruction ? |
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| 37 | // If DEPTH_CURRENT : |
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| 38 | // equal at DEPTH_MIN -> not speculative |
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| 39 | // not include ]DEPTH_MIN:DEPTH_MAX] -> previous branch miss |
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| 40 | // include ]DEPTH_MIN:DEPTH_MAX] -> speculative |
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| 41 | |
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[122] | 42 | uint32_t bottom = reg_UPT_BOTTOM [i]; |
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| 43 | uint32_t top = reg_UPT_TOP [i]; |
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| 44 | bool empty = reg_UPT_EMPTY [i]; |
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| 45 | |
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| 46 | // Depth_val is set when state is ok and the UPT[top] is empty |
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| 47 | PORT_WRITE(out_DEPTH_VAL [i],((reg_UPDATE_PREDICTION_TABLE [i][top]._state == UPDATE_PREDICTION_STATE_EMPTY) |
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| 48 | and (reg_UFPT_EVENT_STATE [i] == UFPT_EVENT_STATE_OK) |
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| 49 | and (reg_UPT_EVENT_STATE [i] == UPT_EVENT_STATE_OK) |
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[105] | 50 | )); |
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[88] | 51 | if (_param->_have_port_depth) |
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| 52 | { |
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[122] | 53 | PORT_WRITE(out_DEPTH_CURRENT [i], top); |
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| 54 | PORT_WRITE(out_DEPTH_MIN [i], bottom); |
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| 55 | PORT_WRITE(out_DEPTH_MAX [i], top); |
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[88] | 56 | } |
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[122] | 57 | PORT_WRITE(out_DEPTH_FULL [i], not empty and (top == bottom)); |
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[82] | 58 | } |
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[88] | 59 | |
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[81] | 60 | // =================================================================== |
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| 61 | // =====[ UPDATE ]==================================================== |
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| 62 | // =================================================================== |
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[122] | 63 | { |
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| 64 | bool flush_ufpt [_param->_nb_context]; // event ufpt -> restore RAS, else update upt |
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| 65 | bool flush_upt [_param->_nb_context]; // event upt -> restore RAS, else restore others structure |
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| 66 | bool ufpt_can_update [_param->_nb_context]; |
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| 67 | bool upt_can_update [_param->_nb_context]; |
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| 68 | Tdepth_t tab_ufpt_depth [_param->_nb_context]; |
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| 69 | Tdepth_t tab_upt_depth [_param->_nb_context]; |
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| 70 | |
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| 71 | // Init |
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| 72 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 73 | { |
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| 74 | ufpt_event_state_t ufpt_event_state = reg_UFPT_EVENT_STATE [i]; |
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| 75 | upt_event_state_t upt_event_state = reg_UPT_EVENT_STATE [i]; |
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| 76 | |
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| 77 | flush_ufpt [i] = (ufpt_event_state == UFPT_EVENT_STATE_KO_FLUSH); |
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| 78 | flush_upt [i] = ((upt_event_state == UPT_EVENT_STATE_KO_MISS_FLUSH_UPT) or |
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| 79 | (upt_event_state == UPT_EVENT_STATE_KO_EVENT_FLUSH_UPT)); |
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| 80 | ufpt_can_update [i] = true; |
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| 81 | upt_can_update [i] = true; |
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| 82 | tab_ufpt_depth [i] = reg_UFPT_UPDATE [i]; |
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| 83 | tab_upt_depth [i] = reg_UPT_UPDATE [i]; |
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| 84 | } |
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[81] | 85 | |
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| 86 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
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| 87 | { |
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[122] | 88 | Tcontext_t context = (reg_UPDATE_PRIORITY+i)%_param->_nb_context; |
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[81] | 89 | |
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[88] | 90 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPDATE [%d] (genMoore)",i); |
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| 91 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
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[122] | 92 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * flush_ufpt : %d",flush_ufpt[context]); |
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| 93 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * flush_upt : %d",flush_upt [context]); |
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[81] | 94 | |
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[88] | 95 | Tcontrol_t val = false; |
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| 96 | Tcontrol_t val_without_ack = false; |
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[122] | 97 | Tcontrol_t miss_prediction = 0; // not necessary init |
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| 98 | Tcontrol_t direction_good = 0; // not necessary init |
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| 99 | Tcontrol_t prediction_ifetch = 0; // not necessary init |
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| 100 | Tcontrol_t btb_val = 0; // not necessary init |
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| 101 | Taddress_t btb_address_src = 0; // not necessary init |
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| 102 | Taddress_t btb_address_dest = 0; // not necessary init |
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| 103 | Tbranch_condition_t btb_condition = 0; // not necessary init |
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| 104 | Tcontrol_t dir_val = 0; // not necessary init |
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| 105 | Thistory_t dir_history = 0; // not necessary init |
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| 106 | Tcontrol_t ras_val = 0; // not necessary init |
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| 107 | Tcontrol_t ras_flush = 0; // not necessary init |
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| 108 | Tcontrol_t ras_push = 0; // not necessary init |
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| 109 | Taddress_t ras_address = 0; // not necessary init |
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| 110 | Tptr_t ras_index = 0; // not necessary init |
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[82] | 111 | |
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[88] | 112 | // Test if update fetch prediction table need update port |
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[122] | 113 | if (flush_ufpt [context]) |
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[88] | 114 | { |
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[122] | 115 | if (ufpt_can_update [context]) |
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[88] | 116 | { |
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| 117 | // Update Fetch Prediction Table |
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[122] | 118 | // An update of ufpt is to previous miss. Just restore Prediction_unit |
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[88] | 119 | |
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[122] | 120 | // Read information |
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[88] | 121 | Tdepth_t depth = tab_ufpt_depth[context]; |
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| 122 | ufpt_state_t state = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state; |
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| 123 | Tbranch_condition_t condition = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition; |
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| 124 | |
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| 125 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Fetch Prediction Table"); |
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| 126 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth ); |
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| 127 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * state : %s",toString(state ).c_str()); |
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| 128 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * condition : %s",toString(condition).c_str()); |
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| 129 | |
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| 130 | val = (state == UPDATE_FETCH_PREDICTION_STATE_EVENT); |
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[94] | 131 | // val_without_ack = not update_ras(condition); |
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| 132 | |
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[122] | 133 | miss_prediction = 1; // need update, also previous miss |
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[88] | 134 | // direction_good = ; |
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[112] | 135 | prediction_ifetch = 1; |
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[88] | 136 | btb_val = 0; // don't update btb (is update by the event branch) |
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[112] | 137 | // btb_address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src ; |
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| 138 | // btb_address_dest = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest; |
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| 139 | // btb_condition = condition; |
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[122] | 140 | dir_val = update_dir(condition); |
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[112] | 141 | dir_history = reg_UPDATE_PREDICTION_TABLE [context][depth]._history; |
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[122] | 142 | ras_val = update_ras(condition); // repop/ repush data -> don't corrupt ras |
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| 143 | ras_flush = 0; // no ras corruption |
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[88] | 144 | ras_push = push_ras(condition); |
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| 145 | ras_address = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._address_ras; |
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| 146 | ras_index = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._index_ras; |
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| 147 | |
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| 148 | internal_UPDATE_FROM_UFPT [i] = true; |
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| 149 | internal_UPDATE_DEPTH [i] = depth; |
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| 150 | internal_UPDATE_RAS [i] = false; |
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[81] | 151 | |
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[88] | 152 | // Warning : don't update same entry |
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| 153 | if (depth == reg_UFPT_BOTTOM[context]) |
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[122] | 154 | ufpt_can_update [context] = false; |
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| 155 | else |
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| 156 | // update pointer |
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| 157 | tab_ufpt_depth[context] = ((depth==0)?_param->_size_ufpt_queue[context]:depth)-1; |
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[88] | 158 | } |
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| 159 | } |
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| 160 | else |
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| 161 | { |
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[122] | 162 | if (upt_can_update [context]) |
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[88] | 163 | { |
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| 164 | // Update Prediction Table |
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[122] | 165 | |
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| 166 | // Read information |
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[88] | 167 | Tdepth_t depth = tab_upt_depth[context]; |
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| 168 | upt_state_t state = reg_UPDATE_PREDICTION_TABLE [context][depth]._state; |
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| 169 | Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; |
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| 170 | Tcontrol_t ifetch = reg_UPDATE_PREDICTION_TABLE [context][depth]._ifetch_prediction; |
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| 171 | |
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| 172 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Prediction Table"); |
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| 173 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth ); |
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| 174 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * state : %s",toString(state ).c_str()); |
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| 175 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * condition : %s",toString(condition).c_str()); |
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| 176 | |
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[122] | 177 | // is the valid branch (valid branch hit, or valid branch miss) |
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| 178 | Tcontrol_t state_is_ok_ko = ((state == UPDATE_PREDICTION_STATE_OK ) or |
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| 179 | (state == UPDATE_PREDICTION_STATE_KO )); |
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[81] | 180 | |
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[122] | 181 | if (not flush_upt [context]) |
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[88] | 182 | { |
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[122] | 183 | // no event, just update predictor |
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| 184 | val = (state == UPDATE_PREDICTION_STATE_OK); |
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| 185 | val_without_ack = false; |
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[88] | 186 | } |
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| 187 | else |
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| 188 | { |
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[122] | 189 | // event, restore event (if need update) |
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| 190 | val = ( (state == UPDATE_PREDICTION_STATE_KO ) or |
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| 191 | ((state == UPDATE_PREDICTION_STATE_EVENT) and need_update(condition))); |
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| 192 | val_without_ack = ( (state == UPDATE_PREDICTION_STATE_EVENT) and not need_update(condition)); |
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[88] | 193 | } |
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[81] | 194 | |
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[88] | 195 | miss_prediction = (state != UPDATE_PREDICTION_STATE_OK); |
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| 196 | direction_good = reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take ; |
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[112] | 197 | prediction_ifetch = ifetch; |
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[95] | 198 | btb_val = state_is_ok_ko and update_btb(condition); |
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[88] | 199 | btb_address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src ; |
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| 200 | btb_address_dest = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest; |
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| 201 | btb_condition = condition; |
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[122] | 202 | dir_val = ifetch and update_dir(condition); // if not ifetch, then static prediction -> history is wrong |
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[88] | 203 | dir_history = reg_UPDATE_PREDICTION_TABLE [context][depth]._history ; |
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| 204 | ras_val = update_ras(condition); // repop/ repush data -> don't corrupt ras |
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[122] | 205 | ras_flush = (state == UPDATE_PREDICTION_STATE_KO); // miss prediction on RAS -> RAS is corrupted |
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[88] | 206 | ras_push = push_ras(condition); |
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[107] | 207 | // If corrupt, RAS must be flushed. |
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| 208 | // Also, if instruction l.jal, l.jalr, push addr+2 (delay slot), else (no flush) restore RAS |
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| 209 | ras_address = (ras_flush)?(reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src+2):reg_UPDATE_PREDICTION_TABLE [context][depth]._address_ras; |
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[88] | 210 | ras_index = reg_UPDATE_PREDICTION_TABLE [context][depth]._index_ras; |
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| 211 | |
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| 212 | internal_UPDATE_FROM_UFPT [i] = false; |
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| 213 | internal_UPDATE_DEPTH [i] = depth; |
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[122] | 214 | internal_UPDATE_RAS [i] = flush_upt [context]; |
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[88] | 215 | |
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| 216 | // Warning : don't update same entry |
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[122] | 217 | if (flush_upt [context]) |
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[88] | 218 | { |
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[122] | 219 | // Stop condition |
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[88] | 220 | if ((depth == reg_UPT_BOTTOM[context]) or not (val or val_without_ack)) |
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[122] | 221 | upt_can_update [context] = false; |
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[88] | 222 | |
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[122] | 223 | // flush -> ptr is decrease |
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[88] | 224 | tab_upt_depth[context] = (depth==0)?(_param->_size_upt_queue[context]-1):(depth-1); |
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| 225 | } |
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| 226 | else |
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| 227 | { |
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[122] | 228 | // Stop condition |
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[88] | 229 | if ((depth == reg_UPT_TOP [context]) or not (val or val_without_ack)) |
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[122] | 230 | upt_can_update [context] = false; |
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[88] | 231 | |
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[122] | 232 | // flush -> ptr is increase |
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[88] | 233 | tab_upt_depth[context] = (depth+1)%_param->_size_upt_queue[context]; |
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| 234 | } |
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| 235 | } |
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| 236 | } |
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[95] | 237 | |
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[88] | 238 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * val : %d",val ); |
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| 239 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * val_without_ack : %d",val_without_ack); |
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[95] | 240 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_prediction : %d",miss_prediction); |
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| 241 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * direction_good : %d",direction_good ); |
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[88] | 242 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * btb_val : %d",btb_val); |
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| 243 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * dir_val : %d",dir_val); |
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| 244 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ras_val : %d",ras_val); |
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| 245 | |
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| 246 | internal_UPDATE_VAL [i] = val; |
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| 247 | internal_UPDATE_VAL_WITHOUT_ACK [i] = val_without_ack; |
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| 248 | internal_UPDATE_CONTEXT_ID [i] = context; |
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| 249 | |
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| 250 | if (val) |
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| 251 | { |
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| 252 | if (_param->_have_port_context_id) |
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| 253 | PORT_WRITE(out_UPDATE_CONTEXT_ID [i],context ); |
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| 254 | PORT_WRITE(out_UPDATE_MISS_PREDICTION [i],miss_prediction ); |
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| 255 | PORT_WRITE(out_UPDATE_DIRECTION_GOOD [i],direction_good ); |
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[112] | 256 | PORT_WRITE(out_UPDATE_PREDICTION_IFETCH [i],prediction_ifetch ); |
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[88] | 257 | PORT_WRITE(out_UPDATE_BTB_VAL [i],btb_val ); |
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| 258 | PORT_WRITE(out_UPDATE_BTB_ADDRESS_SRC [i],btb_address_src ); |
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| 259 | PORT_WRITE(out_UPDATE_BTB_ADDRESS_DEST [i],btb_address_dest ); |
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| 260 | PORT_WRITE(out_UPDATE_BTB_CONDITION [i],btb_condition ); |
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| 261 | PORT_WRITE(out_UPDATE_DIR_VAL [i],dir_val ); |
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| 262 | if (_param->_have_port_history) |
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| 263 | PORT_WRITE(out_UPDATE_DIR_HISTORY [i],dir_history ); |
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| 264 | PORT_WRITE(out_UPDATE_RAS_VAL [i],ras_val ); |
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[94] | 265 | PORT_WRITE(out_UPDATE_RAS_FLUSH [i],ras_flush ); |
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[88] | 266 | PORT_WRITE(out_UPDATE_RAS_PUSH [i],ras_push ); |
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| 267 | PORT_WRITE(out_UPDATE_RAS_ADDRESS [i],ras_address ); |
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| 268 | PORT_WRITE(out_UPDATE_RAS_INDEX [i],ras_index ); |
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| 269 | } |
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[81] | 270 | } |
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[122] | 271 | } |
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| 272 | |
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[94] | 273 | // =================================================================== |
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| 274 | // =====[ BRANCH_EVENT ]============================================== |
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| 275 | // =================================================================== |
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[122] | 276 | |
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| 277 | // For all context ... |
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[94] | 278 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 279 | { |
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[122] | 280 | // ... send an event if upt must be update the context |
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| 281 | Tcontrol_t val = ((reg_UPT_EVENT_STATE [i] == UPT_EVENT_STATE_KO_DECODE_UPDATE_CONTEXT) or |
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| 282 | (reg_UPT_EVENT_STATE [i] == UPT_EVENT_STATE_KO_COMMIT_UPDATE_CONTEXT)); |
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[98] | 283 | if (_param->_have_port_depth) |
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| 284 | PORT_WRITE(out_BRANCH_EVENT_DEPTH [i],reg_EVENT_DEPTH [i]); |
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[94] | 285 | PORT_WRITE(out_BRANCH_EVENT_ADDRESS_SRC [i],reg_EVENT_ADDRESS_SRC [i]); |
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| 286 | PORT_WRITE(out_BRANCH_EVENT_ADDRESS_DEST_VAL [i],reg_EVENT_ADDRESS_DEST_VAL [i]); |
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| 287 | PORT_WRITE(out_BRANCH_EVENT_ADDRESS_DEST [i],reg_EVENT_ADDRESS_DEST [i]); |
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[119] | 288 | PORT_WRITE(out_BRANCH_EVENT_CAN_CONTINUE [i],reg_EVENT_CAN_CONTINUE [i]); |
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| 289 | |
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[94] | 290 | internal_BRANCH_EVENT_VAL [i] = val; |
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| 291 | } |
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[122] | 292 | |
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[94] | 293 | } |
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[112] | 294 | else |
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| 295 | { |
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[122] | 296 | // Reset |
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[112] | 297 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
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| 298 | { |
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| 299 | internal_UPDATE_VAL [i] = 0; |
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| 300 | internal_UPDATE_VAL_WITHOUT_ACK [i] = 0; |
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[123] | 301 | internal_UPDATE_CONTEXT_ID [i] = 0; |
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| 302 | |
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[112] | 303 | } |
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| 304 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 305 | { |
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| 306 | internal_BRANCH_EVENT_VAL [i] = 0; |
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| 307 | } |
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| 308 | } |
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[82] | 309 | |
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[123] | 310 | // Write output |
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| 311 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
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| 312 | PORT_WRITE(out_UPDATE_VAL [i],internal_UPDATE_VAL [i]); |
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| 313 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 314 | PORT_WRITE(out_BRANCH_EVENT_VAL [i],internal_BRANCH_EVENT_VAL [i]); |
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[112] | 315 | |
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[88] | 316 | log_end(Update_Prediction_Table,FUNCTION); |
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[81] | 317 | }; |
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| 318 | |
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| 319 | }; // end namespace update_prediction_table |
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| 320 | }; // end namespace prediction_unit |
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| 321 | }; // end namespace front_end |
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| 322 | }; // end namespace multi_front_end |
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| 323 | }; // end namespace core |
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| 324 | |
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| 325 | }; // end namespace behavioural |
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| 326 | }; // end namespace morpheo |
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| 327 | #endif |
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