| 1 | /* |
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| 2 | * $Id: Commit_unit_allocation.cpp 145 2010-10-13 18:15:51Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h" |
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| 9 | #include "Behavioural/include/Allocation.h" |
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| 10 | #include "Common/include/Max.h" |
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| 11 | #include "Common/include/Filename.h" |
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| 12 | |
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| 13 | namespace morpheo { |
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| 14 | namespace behavioural { |
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| 15 | namespace core { |
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| 16 | namespace multi_ooo_engine { |
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| 17 | namespace ooo_engine { |
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| 18 | namespace commit_unit { |
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| 19 | |
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| 20 | #undef FUNCTION |
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| 21 | #define FUNCTION "Commit_unit::allocation" |
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| 22 | void Commit_unit::allocation ( |
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| 23 | #ifdef STATISTICS |
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| 24 | morpheo::behavioural::Parameters_Statistics * param_statistics |
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| 25 | #else |
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| 26 | void |
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| 27 | #endif |
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| 28 | ) |
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| 29 | { |
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| 30 | log_begin(Commit_unit,FUNCTION); |
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| 31 | |
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| 32 | _component = new Component (_usage); |
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| 33 | |
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| 34 | Entity * entity = _component->set_entity (_name |
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| 35 | ,"Commit_unit" |
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| 36 | #ifdef POSITION |
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| 37 | ,COMBINATORY |
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| 38 | #endif |
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| 39 | ); |
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| 40 | |
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| 41 | _interfaces = entity->set_interfaces(); |
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| 42 | |
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| 43 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 44 | { |
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| 45 | Interface * interface = _interfaces->set_interface("" |
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| 46 | #ifdef POSITION |
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| 47 | ,IN |
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| 48 | ,SOUTH, |
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| 49 | _("Generalist interface") |
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| 50 | #endif |
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| 51 | ); |
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| 52 | |
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| 53 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
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| 54 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
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| 55 | } |
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| 56 | |
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| 57 | // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 58 | { |
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| 59 | ALLOC2_INTERFACE_BEGIN("insert", IN, SOUTH, _("Interface with rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 60 | |
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| 61 | _ALLOC2_VALACK_IN ( in_INSERT_VAL ,VAL,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 62 | _ALLOC2_VALACK_OUT (out_INSERT_ACK ,ACK,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 63 | _ALLOC2_SIGNAL_IN ( in_INSERT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 64 | _ALLOC2_SIGNAL_IN ( in_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 65 | _ALLOC2_SIGNAL_OUT (out_INSERT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 66 | // _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_ID ,"rename_unit_id" ,Tcontext_t ,_param->_size_rename_unit_id ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 67 | _ALLOC2_SIGNAL_IN ( in_INSERT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 68 | _ALLOC2_SIGNAL_IN_COND ( in_INSERT_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_rat_scheme[it1] == RAT_DEPTH_SAVE); |
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| 69 | #ifdef STATISTICS |
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| 70 | _ALLOC2_SIGNAL_IN ( in_INSERT_INSTRUCTION ,"instruction" ,uint32_t ,32 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 71 | #endif |
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| 72 | _ALLOC2_SIGNAL_IN ( in_INSERT_TYPE ,"type" ,Ttype_t ,_param->_size_type ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 73 | _ALLOC2_SIGNAL_IN ( in_INSERT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 74 | _ALLOC2_SIGNAL_IN ( in_INSERT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 75 | _ALLOC2_SIGNAL_IN ( in_INSERT_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 76 | _ALLOC2_SIGNAL_IN ( in_INSERT_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 77 | #ifdef DEBUG |
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| 78 | _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 79 | #endif |
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| 80 | _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS_NEXT ,"address_next" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 81 | _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 82 | _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION_USE ,"exception_use" ,Texception_t ,_param->_size_exception_use ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 83 | _ALLOC2_SIGNAL_IN ( in_INSERT_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 84 | _ALLOC2_SIGNAL_IN ( in_INSERT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 85 | #ifdef DEBUG |
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| 86 | _ALLOC2_SIGNAL_IN ( in_INSERT_READ_RA ,"read_ra" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 87 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 88 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 89 | #endif |
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| 90 | _ALLOC2_SIGNAL_IN ( in_INSERT_READ_RB ,"read_rb" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 91 | #ifdef DEBUG |
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| 92 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 93 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 94 | _ALLOC2_SIGNAL_IN ( in_INSERT_READ_RC ,"read_rc" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 95 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 96 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 97 | #endif |
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| 98 | _ALLOC2_SIGNAL_IN ( in_INSERT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 99 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 100 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_OLD ,"num_reg_rd_phy_old" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 101 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_NEW ,"num_reg_rd_phy_new" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 102 | _ALLOC2_SIGNAL_IN ( in_INSERT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 103 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 104 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_OLD ,"num_reg_re_phy_old" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 105 | _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW ,"num_reg_re_phy_new" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 106 | |
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| 107 | ALLOC2_INTERFACE_END(_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); |
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| 108 | } |
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| 109 | |
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| 110 | // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 111 | { |
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| 112 | ALLOC2_INTERFACE_BEGIN("retire",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 113 | |
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| 114 | _ALLOC2_VALACK_OUT(out_RETIRE_VAL ,VAL,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 115 | _ALLOC2_VALACK_IN ( in_RETIRE_ACK ,ACK,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 116 | _ALLOC2_SIGNAL_OUT(out_RETIRE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 117 | _ALLOC2_SIGNAL_OUT(out_RETIRE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 118 | // _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_ID ,"rename_unit_id" ,Tcontext_t ,_param->_size_rename_unit_id ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 119 | // _ALLOC2_SIGNAL_OUT_COND(out_RETIRE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_rat_scheme[it1] == RAT_DEPTH_SAVE); |
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| 120 | _ALLOC2_SIGNAL_OUT(out_RETIRE_USE_STORE_QUEUE ,"use_store_queue" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 121 | _ALLOC2_SIGNAL_OUT(out_RETIRE_USE_LOAD_QUEUE ,"use_load_queue" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 122 | _ALLOC2_SIGNAL_OUT(out_RETIRE_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 123 | _ALLOC2_SIGNAL_OUT(out_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 124 | // _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 125 | // _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 126 | // _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 127 | // _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 128 | // _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 129 | // _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 130 | _ALLOC2_SIGNAL_OUT(out_RETIRE_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 131 | _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 132 | _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_PHY_OLD ,"num_reg_rd_phy_old" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 133 | _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_PHY_NEW ,"num_reg_rd_phy_new" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 134 | _ALLOC2_SIGNAL_OUT(out_RETIRE_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 135 | _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 136 | _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_OLD ,"num_reg_re_phy_old" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 137 | _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_NEW ,"num_reg_re_phy_new" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 138 | _ALLOC2_SIGNAL_OUT(out_RETIRE_RESTORE ,"RESTORE" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 139 | _ALLOC2_SIGNAL_OUT(out_RETIRE_RESTORE_RD_PHY_OLD ,"RESTORE_RD_PHY_OLD" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 140 | _ALLOC2_SIGNAL_OUT(out_RETIRE_RESTORE_RE_PHY_OLD ,"RESTORE_RE_PHY_OLD" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 141 | |
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| 142 | ALLOC2_INTERFACE_END(_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); |
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| 143 | } |
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| 144 | |
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| 145 | // ~~~~~[ Interface : "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 146 | { |
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| 147 | ALLOC2_INTERFACE_BEGIN("retire_event",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_front_end,_param->_nb_context[it1]); |
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| 148 | |
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| 149 | _ALLOC2_VALACK_OUT (out_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end,_param->_nb_context[it1]); |
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| 150 | _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end,_param->_nb_context[it1]); |
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| 151 | _ALLOC2_SIGNAL_OUT (out_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state,_param->_nb_front_end,_param->_nb_context[it1]); |
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| 152 | // _ALLOC2_SIGNAL_OUT (out_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]); |
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| 153 | _ALLOC2_SIGNAL_OUT (out_RETIRE_EVENT_STOP ,"stop" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]); |
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| 154 | _ALLOC2_SIGNAL_OUT_COND(out_RETIRE_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type ,_param->_nb_front_end,_param->_nb_context[it1],_param->_front_end_rat_scheme[it1] == RAT_DEPTH_SAVE); |
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| 155 | _ALLOC2_SIGNAL_OUT_COND(out_RETIRE_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end,_param->_nb_context[it1],_param->_front_end_rat_scheme[it1] == RAT_DEPTH_SAVE); |
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| 156 | |
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| 157 | ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]); |
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| 158 | } |
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| 159 | |
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| 160 | // ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 161 | { |
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| 162 | ALLOC1_INTERFACE_BEGIN("commit",IN,EAST,_("End of execute."),_param->_nb_inst_commit); |
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| 163 | |
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| 164 | ALLOC1_VALACK_IN ( in_COMMIT_VAL ,VAL); |
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| 165 | ALLOC1_VALACK_OUT(out_COMMIT_ACK ,ACK); |
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| 166 | ALLOC1_SIGNAL_IN ( in_COMMIT_WEN ,"wen" ,Tcontrol_t ,1 ); |
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| 167 | ALLOC1_SIGNAL_IN ( in_COMMIT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr ); |
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| 168 | // ALLOC1_SIGNAL_IN ( in_COMMIT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); |
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| 169 | // ALLOC1_SIGNAL_IN ( in_COMMIT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); |
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| 170 | ALLOC1_SIGNAL_IN ( in_COMMIT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); |
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| 171 | ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data ); |
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| 172 | ALLOC1_SIGNAL_IN ( in_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); |
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| 173 | ALLOC1_SIGNAL_IN ( in_COMMIT_NO_SEQUENCE ,"no_sequence",Tcontrol_t ,1 ); |
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| 174 | ALLOC1_SIGNAL_IN ( in_COMMIT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); |
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| 175 | // ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register+_param->_size_rename_unit_id); |
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| 176 | ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); |
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| 177 | |
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| 178 | ALLOC1_INTERFACE_END(_param->_nb_inst_commit); |
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| 179 | } |
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| 180 | |
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| 181 | // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 182 | { |
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| 183 | ALLOC1_INTERFACE_BEGIN("reexecute",OUT,EAST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_reexecute); |
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| 184 | |
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| 185 | ALLOC1_VALACK_OUT(out_REEXECUTE_VAL ,VAL); |
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| 186 | ALLOC1_VALACK_IN ( in_REEXECUTE_ACK ,ACK); |
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| 187 | ALLOC1_SIGNAL_OUT(out_REEXECUTE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); |
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| 188 | ALLOC1_SIGNAL_OUT(out_REEXECUTE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); |
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| 189 | ALLOC1_SIGNAL_OUT(out_REEXECUTE_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr ); |
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| 190 | ALLOC1_SIGNAL_OUT(out_REEXECUTE_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); |
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| 191 | ALLOC1_SIGNAL_OUT(out_REEXECUTE_TYPE ,"type" ,Ttype_t ,_param->_size_type); |
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| 192 | ALLOC1_SIGNAL_OUT(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); |
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| 193 | |
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| 194 | ALLOC1_INTERFACE_END(_param->_nb_inst_reexecute); |
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| 195 | } |
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| 196 | |
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| 197 | // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 198 | { |
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| 199 | ALLOC1_INTERFACE_BEGIN("branch_complete",OUT,WEST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_branch_complete); |
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| 200 | |
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| 201 | ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_VAL ,VAL); |
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| 202 | ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_ACK ,ACK); |
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| 203 | ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); |
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| 204 | ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); |
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| 205 | ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); |
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| 206 | ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); |
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| 207 | // ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_FLAG ,"flag" ,Tcontrol_t ,1); |
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| 208 | ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1); |
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| 209 | ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t ,1); |
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| 210 | |
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| 211 | ALLOC1_INTERFACE_END(_param->_nb_inst_branch_complete); |
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| 212 | } |
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| 213 | |
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| 214 | // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 215 | { |
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| 216 | ALLOC0_INTERFACE_BEGIN("update", OUT, WEST,_("Interface with to Context State.")); |
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| 217 | |
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| 218 | ALLOC0_VALACK_OUT(out_UPDATE_VAL ,VAL); |
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| 219 | ALLOC0_VALACK_IN ( in_UPDATE_ACK ,ACK); |
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| 220 | ALLOC0_SIGNAL_OUT(out_UPDATE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); |
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| 221 | ALLOC0_SIGNAL_OUT(out_UPDATE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); |
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| 222 | ALLOC0_SIGNAL_OUT(out_UPDATE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); |
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| 223 | ALLOC0_SIGNAL_OUT(out_UPDATE_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type); |
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| 224 | ALLOC0_SIGNAL_OUT(out_UPDATE_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1); |
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| 225 | ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); |
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| 226 | ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR_VAL ,"address_epcr_val",Tcontrol_t ,1); |
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| 227 | ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR ,"address_epcr" ,Taddress_t ,_param->_size_instruction_address); |
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| 228 | ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR_VAL ,"address_eear_val",Tcontrol_t ,1); |
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| 229 | ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR ,"address_eear" ,Tgeneral_data_t ,_param->_size_general_data); |
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| 230 | |
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| 231 | ALLOC0_INTERFACE_END(); |
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| 232 | } |
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| 233 | |
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| 234 | // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 235 | { |
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| 236 | ALLOC2_INTERFACE_BEGIN("event",IN,WEST,_("Interface with Context State (event)."),_param->_nb_front_end, _param->_nb_context[it1]); |
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| 237 | |
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| 238 | _ALLOC2_VALACK_IN ( in_EVENT_VAL , VAL ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 239 | _ALLOC2_VALACK_OUT(out_EVENT_ACK , ACK ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 240 | _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS ,"ADDRESS" ,Taddress_t,_param->_size_instruction_address,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 241 | _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT ,"ADDRESS_NEXT" ,Taddress_t,_param->_size_instruction_address,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 242 | _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL,"ADDRESS_NEXT_VAL",Tcontrol_t,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 243 | _ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE ,"IS_DS_TAKE" ,Tcontrol_t,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 244 | |
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| 245 | ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); |
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| 246 | } |
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| 247 | |
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| 248 | // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 249 | { |
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| 250 | ALLOC2_INTERFACE_BEGIN("nb_inst",OUT,WEST,_("Interface with Context State (synchronization)."),_param->_nb_front_end, _param->_nb_context[it1]); |
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| 251 | |
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| 252 | _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL ,"commit_all",Tcounter_t ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 253 | _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM ,"commit_mem",Tcounter_t ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 254 | _ALLOC2_SIGNAL_IN ( in_NB_INST_DECOD_ALL ,"decod_all" ,Tcounter_t ,_param->_size_nb_inst_decod ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 255 | |
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| 256 | ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); |
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| 257 | } |
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| 258 | |
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| 259 | // // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 260 | // { |
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| 261 | // ALLOC2_INTERFACE_BEGIN("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]); |
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| 262 | // |
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| 263 | // _ALLOC2_SIGNAL_IN ( in_DEPTH_MIN ,"min" ,Tdepth_t ,_param->_size_depth,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 264 | // _ALLOC2_SIGNAL_IN ( in_DEPTH_MAX ,"max" ,Tdepth_t ,_param->_size_depth,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 265 | // _ALLOC2_SIGNAL_IN ( in_DEPTH_FULL ,"full" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 266 | // |
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| 267 | // ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); |
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| 268 | // } |
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| 269 | |
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| 270 | |
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| 271 | // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 272 | { |
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| 273 | ALLOC2_INTERFACE_BEGIN("spr_read",IN ,EAST,_("Interface with special register file (read)."),_param->_nb_front_end, _param->_nb_context[it1]); |
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| 274 | |
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| 275 | _ALLOC2_SIGNAL_IN ( in_SPR_READ_SR_OVE ,"sr_ove" ,Tcontrol_t ,1,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 276 | |
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| 277 | ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); |
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| 278 | } |
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| 279 | |
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| 280 | // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 281 | { |
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| 282 | ALLOC2_INTERFACE_BEGIN("spr_write",OUT,EAST,_("Interface with special register file (write)."),_param->_nb_front_end, _param->_nb_context[it1]); |
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| 283 | |
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| 284 | _ALLOC2_VALACK_OUT(out_SPR_WRITE_VAL ,VAL,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 285 | _ALLOC2_VALACK_IN ( in_SPR_WRITE_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 286 | _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_F_VAL ,"sr_f_val" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 287 | _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_F ,"sr_f" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 288 | _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_CY_VAL ,"sr_cy_val" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 289 | _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_CY ,"sr_cy" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 290 | _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_OV_VAL ,"sr_ov_val" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 291 | _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_OV ,"sr_ov" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]); |
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| 292 | |
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| 293 | ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); |
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| 294 | } |
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| 295 | |
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| 296 | #ifdef DEBUG_TEST |
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| 297 | { |
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| 298 | ALLOC0_INTERFACE_BEGIN("info",OUT,EAST,_("Information.")); |
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| 299 | ALLOC0_SIGNAL_OUT(out_INFO_ROB_EMPTY ,"rob_empty" ,bool ,1); |
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| 300 | ALLOC0_INTERFACE_END(); |
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| 301 | } |
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| 302 | #endif |
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| 303 | |
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| 304 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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| 305 | { |
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| 306 | // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 307 | ALLOC1(internal_BANK_INSERT_VAL ,Tcontrol_t,_param->_nb_bank); |
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| 308 | ALLOC1(internal_BANK_INSERT_NUM_RENAME_UNIT ,uint32_t ,_param->_nb_bank); |
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| 309 | ALLOC1(internal_BANK_INSERT_NUM_INST ,uint32_t ,_param->_nb_bank); |
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| 310 | |
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| 311 | ALLOC2(internal_BANK_COMMIT_VAL ,Tcontrol_t,_param->_nb_bank,_param->_nb_bank_access_commit); |
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| 312 | ALLOC2(internal_BANK_COMMIT_NUM_INST ,uint32_t ,_param->_nb_bank,_param->_nb_bank_access_commit); |
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| 313 | ALLOC2(internal_BANK_COMMIT_ENTRY ,entry_t * ,_param->_nb_bank,_param->_nb_bank_access_commit); |
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| 314 | |
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| 315 | ALLOC1(internal_BANK_RETIRE_VAL ,Tcontrol_t,_param->_nb_bank); |
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| 316 | ALLOC1(internal_BANK_RETIRE_NUM_RENAME_UNIT ,uint32_t ,_param->_nb_bank); |
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| 317 | ALLOC1(internal_BANK_RETIRE_NUM_INST ,uint32_t ,_param->_nb_bank); |
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| 318 | // ALLOC1(internal_BANK_RETIRE_RESTORE ,Tcontrol_t,_param->_nb_bank); |
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| 319 | ALLOC1(internal_BANK_RETIRE_RESTORE_RD_PHY_OLD,Tcontrol_t,_param->_nb_bank); |
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| 320 | ALLOC1(internal_BANK_RETIRE_RESTORE_RE_PHY_OLD,Tcontrol_t,_param->_nb_bank); |
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| 321 | |
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| 322 | ALLOC1(internal_REEXECUTE_VAL ,Tcontrol_t,_param->_nb_inst_reexecute); |
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| 323 | ALLOC1(internal_REEXECUTE_NUM_BANK ,uint32_t ,_param->_nb_inst_reexecute); |
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| 324 | |
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| 325 | ALLOC1(internal_BRANCH_COMPLETE_VAL ,Tcontrol_t,_param->_nb_inst_branch_complete); |
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| 326 | ALLOC1(internal_BRANCH_COMPLETE_NUM_BANK ,uint32_t ,_param->_nb_inst_branch_complete); |
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| 327 | |
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| 328 | ALLOC2(internal_EVENT_ACK ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]); |
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| 329 | ALLOC2(internal_RETIRE_EVENT_VAL ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]); |
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| 330 | |
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| 331 | ALLOC3(internal_rat_gpr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); |
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| 332 | ALLOC3(internal_rat_spr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); |
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| 333 | |
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| 334 | |
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| 335 | // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 336 | ALLOC2 (_nb_cycle_idle ,double ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 337 | ALLOC1 (_rob ,std::list<entry_t*> ,_param->_nb_bank); |
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| 338 | |
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| 339 | ALLOC1 (reg_BANK_PTR ,uint32_t ,_param->_nb_bank); |
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| 340 | |
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| 341 | ALLOC2 (reg_NB_INST_COMMIT_ALL ,Tcounter_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 342 | ALLOC2 (reg_NB_INST_COMMIT_MEM ,Tcounter_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 343 | ALLOC3_COND(reg_NB_INST_DEPTH ,Tcounter_t ,_param->_nb_front_end,_param->_nb_context [it1],_param->_nb_branch_speculated[it1][it2],_param->_front_end_rat_scheme[it1] == RAT_DEPTH_SAVE); |
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| 344 | ALLOC2 (reg_EVENT_STATE ,Tcommit_event_state_t,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 345 | ALLOC2 (reg_EVENT_TYPE ,Tevent_type_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 346 | // ALLOC2 (reg_EVENT_FLUSH ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 347 | // ALLOC2 (reg_EVENT_STOP ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 348 | // ALLOC2 (reg_EVENT_NUM_BANK ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 349 | // ALLOC2 (reg_EVENT_NUM_PTR ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 350 | // ALLOC2 (reg_EVENT_CAN_RESTART ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 351 | ALLOC2 (reg_EVENT_PACKET ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 352 | ALLOC2 (reg_EVENT_DEPTH ,Tdepth_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 353 | ALLOC2 (reg_EVENT_NB_INST ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 354 | ALLOC2 (reg_EVENT_LAST ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 355 | ALLOC2 (reg_EVENT_LAST_NUM_BANK ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 356 | ALLOC2 (reg_EVENT_LAST_NUM_PTR ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 357 | |
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| 358 | ALLOC2 (reg_EVENT_NEXT_STOP ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 359 | ALLOC2 (reg_EVENT_NEXT_PACKET ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 360 | |
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| 361 | // ALLOC2 (reg_PC_PREVIOUS ,Taddress_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 362 | ALLOC2 (reg_PC_CURRENT ,Taddress_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 363 | ALLOC2 (reg_PC_CURRENT_IS_DS ,Taddress_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 364 | ALLOC2 (reg_PC_CURRENT_IS_DS_TAKE,Taddress_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 365 | ALLOC2 (reg_PC_NEXT ,Taddress_t ,_param->_nb_front_end,_param->_nb_context [it1]); |
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| 366 | |
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| 367 | ALLOC3 (rat_gpr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context [it1],_param->_nb_general_register_logic); |
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| 368 | ALLOC3 (rat_spr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context [it1],_param->_nb_special_register_logic); |
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| 369 | |
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| 370 | |
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| 371 | } |
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| 372 | |
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| 373 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 374 | _priority_insert = new generic::priority::Priority (_name+"_priority_insert", |
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| 375 | _param->_priority , |
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| 376 | _param->_load_balancing, |
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| 377 | _param->_nb_rename_unit, |
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| 378 | _param->_nb_inst_insert, |
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| 379 | _param->_nb_rename_unit_select); |
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| 380 | |
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| 381 | #ifdef POSITION |
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| 382 | if (usage_is_set(_usage,USE_POSITION)) |
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| 383 | _component->generate_file(); |
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| 384 | #endif |
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| 385 | |
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| 386 | #if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true) |
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| 387 | if (log_file_generate) |
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| 388 | { |
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| 389 | directory_init (); |
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| 390 | |
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| 391 | instruction_log_file = new std::ofstream [_param->_nb_thread]; |
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| 392 | for (uint32_t i=0; i<_param->_nb_thread; ++i) |
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| 393 | if (_param->_have_thread [i]) |
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| 394 | { |
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| 395 | |
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| 396 | std::string filename = morpheo::filename(MORPHEO_LOG, |
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| 397 | "Instruction_flow-thread_"+toString(i), |
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| 398 | "", |
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| 399 | "log", |
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| 400 | _simulation_file_with_date, |
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| 401 | _simulation_file_with_pid , |
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| 402 | true); |
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| 403 | |
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| 404 | instruction_log_file [i].open(filename.c_str() ,std::ios::out | std::ios::trunc); |
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| 405 | } |
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| 406 | } |
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| 407 | #endif |
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| 408 | |
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| 409 | log_end(Commit_unit,FUNCTION); |
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| 410 | }; |
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| 411 | |
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| 412 | }; // end namespace commit_unit |
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| 413 | }; // end namespace ooo_engine |
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| 414 | }; // end namespace multi_ooo_engine |
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| 415 | }; // end namespace core |
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| 416 | |
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| 417 | }; // end namespace behavioural |
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| 418 | }; // end namespace morpheo |
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