[88] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Commit_unit_genMoore.cpp 124 2009-06-17 12:11:25Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_ooo_engine { |
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| 15 | namespace ooo_engine { |
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| 16 | namespace commit_unit { |
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| 17 | |
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| 18 | |
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| 19 | #undef FUNCTION |
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| 20 | #define FUNCTION "Commit_unit::genMoore" |
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| 21 | void Commit_unit::genMoore (void) |
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| 22 | { |
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| 23 | log_begin(Commit_unit,FUNCTION); |
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| 24 | log_function(Commit_unit,FUNCTION,_name.c_str()); |
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| 25 | |
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[123] | 26 | if (PORT_READ(in_NRESET)) |
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| 27 | { |
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[88] | 28 | // =================================================================== |
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| 29 | // =====[ REEXECUTE ]================================================= |
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| 30 | // =================================================================== |
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| 31 | { |
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[122] | 32 | uint32_t nb_scan_bank = 0; // last scan bank |
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| 33 | bool can_continue = true; |
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[118] | 34 | |
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[124] | 35 | uint32_t event_nb_inst [_param->_nb_front_end][_param->_max_nb_context]; |
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| 36 | for (uint32_t i=0; i<_param->_nb_front_end; i++) |
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| 37 | for (uint32_t j=0; j<_param->_nb_context [i]; j++) |
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| 38 | event_nb_inst [i][j] = 0; |
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| 39 | |
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[122] | 40 | // for each reexecute_port |
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| 41 | for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i) |
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| 42 | { |
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| 43 | log_printf(TRACE,Commit_unit,FUNCTION," * REEXECUTE [%d]",i); |
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| 44 | |
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| 45 | // Store instruction comming Out Of Order in Load Store Unit. |
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| 46 | // Must be executed in no speculative mode. Also, send a signal when an Store is in head of ROB |
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| 47 | |
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| 48 | Tcontrol_t val = false; |
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[100] | 49 | |
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[122] | 50 | for (uint32_t j=nb_scan_bank; j<_param->_nb_bank; j++) |
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| 51 | { |
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| 52 | nb_scan_bank ++; |
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| 53 | |
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| 54 | // translate bank number |
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| 55 | uint32_t num_bank = (reg_NUM_BANK_HEAD+j)%_param->_nb_bank; |
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| 56 | |
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| 57 | log_printf(TRACE,Commit_unit,FUNCTION," * num_bank : %d",num_bank); |
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[88] | 58 | |
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[122] | 59 | // Test if the head of rob is not empty |
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| 60 | if (not _rob[num_bank].empty()) |
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| 61 | { |
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| 62 | log_printf(TRACE,Commit_unit,FUNCTION," * ROB is not empty"); |
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| 63 | |
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| 64 | // Read state |
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| 65 | entry_t * entry = _rob [num_bank].front(); |
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[124] | 66 | uint32_t num_packet = ((entry->ptr << _param->_shift_num_slot) | num_bank); |
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| 67 | Tcontext_t front_end_id = entry->front_end_id; |
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| 68 | Tcontext_t context_id = entry->context_id ; |
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| 69 | |
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[122] | 70 | rob_state_t state = entry->state; |
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| 71 | |
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| 72 | // Test state |
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| 73 | // * store is ko, send signal at store_queue |
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| 74 | // * store_is ok, test if in head |
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| 75 | // val = (((state == ROB_STORE_OK) and (num_bank == (reg_NUM_BANK_HEAD))) or |
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| 76 | // (state == ROB_STORE_KO) or |
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| 77 | // (state == ROB_STORE_EVENT) |
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| 78 | // ); |
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| 79 | val = (((state == ROB_STORE_OK) and can_continue) or |
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| 80 | (state == ROB_STORE_KO) or |
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| 81 | (state == ROB_STORE_EVENT) |
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| 82 | ); |
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| 83 | |
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[124] | 84 | can_continue &= (((state == ROB_STORE_OK ) or |
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| 85 | (state == ROB_STORE_OK_WAIT_END ) or |
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| 86 | (state == ROB_END_OK_SPECULATIVE) or |
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| 87 | (state == ROB_END_OK ) or |
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| 88 | (state == ROB_END )) and |
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| 89 | not ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) and |
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| 90 | (reg_EVENT_PACKET[front_end_id][context_id] == num_packet)) and |
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| 91 | not ((reg_EVENT_NB_INST [front_end_id][context_id] > 0) and |
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| 92 | ((++event_nb_inst [front_end_id][context_id]) >= reg_EVENT_NB_INST [front_end_id][context_id])) |
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[122] | 93 | ); |
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[118] | 94 | |
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[122] | 95 | log_printf(TRACE,Commit_unit,FUNCTION," * val : %d",val); |
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[88] | 96 | |
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[122] | 97 | if (val) |
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| 98 | { |
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| 99 | internal_REEXECUTE_NUM_BANK [i] = num_bank; |
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[118] | 100 | |
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[122] | 101 | Tpacket_t packet_id = ((entry->ptr << _param->_shift_num_slot) | num_bank); |
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| 102 | |
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| 103 | log_printf(TRACE,Commit_unit,FUNCTION," * packet_id : %d",packet_id); |
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| 104 | |
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| 105 | // Reexecute store |
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| 106 | if (_param->_have_port_context_id) |
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| 107 | PORT_WRITE(out_REEXECUTE_CONTEXT_ID [i], entry->context_id ); |
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| 108 | if (_param->_have_port_front_end_id) |
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| 109 | PORT_WRITE(out_REEXECUTE_FRONT_END_ID [i], entry->front_end_id ); |
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| 110 | if (_param->_have_port_rob_ptr ) |
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| 111 | PORT_WRITE(out_REEXECUTE_PACKET_ID [i], packet_id ); |
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| 112 | PORT_WRITE(out_REEXECUTE_TYPE [i], entry->type ); |
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| 113 | PORT_WRITE(out_REEXECUTE_STORE_QUEUE_PTR_WRITE [i], entry->store_queue_ptr_write); |
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| 114 | PORT_WRITE(out_REEXECUTE_OPERATION [i], (state == ROB_STORE_OK)?OPERATION_MEMORY_STORE_HEAD_OK:OPERATION_MEMORY_STORE_HEAD_KO); |
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[118] | 115 | |
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[122] | 116 | break; // Stop scan |
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| 117 | } |
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| 118 | } |
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| 119 | } |
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| 120 | |
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| 121 | internal_REEXECUTE_VAL [i] = val; |
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[88] | 122 | } |
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| 123 | } |
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| 124 | |
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| 125 | // =================================================================== |
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| 126 | // =====[ BRANCH_COMPLETE ]=========================================== |
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| 127 | // =================================================================== |
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| 128 | { |
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[100] | 129 | // Branchement must be send at the prediction unit |
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[88] | 130 | |
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[122] | 131 | uint32_t nb_scan_bank = 0; // last scan bank |
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| 132 | |
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[100] | 133 | // for each port, find a valid branchement. |
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[88] | 134 | for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
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| 135 | { |
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[122] | 136 | log_printf(TRACE,Commit_unit,FUNCTION," * BRANCH_COMPLETE [%d]",i); |
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| 137 | |
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[88] | 138 | Tcontrol_t val = false; |
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| 139 | |
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| 140 | for (uint32_t j=nb_scan_bank; j<_param->_nb_bank; j++) |
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| 141 | { |
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| 142 | nb_scan_bank ++; |
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| 143 | |
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[100] | 144 | // translate bank number |
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[88] | 145 | uint32_t num_bank = (reg_NUM_BANK_HEAD+j)%_param->_nb_bank; |
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[122] | 146 | |
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| 147 | log_printf(TRACE,Commit_unit,FUNCTION," * num_bank : %d",num_bank); |
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[88] | 148 | |
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[122] | 149 | // Test if in this bank, they have an instruction |
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[88] | 150 | if (not _rob [num_bank].empty()) |
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| 151 | { |
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[122] | 152 | log_printf(TRACE,Commit_unit,FUNCTION," * not empty"); |
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| 153 | |
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| 154 | // Read information |
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[88] | 155 | entry_t * entry = _rob [num_bank].front(); |
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| 156 | rob_state_t state = entry->state; |
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[122] | 157 | Tcontext_t front_end_id = entry->front_end_id; |
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| 158 | Tcontext_t context_id = entry->context_id ; |
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| 159 | |
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| 160 | log_printf(TRACE,Commit_unit,FUNCTION," * front_end_id : %d",front_end_id); |
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| 161 | log_printf(TRACE,Commit_unit,FUNCTION," * context_id : %d",context_id ); |
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| 162 | |
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| 163 | // don't complete a branch when rob manage an present event |
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[123] | 164 | if (((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NO_EVENT) or |
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| 165 | (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT)) and |
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[122] | 166 | (state == ROB_BRANCH_COMPLETE)) |
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[88] | 167 | { |
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[122] | 168 | log_printf(TRACE,Commit_unit,FUNCTION," * find !!!"); |
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| 169 | |
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| 170 | // test if have a future event (stop is set) |
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[123] | 171 | // log_printf(TRACE,Commit_unit,FUNCTION," * reg_EVENT_STOP : %d",reg_EVENT_STOP [front_end_id][context_id]); |
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[122] | 172 | |
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[123] | 173 | if (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) |
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[122] | 174 | { |
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| 175 | // Have future event, can complete the branch if the event is most speculative than this branchement |
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| 176 | // Also, need compare packet_id (is order) |
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| 177 | |
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| 178 | uint32_t _top = ((_rob[reg_NUM_BANK_HEAD].front()->ptr << _param->_shift_num_slot) | reg_NUM_BANK_HEAD); |
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| 179 | uint32_t _old = reg_EVENT_PACKET [front_end_id][context_id]; |
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| 180 | uint32_t _new = ((entry->ptr << _param->_shift_num_slot) | num_bank); |
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| 181 | |
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| 182 | // log_printf(TRACE,Commit_unit,FUNCTION," * _top : %d",_top); |
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| 183 | // log_printf(TRACE,Commit_unit,FUNCTION," * _old (before) : %d",_old); |
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| 184 | // log_printf(TRACE,Commit_unit,FUNCTION," * _new (before) : %d",_new); |
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| 185 | |
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| 186 | if (_old < _top) _old = _old+_param->_size_queue; |
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| 187 | if (_new < _top) _new = _new+_param->_size_queue; |
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| 188 | if (_new < _old) val = true; |
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| 189 | |
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| 190 | // log_printf(TRACE,Commit_unit,FUNCTION," * _old (after ) : %d",_old); |
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| 191 | // log_printf(TRACE,Commit_unit,FUNCTION," * _new (after ) : %d",_new); |
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| 192 | |
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| 193 | } |
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| 194 | else |
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| 195 | val = true; |
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[88] | 196 | |
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[122] | 197 | log_printf(TRACE,Commit_unit,FUNCTION," * val : %d",val); |
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| 198 | |
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| 199 | if (val) |
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| 200 | { |
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| 201 | // Have an valid branchement to complete |
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[88] | 202 | internal_BRANCH_COMPLETE_NUM_BANK [i] = num_bank; |
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| 203 | |
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[122] | 204 | if (_param->_have_port_front_end_id) |
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| 205 | PORT_WRITE(out_BRANCH_COMPLETE_FRONT_END_ID [i], front_end_id ); |
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[88] | 206 | if (_param->_have_port_context_id) |
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[122] | 207 | PORT_WRITE(out_BRANCH_COMPLETE_CONTEXT_ID [i], context_id ); |
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[88] | 208 | if (_param->_have_port_depth) |
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[98] | 209 | PORT_WRITE(out_BRANCH_COMPLETE_DEPTH [i], entry->depth ); |
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[105] | 210 | PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS [i], entry->address_next ); |
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[98] | 211 | // PORT_WRITE(out_BRANCH_COMPLETE_FLAG [i],(entry->flags&FLAG_F)!=0); |
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| 212 | PORT_WRITE(out_BRANCH_COMPLETE_NO_SEQUENCE [i], entry->no_sequence ); |
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[88] | 213 | |
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[122] | 214 | break; // Stop scan |
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| 215 | } |
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[88] | 216 | } |
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| 217 | } |
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| 218 | } |
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| 219 | |
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| 220 | internal_BRANCH_COMPLETE_VAL [i] = val; |
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| 221 | } |
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| 222 | } |
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| 223 | |
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| 224 | // =================================================================== |
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| 225 | // =====[ UPDATE ]==================================================== |
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| 226 | // =================================================================== |
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| 227 | { |
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[105] | 228 | internal_UPDATE_VAL = 0; |
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| 229 | internal_UPDATE_NUM_BANK = reg_NUM_BANK_HEAD; |
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[88] | 230 | |
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[122] | 231 | // Test if have an instruction |
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[105] | 232 | if (not _rob[internal_UPDATE_NUM_BANK].empty()) |
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[88] | 233 | { |
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[105] | 234 | log_printf(TRACE,Commit_unit,FUNCTION," * UPDATE"); |
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| 235 | log_printf(TRACE,Commit_unit,FUNCTION," * num_bank : %d",internal_UPDATE_NUM_BANK); |
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[88] | 236 | |
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[105] | 237 | entry_t * entry = _rob [internal_UPDATE_NUM_BANK].front(); |
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| 238 | |
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[122] | 239 | // Test state |
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| 240 | // Update if exception or load miss |
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[105] | 241 | switch (entry->state) |
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| 242 | { |
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| 243 | case ROB_END_EXCEPTION_UPDATE : |
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| 244 | { |
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| 245 | internal_UPDATE_VAL = 1; |
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| 246 | throw ERRORMORPHEO(FUNCTION,_("Moore : exception is not yet supported (Coming Soon).\n")); |
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| 247 | break; |
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| 248 | } |
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| 249 | case ROB_END_LOAD_MISS_UPDATE : |
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| 250 | { |
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| 251 | log_printf(TRACE,Commit_unit,FUNCTION," * ROB_END_LOAD_MISS_UPDATE"); |
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| 252 | |
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| 253 | internal_UPDATE_VAL = 1; |
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| 254 | |
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| 255 | Tcontext_t front_end_id = entry->front_end_id; |
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| 256 | Tcontext_t context_id = entry->context_id ; |
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| 257 | |
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| 258 | log_printf(TRACE,Commit_unit,FUNCTION," * front_end_id : %d",front_end_id); |
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| 259 | log_printf(TRACE,Commit_unit,FUNCTION," * context_id : %d",context_id ); |
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| 260 | |
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| 261 | if (_param->_have_port_front_end_id) |
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| 262 | PORT_WRITE(out_UPDATE_FRONT_END_ID ,front_end_id); |
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| 263 | if (_param->_have_port_context_id) |
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| 264 | PORT_WRITE(out_UPDATE_CONTEXT_ID ,context_id ); |
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| 265 | if (_param->_have_port_depth) |
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| 266 | PORT_WRITE(out_UPDATE_DEPTH ,entry->depth); |
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| 267 | PORT_WRITE(out_UPDATE_TYPE ,EVENT_TYPE_LOAD_MISS_SPECULATION); |
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| 268 | // PORT_WRITE(out_UPDATE_IS_DELAY_SLOT ,reg_PC_CURRENT_IS_DS [front_end_id][context_id]); |
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| 269 | // PORT_WRITE(out_UPDATE_ADDRESS ,reg_PC_CURRENT [front_end_id][context_id]); |
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| 270 | // PORT_WRITE(out_UPDATE_ADDRESS_EPCR_VAL,reg_PC_CURRENT_IS_DS_TAKE [front_end_id][context_id]); |
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| 271 | // PORT_WRITE(out_UPDATE_ADDRESS_EPCR ,reg_PC_NEXT [front_end_id][context_id]); |
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| 272 | // PORT_WRITE(out_UPDATE_ADDRESS_EEAR_VAL,0); |
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| 273 | // // PORT_WRITE(out_UPDATE_ADDRESS_EEAR ,); |
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| 274 | |
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| 275 | PORT_WRITE(out_UPDATE_IS_DELAY_SLOT ,0); |
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| 276 | PORT_WRITE(out_UPDATE_ADDRESS ,reg_PC_NEXT [front_end_id][context_id]); |
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| 277 | PORT_WRITE(out_UPDATE_ADDRESS_EPCR_VAL,0); |
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| 278 | // PORT_WRITE(out_UPDATE_ADDRESS_EPCR ,); |
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| 279 | PORT_WRITE(out_UPDATE_ADDRESS_EEAR_VAL,0); |
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| 280 | // PORT_WRITE(out_UPDATE_ADDRESS_EEAR ,); |
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| 281 | |
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| 282 | break; |
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| 283 | } |
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| 284 | default : |
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| 285 | { |
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| 286 | // internal_UPDATE_VAL = 0; |
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| 287 | } |
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| 288 | } |
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[88] | 289 | } |
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[105] | 290 | |
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| 291 | log_printf(TRACE,Commit_unit,FUNCTION," * UPDATE (end)"); |
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[88] | 292 | } |
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| 293 | |
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| 294 | // =================================================================== |
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| 295 | // =====[ NB_INST ]=================================================== |
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| 296 | // =================================================================== |
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[123] | 297 | { |
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| 298 | #ifdef DEBUG_TEST |
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| 299 | bool empty = true; |
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| 300 | #endif |
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| 301 | for (uint32_t i=0; i<_param->_nb_front_end; i++) |
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| 302 | for (uint32_t j=0; j<_param->_nb_context [i]; j++) |
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| 303 | { |
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| 304 | #ifdef DEBUG_TEST |
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| 305 | empty &= (reg_NB_INST_COMMIT_ALL [i][j] == 0); |
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| 306 | #endif |
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| 307 | PORT_WRITE(out_NB_INST_COMMIT_ALL [i][j], reg_NB_INST_COMMIT_ALL [i][j]); |
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| 308 | PORT_WRITE(out_NB_INST_COMMIT_MEM [i][j], reg_NB_INST_COMMIT_MEM [i][j]); |
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| 309 | } |
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| 310 | #ifdef DEBUG_TEST |
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| 311 | PORT_WRITE(out_INFO_ROB_EMPTY,empty); |
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| 312 | #endif |
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| 313 | } |
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[88] | 314 | |
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[123] | 315 | |
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[104] | 316 | // =================================================================== |
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| 317 | // =====[ RETIRE_EVENT ]============================================== |
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| 318 | // =================================================================== |
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| 319 | for (uint32_t i=0; i<_param->_nb_front_end; i++) |
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| 320 | for (uint32_t j=0; j<_param->_nb_context [i]; j++) |
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[122] | 321 | { |
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[123] | 322 | // bool flush = (((reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_EVENT) or |
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| 323 | // (reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_WAIT_DECOD)) and |
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| 324 | // not reg_EVENT_CAN_RESTART[i][j]); |
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[88] | 325 | |
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[122] | 326 | PORT_WRITE(out_RETIRE_EVENT_STATE [i][j], commit_event_state_to_event_state(reg_EVENT_STATE[i][j])); |
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[123] | 327 | // PORT_WRITE(out_RETIRE_EVENT_FLUSH [i][j], flush); |
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| 328 | // PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], reg_EVENT_STOP [i][j]); |
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| 329 | PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], ((reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_NOT_YET_EVENT) or |
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| 330 | reg_EVENT_NEXT_STOP [i][j])); |
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[122] | 331 | } |
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[123] | 332 | } |
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| 333 | else |
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| 334 | { |
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| 335 | for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i) |
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| 336 | { |
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| 337 | internal_REEXECUTE_VAL [i] = 0; |
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| 338 | // internal_REEXECUTE_NUM_BANK [i] = num_bank; |
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| 339 | } |
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[122] | 340 | |
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[123] | 341 | for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
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| 342 | { |
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| 343 | internal_BRANCH_COMPLETE_VAL [i] = 0; |
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| 344 | // internal_BRANCH_COMPLETE_NUM_BANK [i] = num_bank; |
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| 345 | } |
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| 346 | |
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| 347 | internal_UPDATE_VAL = 0; |
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| 348 | // internal_UPDATE_NUM_BANK = reg_NUM_BANK_HEAD; |
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| 349 | |
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| 350 | |
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| 351 | for (uint32_t i=0; i<_param->_nb_front_end; i++) |
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| 352 | for (uint32_t j=0; j<_param->_nb_context [i]; j++) |
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| 353 | { |
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| 354 | PORT_WRITE(out_RETIRE_EVENT_STATE [i][j], commit_event_state_to_event_state(COMMIT_EVENT_STATE_NO_EVENT)); |
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| 355 | // PORT_WRITE(out_RETIRE_EVENT_FLUSH [i][j], flush); |
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| 356 | // PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], reg_EVENT_STOP [i][j]); |
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| 357 | PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], true); |
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| 358 | } |
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| 359 | } |
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| 360 | |
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| 361 | for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i) |
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| 362 | PORT_WRITE(out_REEXECUTE_VAL[i], internal_REEXECUTE_VAL [i]); |
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| 363 | for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
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| 364 | PORT_WRITE(out_BRANCH_COMPLETE_VAL [i], internal_BRANCH_COMPLETE_VAL [i]); |
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| 365 | PORT_WRITE(out_UPDATE_VAL, internal_UPDATE_VAL); |
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| 366 | |
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[88] | 367 | log_end(Commit_unit,FUNCTION); |
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| 368 | }; |
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| 369 | |
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| 370 | }; // end namespace commit_unit |
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| 371 | }; // end namespace ooo_engine |
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| 372 | }; // end namespace multi_ooo_engine |
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| 373 | }; // end namespace core |
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| 374 | }; // end namespace behavioural |
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| 375 | }; // end namespace morpheo |
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| 376 | #endif |
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