1 | #ifdef SYSTEMC |
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2 | /* |
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3 | * $Id: Issue_queue_function_in_order_genMealy_issue_out.cpp 117 2009-05-16 14:42:39Z rosiere $ |
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4 | * |
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5 | * [ Description ] |
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6 | * |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" |
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10 | |
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11 | namespace morpheo { |
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12 | namespace behavioural { |
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13 | namespace core { |
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14 | namespace multi_ooo_engine { |
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15 | namespace ooo_engine { |
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16 | namespace issue_queue { |
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17 | |
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18 | |
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19 | #undef FUNCTION |
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20 | #define FUNCTION "Issue_queue::function_in_order_genMealy_issue_out" |
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21 | void Issue_queue::function_in_order_genMealy_issue_out (void) |
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22 | { |
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23 | log_begin(Issue_queue,FUNCTION); |
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24 | log_function(Issue_queue,FUNCTION,_name.c_str()); |
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25 | |
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26 | // =================================================================== |
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27 | // =====[ ISSUE_OUT ]================================================= |
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28 | // =================================================================== |
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29 | { |
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30 | Tcontrol_t val [_param->_nb_inst_issue]; |
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31 | |
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32 | uint32_t index=0; |
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33 | for (uint32_t i=0; i<_param->_nb_inst_issue; i++) |
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34 | val [i] = 0; |
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35 | |
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36 | //-------------------------------------- |
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37 | // From Reexecute_queue |
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38 | //-------------------------------------- |
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39 | |
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40 | // scan all reexecute_queue slot ... |
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41 | // uint32_t num_reexecute_entry = 0; |
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42 | for (std::list<entry_t*>::iterator it=_reexecute_queue.begin(); |
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43 | it!=_reexecute_queue.end(); |
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44 | ++it) |
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45 | { |
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46 | entry_t* entry = (*it); |
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47 | |
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48 | val [index] = 1; |
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49 | |
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50 | if (_param->_have_port_context_id) |
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51 | PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [index], entry->_context_id ); |
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52 | if (_param->_have_port_front_end_id) |
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53 | PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [index], entry->_front_end_id ); |
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54 | if (_param->_have_port_rob_ptr ) |
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55 | PORT_WRITE(out_ISSUE_OUT_PACKET_ID [index], entry->_packet_id ); |
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56 | PORT_WRITE(out_ISSUE_OUT_OPERATION [index], entry->_operation ); |
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57 | PORT_WRITE(out_ISSUE_OUT_TYPE [index], entry->_type ); |
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58 | PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write); |
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59 | if (_param->_have_port_load_queue_ptr) |
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60 | PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [index], entry->_load_queue_ptr_write ); |
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61 | PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [index], entry->_has_immediat ); |
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62 | PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [index], entry->_immediat ); |
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63 | PORT_WRITE(out_ISSUE_OUT_READ_RA [index], entry->_read_ra ); |
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64 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [index], entry->_num_reg_ra ); |
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65 | PORT_WRITE(out_ISSUE_OUT_READ_RB [index], entry->_read_rb ); |
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66 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [index], entry->_num_reg_rb ); |
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67 | PORT_WRITE(out_ISSUE_OUT_READ_RC [index], entry->_read_rc ); |
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68 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [index], entry->_num_reg_rc ); |
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69 | PORT_WRITE(out_ISSUE_OUT_WRITE_RD [index], entry->_write_rd ); |
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70 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [index], entry->_num_reg_rd ); |
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71 | PORT_WRITE(out_ISSUE_OUT_WRITE_RE [index], entry->_write_re ); |
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72 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [index], entry->_num_reg_re ); |
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73 | |
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74 | internal_ISSUE_OUT_FROM_REEXECUTE [index] = true; |
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75 | // internal_ISSUE_OUT_NUM_BANK [index] = num_reexecute_entry; |
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76 | internal_ISSUE_OUT_ENTRY [index] = entry; |
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77 | |
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78 | index ++; // next slot |
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79 | } |
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80 | |
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81 | //-------------------------------------- |
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82 | // From Issue_queue |
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83 | //-------------------------------------- |
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84 | index = _param->_nb_inst_reexecute; |
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85 | |
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86 | log_printf(TRACE,Issue_queue,FUNCTION," * From Issue_queue"); |
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87 | |
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88 | // for all instruction in issue_queue head ... |
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89 | for (uint32_t i=0; i<_param->_nb_bank; ++i) |
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90 | { |
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91 | uint32_t num_bank=(reg_NUM_BANK_HEAD+i)%_param->_nb_bank; |
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92 | |
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93 | log_printf(TRACE,Issue_queue,FUNCTION," * Bank [%d]",num_bank); |
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94 | |
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95 | // bool find = false; |
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96 | |
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97 | // ... test if have an instruction |
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98 | if (not _issue_queue [num_bank].empty()) |
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99 | { |
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100 | log_printf(TRACE,Issue_queue,FUNCTION," * Not Empty !!!"); |
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101 | |
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102 | // read instruction |
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103 | entry_t* entry = _issue_queue [num_bank].front(); |
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104 | |
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105 | // Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [index]); |
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106 | |
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107 | log_printf(TRACE,Issue_queue,FUNCTION," * Issue [%d]",index); |
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108 | // log_printf(TRACE,Issue_queue,FUNCTION," * issue_ack : %d",issue_ack); |
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109 | // log_printf(TRACE,Issue_queue,FUNCTION," * previous transaction : %d",val[index]); |
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110 | // log_printf(TRACE,Issue_queue,FUNCTION," * can issue type : %d",_param->_table_issue_type [index][entry->_type]); |
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111 | |
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112 | // in_order : test if find a valid read_unit |
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113 | // if (issue_ack) |
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114 | // { |
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115 | // log_printf(TRACE,Issue_queue,FUNCTION," * find !!!"); |
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116 | |
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117 | // find = true; |
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118 | // } |
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119 | |
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120 | // find a issue port |
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121 | val [index] = true; // instruction is valid |
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122 | |
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123 | if (_param->_have_port_context_id) |
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124 | PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [index], entry->_context_id ); |
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125 | if (_param->_have_port_front_end_id) |
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126 | PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [index], entry->_front_end_id ); |
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127 | if (_param->_have_port_rob_ptr ) |
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128 | PORT_WRITE(out_ISSUE_OUT_PACKET_ID [index], entry->_packet_id ); |
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129 | PORT_WRITE(out_ISSUE_OUT_OPERATION [index], entry->_operation ); |
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130 | PORT_WRITE(out_ISSUE_OUT_TYPE [index], entry->_type ); |
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131 | PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write); |
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132 | if (_param->_have_port_load_queue_ptr) |
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133 | PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [index], entry->_load_queue_ptr_write ); |
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134 | PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [index], entry->_has_immediat ); |
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135 | PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [index], entry->_immediat ); |
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136 | PORT_WRITE(out_ISSUE_OUT_READ_RA [index], entry->_read_ra ); |
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137 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [index], entry->_num_reg_ra ); |
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138 | PORT_WRITE(out_ISSUE_OUT_READ_RB [index], entry->_read_rb ); |
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139 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [index], entry->_num_reg_rb ); |
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140 | PORT_WRITE(out_ISSUE_OUT_READ_RC [index], entry->_read_rc ); |
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141 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [index], entry->_num_reg_rc ); |
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142 | PORT_WRITE(out_ISSUE_OUT_WRITE_RD [index], entry->_write_rd ); |
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143 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [index], entry->_num_reg_rd ); |
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144 | PORT_WRITE(out_ISSUE_OUT_WRITE_RE [index], entry->_write_re ); |
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145 | PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [index], entry->_num_reg_re ); |
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146 | |
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147 | internal_ISSUE_OUT_FROM_REEXECUTE [index] = false; |
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148 | internal_ISSUE_OUT_NUM_BANK [index] = num_bank; |
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149 | internal_ISSUE_OUT_ENTRY [index] = entry; |
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150 | |
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151 | index ++; // next slot |
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152 | } |
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153 | |
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154 | // if (not find) |
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155 | // { |
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156 | // log_printf(TRACE,Issue_queue,FUNCTION," * Not find. Stop Scan (in order)"); |
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157 | |
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158 | // break; // stop scan (in order) |
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159 | // } |
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160 | } |
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161 | |
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162 | // Output |
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163 | for (uint32_t i=0; i<_param->_nb_inst_issue; i++) |
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164 | { |
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165 | internal_ISSUE_OUT_VAL [i] = val [i]; |
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166 | PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]); |
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167 | |
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168 | // // Type invalid to the Core_Glue network |
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169 | // if (not val [i]) // == empty |
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170 | // PORT_WRITE(out_ISSUE_OUT_TYPE [i], TYPE_INVALID); |
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171 | } |
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172 | } |
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173 | |
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174 | log_end(Issue_queue,FUNCTION); |
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175 | }; |
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176 | |
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177 | }; // end namespace issue_queue |
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178 | }; // end namespace ooo_engine |
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179 | }; // end namespace multi_ooo_engine |
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180 | }; // end namespace core |
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181 | |
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182 | }; // end namespace behavioural |
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183 | }; // end namespace morpheo |
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184 | #endif |
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