1 | #ifdef SYSTEMC |
---|
2 | /* |
---|
3 | * $Id: Issue_queue_transition.cpp 88 2008-12-10 18:31:39Z rosiere $ |
---|
4 | * |
---|
5 | * [ Description ] |
---|
6 | * |
---|
7 | */ |
---|
8 | |
---|
9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" |
---|
10 | |
---|
11 | namespace morpheo { |
---|
12 | namespace behavioural { |
---|
13 | namespace core { |
---|
14 | namespace multi_ooo_engine { |
---|
15 | namespace ooo_engine { |
---|
16 | namespace issue_queue { |
---|
17 | |
---|
18 | |
---|
19 | #undef FUNCTION |
---|
20 | #define FUNCTION "Issue_queue::transition" |
---|
21 | void Issue_queue::transition (void) |
---|
22 | { |
---|
23 | log_begin(Issue_queue,FUNCTION); |
---|
24 | log_function(Issue_queue,FUNCTION,_name.c_str()); |
---|
25 | |
---|
26 | if (PORT_READ(in_NRESET) == 0) |
---|
27 | { |
---|
28 | _priority_in ->reset(); |
---|
29 | _priority_out->reset(); |
---|
30 | _priority_reg->reset(); |
---|
31 | |
---|
32 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
33 | _issue_queue [i].clear(); |
---|
34 | } |
---|
35 | else |
---|
36 | { |
---|
37 | _priority_in ->transition(); |
---|
38 | _priority_out->transition(); |
---|
39 | _priority_reg->transition(); |
---|
40 | |
---|
41 | // =================================================================== |
---|
42 | // =====[ ISSUE_IN ]================================================== |
---|
43 | // =================================================================== |
---|
44 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
45 | if (internal_BANK_IN_ACK [i]) |
---|
46 | { |
---|
47 | entry_t* entry = NULL; |
---|
48 | |
---|
49 | if (internal_BANK_IN_IS_REEXECUTE [i]) |
---|
50 | { |
---|
51 | uint32_t y = internal_BANK_IN_NUM_INST [i]; |
---|
52 | |
---|
53 | if (PORT_READ(in_REEXECUTE_VAL [y])) |
---|
54 | { |
---|
55 | #ifdef STATISTICS |
---|
56 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
57 | (*_stat_nb_inst_reexecute) ++; |
---|
58 | #endif |
---|
59 | entry = new entry_t |
---|
60 | ( |
---|
61 | (_param->_have_port_context_id )?PORT_READ(in_REEXECUTE_CONTEXT_ID [y]):0, |
---|
62 | (_param->_have_port_front_end_id )?PORT_READ(in_REEXECUTE_FRONT_END_ID [y]):0, |
---|
63 | (_param->_have_port_rob_ptr )?PORT_READ(in_REEXECUTE_PACKET_ID [y]):0, |
---|
64 | PORT_READ(in_REEXECUTE_OPERATION [y]), |
---|
65 | PORT_READ(in_REEXECUTE_TYPE [y]), |
---|
66 | PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [y]), |
---|
67 | (_param->_have_port_load_queue_ptr)?PORT_READ(in_REEXECUTE_LOAD_QUEUE_PTR_WRITE [y]):0, |
---|
68 | PORT_READ(in_REEXECUTE_HAS_IMMEDIAT [y]), |
---|
69 | PORT_READ(in_REEXECUTE_IMMEDIAT [y]), |
---|
70 | PORT_READ(in_REEXECUTE_READ_RA [y]), |
---|
71 | PORT_READ(in_REEXECUTE_NUM_REG_RA [y]), |
---|
72 | PORT_READ(in_REEXECUTE_READ_RB [y]), |
---|
73 | PORT_READ(in_REEXECUTE_NUM_REG_RB [y]), |
---|
74 | PORT_READ(in_REEXECUTE_READ_RC [y]), |
---|
75 | PORT_READ(in_REEXECUTE_NUM_REG_RC [y]), |
---|
76 | PORT_READ(in_REEXECUTE_WRITE_RD [y]), |
---|
77 | PORT_READ(in_REEXECUTE_NUM_REG_RD [y]), |
---|
78 | PORT_READ(in_REEXECUTE_WRITE_RE [y]), |
---|
79 | PORT_READ(in_REEXECUTE_NUM_REG_RE [y]) |
---|
80 | ); |
---|
81 | } |
---|
82 | } |
---|
83 | else |
---|
84 | { |
---|
85 | uint32_t x = internal_BANK_IN_NUM_RENAME_UNIT [i]; |
---|
86 | uint32_t y = internal_BANK_IN_NUM_INST [i]; |
---|
87 | |
---|
88 | if (PORT_READ(in_ISSUE_IN_VAL[x][y])) |
---|
89 | { |
---|
90 | #ifdef STATISTICS |
---|
91 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
92 | (*_stat_nb_inst_issue_in [x]) ++; |
---|
93 | #endif |
---|
94 | entry = new entry_t |
---|
95 | ( |
---|
96 | (_param->_have_port_context_id )?PORT_READ(in_ISSUE_IN_CONTEXT_ID [x][y]):0, |
---|
97 | (_param->_have_port_front_end_id )?PORT_READ(in_ISSUE_IN_FRONT_END_ID [x][y]):0, |
---|
98 | (_param->_have_port_rob_ptr )?PORT_READ(in_ISSUE_IN_PACKET_ID [x][y]):0, |
---|
99 | PORT_READ(in_ISSUE_IN_OPERATION [x][y]), |
---|
100 | PORT_READ(in_ISSUE_IN_TYPE [x][y]), |
---|
101 | PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]), |
---|
102 | (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE [x][y]):0, |
---|
103 | PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT [x][y]), |
---|
104 | PORT_READ(in_ISSUE_IN_IMMEDIAT [x][y]), |
---|
105 | PORT_READ(in_ISSUE_IN_READ_RA [x][y]), |
---|
106 | PORT_READ(in_ISSUE_IN_NUM_REG_RA [x][y]), |
---|
107 | PORT_READ(in_ISSUE_IN_READ_RB [x][y]), |
---|
108 | PORT_READ(in_ISSUE_IN_NUM_REG_RB [x][y]), |
---|
109 | PORT_READ(in_ISSUE_IN_READ_RC [x][y]), |
---|
110 | PORT_READ(in_ISSUE_IN_NUM_REG_RC [x][y]), |
---|
111 | PORT_READ(in_ISSUE_IN_WRITE_RD [x][y]), |
---|
112 | PORT_READ(in_ISSUE_IN_NUM_REG_RD [x][y]), |
---|
113 | PORT_READ(in_ISSUE_IN_WRITE_RE [x][y]), |
---|
114 | PORT_READ(in_ISSUE_IN_NUM_REG_RE [x][y]) |
---|
115 | ); |
---|
116 | } |
---|
117 | } |
---|
118 | |
---|
119 | if (entry != NULL) |
---|
120 | _issue_queue [i].push_back(entry); |
---|
121 | } |
---|
122 | |
---|
123 | // =================================================================== |
---|
124 | // =====[ ISSUE_OUT ]================================================= |
---|
125 | // =================================================================== |
---|
126 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
127 | { |
---|
128 | // log_printf(TRACE,Issue_queue,FUNCTION," * internal_BANK_OUT [%d] val %d, num_inst %d",i,internal_BANK_OUT_VAL [i],internal_BANK_OUT_NUM_INST [i]); |
---|
129 | |
---|
130 | if (internal_BANK_OUT_VAL [i]) |
---|
131 | { |
---|
132 | #ifdef STATISTICS |
---|
133 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
134 | (*_stat_nb_inst_issue_out) ++; |
---|
135 | #endif |
---|
136 | |
---|
137 | uint32_t x = internal_BANK_OUT_NUM_INST [i]; |
---|
138 | // log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT_ACK : %d",PORT_READ(in_ISSUE_OUT_ACK [x])); |
---|
139 | |
---|
140 | if (PORT_READ(in_ISSUE_OUT_ACK [x])) |
---|
141 | { |
---|
142 | entry_t * entry = _issue_queue [i].front(); |
---|
143 | _issue_queue [i].pop_front(); |
---|
144 | delete entry; |
---|
145 | } |
---|
146 | } |
---|
147 | } |
---|
148 | } |
---|
149 | |
---|
150 | log_printf(TRACE,Issue_queue,FUNCTION," * Info Issue_queue"); |
---|
151 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
152 | { |
---|
153 | #ifdef STATISTICS |
---|
154 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
155 | *(_stat_bank_nb_inst [i]) += _issue_queue[i].size(); |
---|
156 | #endif |
---|
157 | log_printf(TRACE,Issue_queue,FUNCTION," * [%d] size : %d",i,(int)_issue_queue[i].size()); |
---|
158 | } |
---|
159 | |
---|
160 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
---|
161 | end_cycle (); |
---|
162 | #endif |
---|
163 | |
---|
164 | log_end(Issue_queue,FUNCTION); |
---|
165 | }; |
---|
166 | |
---|
167 | }; // end namespace issue_queue |
---|
168 | }; // end namespace ooo_engine |
---|
169 | }; // end namespace multi_ooo_engine |
---|
170 | }; // end namespace core |
---|
171 | |
---|
172 | }; // end namespace behavioural |
---|
173 | }; // end namespace morpheo |
---|
174 | #endif |
---|