1 | #ifdef SYSTEMC |
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2 | /* |
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3 | * $Id: Issue_queue_transition.cpp 122 2009-06-03 08:15:51Z rosiere $ |
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4 | * |
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5 | * [ Description ] |
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6 | * |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" |
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10 | |
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11 | namespace morpheo { |
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12 | namespace behavioural { |
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13 | namespace core { |
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14 | namespace multi_ooo_engine { |
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15 | namespace ooo_engine { |
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16 | namespace issue_queue { |
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17 | |
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18 | |
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19 | #undef FUNCTION |
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20 | #define FUNCTION "Issue_queue::transition" |
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21 | void Issue_queue::transition (void) |
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22 | { |
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23 | log_begin(Issue_queue,FUNCTION); |
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24 | log_function(Issue_queue,FUNCTION,_name.c_str()); |
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25 | |
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26 | if (PORT_READ(in_NRESET) == 0) |
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27 | { |
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28 | _priority_in ->reset(); |
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29 | _reexecute_queue.clear(); |
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30 | } |
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31 | else |
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32 | { |
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33 | _priority_in ->transition(); |
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34 | |
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35 | // =================================================================== |
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36 | // =====[ REEXECUTE_UNIT ]============================================ |
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37 | // =================================================================== |
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38 | |
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39 | for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i) |
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40 | if (PORT_READ(in_REEXECUTE_VAL [i]) and internal_REEXECUTE_ACK [i]) |
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41 | { |
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42 | log_printf(TRACE,Issue_queue,FUNCTION," * REEXECUTE [%d]",i); |
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43 | #ifdef STATISTICS |
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44 | if (usage_is_set(_usage,USE_STATISTICS)) |
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45 | (*_stat_nb_inst_reexecute) ++; |
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46 | #endif |
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47 | entry_t * entry = new entry_t |
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48 | ( |
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49 | (_param->_have_port_context_id )?PORT_READ(in_REEXECUTE_CONTEXT_ID [i]):0, |
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50 | (_param->_have_port_front_end_id )?PORT_READ(in_REEXECUTE_FRONT_END_ID [i]):0, |
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51 | (_param->_have_port_rob_ptr )?PORT_READ(in_REEXECUTE_PACKET_ID [i]):0, |
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52 | PORT_READ(in_REEXECUTE_OPERATION [i]), |
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53 | PORT_READ(in_REEXECUTE_TYPE [i]), |
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54 | PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [i]), |
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55 | PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_READ [i]), |
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56 | PORT_READ(in_REEXECUTE_STORE_QUEUE_EMPTY [i]), |
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57 | (_param->_have_port_load_queue_ptr)?PORT_READ(in_REEXECUTE_LOAD_QUEUE_PTR_WRITE [i]):0, |
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58 | PORT_READ(in_REEXECUTE_HAS_IMMEDIAT [i]), |
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59 | PORT_READ(in_REEXECUTE_IMMEDIAT [i]), |
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60 | PORT_READ(in_REEXECUTE_READ_RA [i]), |
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61 | PORT_READ(in_REEXECUTE_NUM_REG_RA [i]), |
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62 | PORT_READ(in_REEXECUTE_READ_RB [i]), |
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63 | PORT_READ(in_REEXECUTE_NUM_REG_RB [i]), |
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64 | PORT_READ(in_REEXECUTE_READ_RC [i]), |
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65 | PORT_READ(in_REEXECUTE_NUM_REG_RC [i]), |
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66 | PORT_READ(in_REEXECUTE_WRITE_RD [i]), |
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67 | PORT_READ(in_REEXECUTE_NUM_REG_RD [i]), |
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68 | PORT_READ(in_REEXECUTE_WRITE_RE [i]), |
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69 | PORT_READ(in_REEXECUTE_NUM_REG_RE [i]) |
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70 | ); |
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71 | |
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72 | _reexecute_queue.push_back(entry); |
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73 | } |
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74 | |
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75 | // =================================================================== |
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76 | // =====[ ISSUE_OUT ]================================================= |
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77 | // =================================================================== |
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78 | |
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79 | for (uint32_t i=0; i<_param->_nb_inst_issue; ++i) |
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80 | if (internal_ISSUE_OUT_VAL [i] and PORT_READ(in_ISSUE_OUT_ACK [i])) |
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81 | { |
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82 | #ifdef STATISTICS |
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83 | if (usage_is_set(_usage,USE_STATISTICS)) |
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84 | (*_stat_nb_inst_issue_out ) ++; |
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85 | #endif |
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86 | if (internal_ISSUE_OUT_FROM_REEXECUTE [i]) |
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87 | { |
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88 | entry_t * entry = internal_ISSUE_OUT_ENTRY [i]; |
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89 | |
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90 | log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - From Reexecute_queue",i); |
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91 | |
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92 | _reexecute_queue.remove(entry); |
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93 | |
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94 | delete entry; |
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95 | } |
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96 | // else ... in function specific |
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97 | } |
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98 | } |
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99 | |
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100 | // specific implementation |
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101 | (this->*function_transition) (); |
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102 | |
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103 | // =================================================================== |
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104 | // =====[ PRINT ]==================================================== |
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105 | // =================================================================== |
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106 | |
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107 | #if defined(DEBUG) and DEBUG_Issue_queue and (DEBUG >= DEBUG_TRACE) |
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108 | log_printf(TRACE,Issue_queue,FUNCTION," * Dump Issue_queue"); |
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109 | |
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110 | if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_IN_ORDER) |
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111 | { |
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112 | log_printf(TRACE,Issue_queue,FUNCTION," * reg_NUM_BANK_HEAD : %d",reg_NUM_BANK_HEAD); |
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113 | log_printf(TRACE,Issue_queue,FUNCTION," * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL); |
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114 | } |
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115 | |
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116 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
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117 | { |
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118 | log_printf(TRACE,Issue_queue,FUNCTION," * Bank [%d] size : %d",i,(int)_issue_queue[i].size()); |
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119 | |
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120 | uint32_t j = 0; |
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121 | for (std::list<entry_t*>::iterator it=_issue_queue[i].begin();it!=_issue_queue[i].end(); ++it) |
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122 | { |
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123 | log_printf(TRACE,Issue_queue,FUNCTION," [%.4d] %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d", |
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124 | j, |
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125 | |
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126 | (*it)->_context_id , |
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127 | (*it)->_front_end_id , |
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128 | (*it)->_packet_id , |
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129 | |
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130 | (*it)->_type , |
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131 | (*it)->_operation , |
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132 | |
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133 | (*it)->_store_queue_ptr_write, |
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134 | (*it)->_store_queue_ptr_read , |
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135 | (*it)->_store_queue_empty , |
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136 | (*it)->_load_queue_ptr_write , |
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137 | |
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138 | (*it)->_has_immediat , |
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139 | (*it)->_immediat , |
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140 | |
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141 | (*it)->_read_ra , |
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142 | (*it)->_num_reg_ra , |
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143 | |
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144 | (*it)->_read_rb , |
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145 | (*it)->_num_reg_rb , |
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146 | |
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147 | (*it)->_read_rc , |
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148 | (*it)->_num_reg_rc , |
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149 | |
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150 | (*it)->_write_rd , |
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151 | (*it)->_num_reg_rd , |
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152 | |
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153 | (*it)->_write_re , |
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154 | (*it)->_num_reg_re ); |
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155 | |
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156 | ++j; |
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157 | } |
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158 | } |
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159 | |
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160 | { |
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161 | log_printf(TRACE,Issue_queue,FUNCTION," * Reexecute_queue - size : %d",(int)_reexecute_queue.size()); |
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162 | |
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163 | uint32_t i = 0; |
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164 | |
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165 | for (std::list<entry_t*>::iterator it=_reexecute_queue.begin();it!=_reexecute_queue.end(); ++it) |
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166 | { |
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167 | log_printf(TRACE,Issue_queue,FUNCTION," [%.4d] %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d", |
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168 | i, |
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169 | |
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170 | (*it)->_context_id , |
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171 | (*it)->_front_end_id , |
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172 | (*it)->_packet_id , |
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173 | |
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174 | (*it)->_type , |
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175 | (*it)->_operation , |
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176 | |
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177 | (*it)->_store_queue_ptr_write, |
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178 | (*it)->_store_queue_ptr_read , |
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179 | (*it)->_store_queue_empty , |
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180 | (*it)->_load_queue_ptr_write , |
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181 | |
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182 | (*it)->_has_immediat , |
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183 | (*it)->_immediat , |
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184 | |
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185 | (*it)->_read_ra , |
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186 | (*it)->_num_reg_ra , |
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187 | |
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188 | (*it)->_read_rb , |
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189 | (*it)->_num_reg_rb , |
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190 | |
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191 | (*it)->_read_rc , |
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192 | (*it)->_num_reg_rc , |
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193 | |
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194 | (*it)->_write_rd , |
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195 | (*it)->_num_reg_rd , |
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196 | |
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197 | (*it)->_write_re , |
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198 | (*it)->_num_reg_re ); |
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199 | ++i; |
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200 | } |
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201 | } |
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202 | #endif |
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203 | |
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204 | #ifdef STATISTICS |
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205 | if (usage_is_set(_usage,USE_STATISTICS)) |
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206 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
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207 | *(_stat_bank_nb_inst [i]) += _issue_queue[i].size(); |
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208 | #endif |
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209 | |
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210 | |
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211 | |
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212 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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213 | end_cycle (); |
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214 | #endif |
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215 | |
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216 | log_end(Issue_queue,FUNCTION); |
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217 | }; |
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218 | |
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219 | }; // end namespace issue_queue |
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220 | }; // end namespace ooo_engine |
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221 | }; // end namespace multi_ooo_engine |
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222 | }; // end namespace core |
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223 | |
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224 | }; // end namespace behavioural |
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225 | }; // end namespace morpheo |
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226 | #endif |
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