1 | #ifdef SYSTEMC |
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2 | /* |
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3 | * $Id: Reexecute_unit_genMealy_commit.cpp 136 2009-10-20 18:52:15Z rosiere $ |
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4 | * |
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5 | * [ Description ] |
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6 | * |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h" |
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10 | |
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11 | namespace morpheo { |
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12 | namespace behavioural { |
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13 | namespace core { |
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14 | namespace multi_ooo_engine { |
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15 | namespace ooo_engine { |
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16 | namespace reexecute_unit { |
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17 | |
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18 | #undef FUNCTION |
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19 | #define FUNCTION "Reexecute_unit::genMealy_commit" |
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20 | void Reexecute_unit::genMealy_commit (void) |
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21 | { |
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22 | log_begin(Reexecute_unit,FUNCTION); |
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23 | log_function(Reexecute_unit,FUNCTION,_name.c_str()); |
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24 | |
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25 | if (PORT_READ(in_NRESET)) |
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26 | { |
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27 | // Initialisation |
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28 | Tcontrol_t execute_loop_ack [_param->_nb_execute_loop][_param->_max_nb_inst_execute]; |
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29 | |
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30 | for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) |
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31 | for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j) |
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32 | execute_loop_ack [i][j] = false; |
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33 | |
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34 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
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35 | internal_QUEUE_PUSH [i] = 0; |
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36 | |
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37 | // execute_loop interface |
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38 | std::list<generic::priority::select_t> * select_queue_in = _priority_queue_in ->select(); |
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39 | std::list<generic::priority::select_t>::iterator it_queue_in = select_queue_in ->begin(); |
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40 | |
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41 | std::list<generic::priority::select_t> * select_execute_loop = _priority_execute_loop ->select(); |
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42 | std::list<generic::priority::select_t>::iterator it_execute_loop= select_execute_loop ->begin(); |
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43 | |
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44 | // For each nb_inst |
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45 | for (uint32_t i=0; i<_param->_nb_inst_commit; ++i) |
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46 | { |
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47 | Tcontrol_t commit_val = false; |
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48 | |
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49 | // find a executed instruction |
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50 | for (; |
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51 | (it_execute_loop!=select_execute_loop->end()) and (commit_val == false); |
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52 | ++it_execute_loop) |
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53 | { |
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54 | // take num_execute_loop and num_inst_execute |
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55 | uint32_t x = it_execute_loop->grp; |
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56 | uint32_t y = it_execute_loop->elt; |
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57 | |
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58 | // test id instruction is valid |
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59 | if (PORT_READ(in_EXECUTE_LOOP_VAL [x][y])) |
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60 | { |
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61 | // Need spr_acces / reexecute ? |
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62 | Texception_t exception = PORT_READ(in_EXECUTE_LOOP_EXCEPTION [x][y]); |
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63 | Taddress_t address = PORT_READ(in_EXECUTE_LOOP_ADDRESS [x][y]); |
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64 | Tcontrol_t spr_access = ((exception == EXCEPTION_ALU_SPR_ACCESS_MUST_READ ) or |
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65 | (exception == EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE)); |
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66 | if (spr_access) |
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67 | { |
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68 | // find a not full bank |
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69 | bool find = false; |
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70 | for (; |
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71 | (it_queue_in!=select_queue_in->end()) and (find == false); |
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72 | ++it_queue_in) |
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73 | { |
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74 | uint32_t num_bank = it_queue_in->grp; |
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75 | if (_reexecute_queue [num_bank].size() < _param->_size_queue) |
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76 | { |
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77 | find = true; |
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78 | |
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79 | // this instruction don't need spr access. send at the re order buffer |
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80 | commit_val = 1; // in_EXECUTE_LOOP_VAL = 1 |
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81 | execute_loop_ack [x][y] = PORT_READ(in_COMMIT_ACK [i]); |
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82 | |
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83 | internal_QUEUE_PUSH [num_bank] = execute_loop_ack [x][y]; // in_EXECUTE_LOOP_VAL = 1 |
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84 | internal_QUEUE_NUM_EXECUTE_LOOP [num_bank] = x; |
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85 | internal_QUEUE_NUM_INST_EXECUTE [num_bank] = y; |
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86 | internal_QUEUE_NUM_INST_COMMIT [num_bank] = i; |
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87 | internal_QUEUE_INFO [num_bank].spr_wen = (exception == EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE); |
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88 | |
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89 | // if reexecute, don't commit, just read instruction information (num_reg_rd) |
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90 | PORT_WRITE(out_COMMIT_WEN [i], not must_reexecute(address & 0xffff, internal_QUEUE_INFO[num_bank])); |
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91 | } |
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92 | } |
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93 | } |
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94 | else |
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95 | { |
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96 | // this instruction don't need spr access. send at the re order buffer |
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97 | commit_val = 1; // in_EXECUTE_LOOP_VAL = 1 |
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98 | execute_loop_ack [x][y] = PORT_READ(in_COMMIT_ACK [i]); |
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99 | |
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100 | PORT_WRITE(out_COMMIT_WEN [i], 1); |
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101 | } |
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102 | |
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103 | if (commit_val) |
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104 | { |
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105 | // if (_param->_have_port_context_id) |
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106 | // PORT_WRITE(out_COMMIT_CONTEXT_ID [i], PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID [x][y])); |
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107 | // if (_param->_have_port_front_end_id) |
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108 | // PORT_WRITE(out_COMMIT_FRONT_END_ID [i], PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y])); |
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109 | if (_param->_have_port_rob_ptr ) |
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110 | PORT_WRITE(out_COMMIT_PACKET_ID [i], PORT_READ(in_EXECUTE_LOOP_PACKET_ID [x][y])); |
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111 | //PORT_WRITE(out_COMMIT_OPERATION [i], PORT_READ(in_EXECUTE_LOOP_OPERATION [x][y])); |
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112 | //PORT_WRITE(out_COMMIT_TYPE [i], PORT_READ(in_EXECUTE_LOOP_TYPE [x][y])); |
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113 | PORT_WRITE(out_COMMIT_CANCEL [i], PORT_READ(in_EXECUTE_LOOP_CANCEL [x][y])); |
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114 | PORT_WRITE(out_COMMIT_FLAGS [i], PORT_READ(in_EXECUTE_LOOP_FLAGS [x][y])); |
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115 | PORT_WRITE(out_COMMIT_EXCEPTION [i], exception); |
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116 | PORT_WRITE(out_COMMIT_NO_SEQUENCE [i], PORT_READ(in_EXECUTE_LOOP_NO_SEQUENCE [x][y])); |
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117 | PORT_WRITE(out_COMMIT_ADDRESS [i], address); |
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118 | } |
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119 | } |
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120 | } |
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121 | |
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122 | #ifdef STATISTICS |
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123 | internal_COMMIT_VAL [i] = commit_val; |
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124 | #endif |
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125 | PORT_WRITE(out_COMMIT_VAL [i], commit_val); |
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126 | } |
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127 | |
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128 | for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) |
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129 | for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j) |
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130 | PORT_WRITE(out_EXECUTE_LOOP_ACK [i][j], execute_loop_ack [i][j]); |
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131 | } |
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132 | else |
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133 | { |
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134 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
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135 | internal_QUEUE_PUSH [i] = 0; |
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136 | |
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137 | #ifdef STATISTICS |
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138 | for (uint32_t i=0; i<_param->_nb_inst_commit; ++i) |
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139 | internal_COMMIT_VAL [i] = 0; |
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140 | #endif |
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141 | for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) |
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142 | for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j) |
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143 | PORT_WRITE(out_EXECUTE_LOOP_ACK [i][j], 0); |
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144 | } |
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145 | |
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146 | log_end(Reexecute_unit,FUNCTION); |
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147 | }; |
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148 | |
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149 | }; // end namespace reexecute_unit |
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150 | }; // end namespace ooo_engine |
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151 | }; // end namespace multi_ooo_engine |
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152 | }; // end namespace core |
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153 | |
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154 | }; // end namespace behavioural |
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155 | }; // end namespace morpheo |
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156 | #endif |
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157 | |
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158 | |
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