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test.cpp @ 78

Last change on this file since 78 was 78, checked in by rosiere, 16 years ago

Add :

Execute_loop (must be test systemC)
Prediction
- Direction : predifined scheme
- Branch Target Buffer
iFetch_unit
- ifetch_queue
- pc management
Decod_unit
- coming soon : support for custom operation
Rename_unit
- RAT
- Free_list
- Dependence RAW check
- Load store unit pointer
New Environnement (hierarchy_memory will remove in a next version)

Modif :

Manage Custom Operation
All component in execute_loop to use the new statistics management

Not Finish :

Return Address Stack
Environnement

File size: 26.8 KB

Line
1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/include/test.h"
10	#include "Common/include/Test.h"
11	#include "Behavioural/include/Allocation.h"
12	#include <list>
13
14	#define NB_ITERATION 32
15	#define CYCLE_MAX (128*NB_ITERATION)
16
17	#define LABEL(str...) \
18	{ \
19	msg (_("{%d} "),static_cast<uint32_t>(sc_simulation_time())); \
20	msg (str); \
21	msg (_("\n")); \
22	} while(0)
23
24	#define SC_START(cycle_offset) \
25	do \
26	{ \
27	/cout << "SC_START (begin)" << endl;/ \
28	\
29	uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \
30	if (cycle_offset != 0) \
31	{ \
32	cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \
33	} \
34	\
35	if (cycle_current > CYCLE_MAX) \
36	{ \
37	TEST_KO("Maximal cycles Reached"); \
38	} \
39	\
40	sc_start(cycle_offset); \
41	\
42	/cout << "SC_START (end )" << endl;/ \
43	} while(0)
44
45	void test (string name,
46	morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Parameters * _param)
47	{
48	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
49
50	#ifdef STATISTICS
51	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
52	#endif
53
54	Dependency_checking_unit * _Dependency_checking_unit = new Dependency_checking_unit (name.c_str(),
55	#ifdef STATISTICS
56	_parameters_statistics,
57	#endif
58	_param);
59
60	#ifdef SYSTEMC
61	/*********************************************************************
62	* Déclarations des signaux
63	*********************************************************************/
64
65	string rename;
66
67	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
68	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
69
70	// ALLOC1_SC_SIGNAL( in_RENAME_IN_VAL ," in_RENAME_IN_VAL ",Tcontrol_t ,_param->_nb_inst_insert);
71	// ALLOC1_SC_SIGNAL(out_RENAME_IN_ACK ,"out_RENAME_IN_ACK ",Tcontrol_t ,_param->_nb_inst_insert);
72	ALLOC1_SC_SIGNAL( in_RENAME_IN_FRONT_END_ID ," in_RENAME_IN_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert);
73	ALLOC1_SC_SIGNAL( in_RENAME_IN_CONTEXT_ID ," in_RENAME_IN_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert);
74	ALLOC1_SC_SIGNAL( in_RENAME_IN_READ_RA ," in_RENAME_IN_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert);
75	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA_LOG ," in_RENAME_IN_NUM_REG_RA_LOG ",Tgeneral_address_t,_param->_nb_inst_insert);
76	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA_PHY ," in_RENAME_IN_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert);
77	ALLOC1_SC_SIGNAL( in_RENAME_IN_READ_RB ," in_RENAME_IN_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert);
78	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB_LOG ," in_RENAME_IN_NUM_REG_RB_LOG ",Tgeneral_address_t,_param->_nb_inst_insert);
79	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB_PHY ," in_RENAME_IN_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert);
80	ALLOC1_SC_SIGNAL( in_RENAME_IN_READ_RC ," in_RENAME_IN_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert);
81	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC_LOG ," in_RENAME_IN_NUM_REG_RC_LOG ",Tspecial_address_t,_param->_nb_inst_insert);
82	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC_PHY ," in_RENAME_IN_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert);
83	ALLOC1_SC_SIGNAL( in_RENAME_IN_WRITE_RD ," in_RENAME_IN_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert);
84	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD_LOG ," in_RENAME_IN_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_insert);
85	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD_PHY_OLD ," in_RENAME_IN_NUM_REG_RD_PHY_OLD ",Tgeneral_address_t,_param->_nb_inst_insert);
86	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD_PHY_NEW ," in_RENAME_IN_NUM_REG_RD_PHY_NEW ",Tgeneral_address_t,_param->_nb_inst_insert);
87	ALLOC1_SC_SIGNAL( in_RENAME_IN_WRITE_RE ," in_RENAME_IN_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert);
88	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE_LOG ," in_RENAME_IN_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_insert);
89	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE_PHY_OLD ," in_RENAME_IN_NUM_REG_RE_PHY_OLD ",Tspecial_address_t,_param->_nb_inst_insert);
90	ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE_PHY_NEW ," in_RENAME_IN_NUM_REG_RE_PHY_NEW ",Tspecial_address_t,_param->_nb_inst_insert);
91	// ALLOC1_SC_SIGNAL(out_RENAME_OUT_VAL ,"out_RENAME_OUT_VAL ",Tcontrol_t ,_param->_nb_inst_insert);
92	// ALLOC1_SC_SIGNAL( in_RENAME_OUT_ACK ," in_RENAME_OUT_ACK ",Tcontrol_t ,_param->_nb_inst_insert);
93	ALLOC1_SC_SIGNAL(out_RENAME_OUT_FRONT_END_ID ,"out_RENAME_OUT_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert);
94	ALLOC1_SC_SIGNAL(out_RENAME_OUT_CONTEXT_ID ,"out_RENAME_OUT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert);
95	ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RA ,"out_RENAME_OUT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert);
96	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RA_LOG ,"out_RENAME_OUT_NUM_REG_RA_LOG ",Tgeneral_address_t,_param->_nb_inst_insert);
97	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RA_PHY ,"out_RENAME_OUT_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert);
98	ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RB ,"out_RENAME_OUT_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert);
99	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RB_LOG ,"out_RENAME_OUT_NUM_REG_RB_LOG ",Tgeneral_address_t,_param->_nb_inst_insert);
100	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RB_PHY ,"out_RENAME_OUT_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert);
101	ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RC ,"out_RENAME_OUT_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert);
102	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RC_LOG ,"out_RENAME_OUT_NUM_REG_RC_LOG ",Tspecial_address_t,_param->_nb_inst_insert);
103	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RC_PHY ,"out_RENAME_OUT_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert);
104	ALLOC1_SC_SIGNAL(out_RENAME_OUT_WRITE_RD ,"out_RENAME_OUT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert);
105	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RD_LOG ,"out_RENAME_OUT_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_insert);
106	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RD_PHY_OLD,"out_RENAME_OUT_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_insert);
107	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RD_PHY_NEW,"out_RENAME_OUT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert);
108	ALLOC1_SC_SIGNAL(out_RENAME_OUT_WRITE_RE ,"out_RENAME_OUT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert);
109	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RE_LOG ,"out_RENAME_OUT_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_insert);
110	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RE_PHY_OLD,"out_RENAME_OUT_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_insert);
111	ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RE_PHY_NEW,"out_RENAME_OUT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
112
113	/********************************************************
114	* Instanciation
115	********************************************************/
116
117	msg(_("<%s> : Instanciation of _Dependency_checking_unit.\n"),name.c_str());
118
119	((_Dependency_checking_unit->in_CLOCK)) ((in_CLOCK));
120	((_Dependency_checking_unit->in_NRESET)) ((in_NRESET));
121
122	// INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_VAL ,_param->_nb_inst_insert);
123	// INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_IN_ACK ,_param->_nb_inst_insert);
124	if (_param->_have_port_front_end_id)
125	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_FRONT_END_ID ,_param->_nb_inst_insert);
126	if (_param->_have_port_context_id)
127	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_CONTEXT_ID ,_param->_nb_inst_insert);
128	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_READ_RA ,_param->_nb_inst_insert);
129	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RA_LOG ,_param->_nb_inst_insert);
130	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RA_PHY ,_param->_nb_inst_insert);
131	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_READ_RB ,_param->_nb_inst_insert);
132	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RB_LOG ,_param->_nb_inst_insert);
133	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RB_PHY ,_param->_nb_inst_insert);
134	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_READ_RC ,_param->_nb_inst_insert);
135	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RC_LOG ,_param->_nb_inst_insert);
136	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RC_PHY ,_param->_nb_inst_insert);
137	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_WRITE_RD ,_param->_nb_inst_insert);
138	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RD_LOG ,_param->_nb_inst_insert);
139	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert);
140	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert);
141	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_WRITE_RE ,_param->_nb_inst_insert);
142	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RE_LOG ,_param->_nb_inst_insert);
143	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert);
144	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert);
145
146	// INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_VAL ,_param->_nb_inst_insert);
147	// INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_OUT_ACK ,_param->_nb_inst_insert);
148	if (_param->_have_port_front_end_id)
149	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_FRONT_END_ID ,_param->_nb_inst_insert);
150	if (_param->_have_port_context_id)
151	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_CONTEXT_ID ,_param->_nb_inst_insert);
152	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_READ_RA ,_param->_nb_inst_insert);
153	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RA_LOG ,_param->_nb_inst_insert);
154	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RA_PHY ,_param->_nb_inst_insert);
155	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_READ_RB ,_param->_nb_inst_insert);
156	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RB_LOG ,_param->_nb_inst_insert);
157	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RB_PHY ,_param->_nb_inst_insert);
158	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_READ_RC ,_param->_nb_inst_insert);
159	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RC_LOG ,_param->_nb_inst_insert);
160	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RC_PHY ,_param->_nb_inst_insert);
161	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_WRITE_RD ,_param->_nb_inst_insert);
162	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RD_LOG ,_param->_nb_inst_insert);
163	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert);
164	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert);
165	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_WRITE_RE ,_param->_nb_inst_insert);
166	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RE_LOG ,_param->_nb_inst_insert);
167	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert);
168	INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
169
170	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
171
172	Time * _time = new Time();
173
174	/********************************************************
175	* Simulation - Begin
176	********************************************************/
177
178	// Initialisation
179
180	const uint32_t seed = 0;
181	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
182
183	srand(seed);
184
185	int32_t percent_transaction_read = 75;
186	int32_t percent_transaction_write = 75;
187
188	SC_START(0);
189	LABEL("Initialisation");
190
191	LABEL("Reset");
192	in_NRESET->write(0);
193	SC_START(5);
194	in_NRESET->write(1);
195
196	LABEL("Loop of Test");
197
198	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
199	{
200	LABEL("Iteration %d",iteration);
201
202	Tgeneral_address_t rat_gpr [_param->_nb_front_end][_param->_max_nb_context][_param->_nb_general_register_logic];
203	Tspecial_address_t rat_spr [_param->_nb_front_end][_param->_max_nb_context][_param->_nb_special_register_logic];
204	std::list<Tgeneral_address_t> free_list_gpr [_param->_nb_front_end][_param->_max_nb_context];
205	std::list<Tspecial_address_t> free_list_spr [_param->_nb_front_end][_param->_max_nb_context];
206
207	for (uint32_t x=0; x< _param->_nb_front_end; x++)
208	for (uint32_t y=0; y<_param->_max_nb_context; y++)
209	{
210	for (uint32_t i=0; i<_param->_nb_general_register_logic; i++)
211	rat_gpr [x][y][i] = i;
212	for (uint32_t i=_param->_nb_general_register_logic; i<_param->_nb_general_register; i++)
213	free_list_gpr[x][y].push_back(i);
214	for (uint32_t i=0; i<_param->_nb_special_register_logic; i++)
215	rat_spr [x][y][i] = i;
216	for (uint32_t i=_param->_nb_special_register_logic; i<_param->_nb_special_register; i++)
217	free_list_spr[x][y].push_back(i);
218	}
219
220	int32_t nb_request = 32;
221
222	while (nb_request >= 0)
223	{
224	// uint32_t nb_in_val = rand()%_param->_nb_inst_insert;
225	// uint32_t nb_out_ack = rand()%_param->_nb_inst_insert;
226
227	std::list<Tgeneral_address_t>::iterator it_gpr [_param->_nb_front_end][_param->_max_nb_context];
228	std::list<Tspecial_address_t>::iterator it_spr [_param->_nb_front_end][_param->_max_nb_context];
229
230	for (uint32_t x=0; x< _param->_nb_front_end; x++)
231	for (uint32_t y=0; y<_param->_max_nb_context; y++)
232	{
233	it_gpr [x][y] = free_list_gpr [x][y].begin();
234	it_spr [x][y] = free_list_spr [x][y].begin();
235	}
236
237	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
238	{
239	Tcontext_t front_end_id= rand()%_param->_nb_front_end;
240	Tcontext_t context_id = rand()%_param->_max_nb_context;
241
242	Tgeneral_address_t ra_log = rand()%_param->_nb_general_register_logic;
243	Tgeneral_address_t rb_log = rand()%_param->_nb_general_register_logic;
244	Tspecial_address_t rc_log = rand()%_param->_nb_special_register_logic;
245	Tgeneral_address_t rd_log = rand()%_param->_nb_general_register_logic;
246	Tspecial_address_t re_log = rand()%_param->_nb_special_register_logic;
247	Tcontrol_t read_ra = ((rand()%100)<percent_transaction_read );
248	Tcontrol_t read_rb = ((rand()%100)<percent_transaction_read );
249	Tcontrol_t read_rc = ((rand()%100)<percent_transaction_read );
250	Tcontrol_t write_rd = ((rand()%100)<percent_transaction_write)and (i < free_list_gpr [front_end_id][context_id].size());
251	Tcontrol_t write_re = ((rand()%100)<percent_transaction_write)and (i < free_list_spr [front_end_id][context_id].size());
252
253	// in_RENAME_IN_VAL [i]->write(i<nb_in_val );
254	in_RENAME_IN_FRONT_END_ID [i]->write(front_end_id );
255	in_RENAME_IN_CONTEXT_ID [i]->write(context_id );
256	in_RENAME_IN_READ_RA [i]->write(read_ra );
257	in_RENAME_IN_NUM_REG_RA_LOG [i]->write(ra_log );
258	in_RENAME_IN_NUM_REG_RA_PHY [i]->write(rat_gpr[front_end_id][context_id][ra_log]);
259	in_RENAME_IN_READ_RB [i]->write(read_rb );
260	in_RENAME_IN_NUM_REG_RB_LOG [i]->write(rb_log );
261	in_RENAME_IN_NUM_REG_RB_PHY [i]->write(rat_gpr[front_end_id][context_id][rb_log]);
262	in_RENAME_IN_READ_RC [i]->write(read_rc );
263	in_RENAME_IN_NUM_REG_RC_LOG [i]->write(rc_log );
264	in_RENAME_IN_NUM_REG_RC_PHY [i]->write(rat_spr[front_end_id][context_id][rc_log]);
265	in_RENAME_IN_WRITE_RD [i]->write(write_rd );
266	in_RENAME_IN_NUM_REG_RD_LOG [i]->write(rd_log );
267	in_RENAME_IN_NUM_REG_RD_PHY_OLD [i]->write(rat_gpr[front_end_id][context_id][rd_log]);
268	in_RENAME_IN_NUM_REG_RD_PHY_NEW [i]->write((write_rd)?*it_gpr[front_end_id][context_id]:0);
269	in_RENAME_IN_WRITE_RE [i]->write(write_re );
270	in_RENAME_IN_NUM_REG_RE_LOG [i]->write(re_log );
271	in_RENAME_IN_NUM_REG_RE_PHY_OLD [i]->write(rat_spr[front_end_id][context_id][re_log]);
272	in_RENAME_IN_NUM_REG_RE_PHY_NEW [i]->write((write_re)?*it_spr[front_end_id][context_id]:0);
273
274	// in_RENAME_OUT_ACK [i]->write(i<nb_out_ack );
275
276	LABEL("Rename_in [%d]",i);
277	LABEL(" * FRONT_END_ID : %d",front_end_id );
278	LABEL(" * CONTEXT_ID : %d",context_id );
279	LABEL(" * READ_RA : %d",read_ra );
280	LABEL(" * NUM_REG_RA_LOG : %d",ra_log );
281	LABEL(" * NUM_REG_RA_PHY : %d",rat_gpr[front_end_id][context_id][ra_log]);
282	LABEL(" * READ_RB : %d",read_rb );
283	LABEL(" * NUM_REG_RB_LOG : %d",rb_log );
284	LABEL(" * NUM_REG_RB_PHY : %d",rat_gpr[front_end_id][context_id][rb_log]);
285	LABEL(" * READ_RC : %d",read_rc );
286	LABEL(" * NUM_REG_RC_LOG : %d",rc_log );
287	LABEL(" * NUM_REG_RC_PHY : %d",rat_spr[front_end_id][context_id][rc_log]);
288	LABEL(" * WRITE_RD : %d",write_rd );
289	LABEL(" * NUM_REG_RD_LOG : %d",rd_log );
290	LABEL(" * NUM_REG_RD_PHY_OLD : %d",rat_gpr[front_end_id][context_id][rd_log]);
291	LABEL(" * NUM_REG_RD_PHY_NEW : %d",(write_rd)?*it_gpr[front_end_id][context_id]:0);
292	LABEL(" * WRITE_RE : %d",write_re );
293	LABEL(" * NUM_REG_RE_LOG : %d",re_log );
294	LABEL(" * NUM_REG_RE_PHY_OLD : %d",rat_spr[front_end_id][context_id][re_log]);
295	LABEL(" * NUM_REG_RE_PHY_NEW : %d",(write_re)?*it_spr[front_end_id][context_id]:0);
296
297
298	if (write_rd)
299	it_gpr[front_end_id][context_id] ++;
300	if (write_re)
301	it_spr[front_end_id][context_id] ++;
302	}
303
304	SC_START(0);
305
306	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
307	{
308	// if ( in_RENAME_IN_VAL [i]->read() ==
309	// out_RENAME_IN_ACK [i]->read() ==
310	// out_RENAME_OUT_VAL [i]->read() ==
311	// in_RENAME_OUT_ACK [i]->read() == 1)
312	{
313	nb_request --;
314
315	LABEL("Rename_out [%d]",i);
316
317	Tcontext_t front_end_id= (_param->_have_port_front_end_id)?in_RENAME_IN_FRONT_END_ID [i]->read():0;
318	Tcontext_t context_id = (_param->_have_port_context_id )?in_RENAME_IN_CONTEXT_ID [i]->read():0;
319
320	if (_param->_have_port_front_end_id)
321	TEST(Tcontext_t ,out_RENAME_OUT_FRONT_END_ID [i]->read(), front_end_id);
322	if (_param->_have_port_context_id)
323	TEST(Tcontext_t ,out_RENAME_OUT_CONTEXT_ID [i]->read(), context_id);
324
325
326	Tcontrol_t read_ra = in_RENAME_IN_READ_RA [i]->read();
327	Tgeneral_address_t num_reg_ra_log = in_RENAME_IN_NUM_REG_RA_LOG [i]->read();
328	Tcontrol_t read_rb = in_RENAME_IN_READ_RB [i]->read();
329	Tgeneral_address_t num_reg_rb_log = in_RENAME_IN_NUM_REG_RB_LOG [i]->read();
330	Tcontrol_t read_rc = in_RENAME_IN_READ_RC [i]->read();
331	Tspecial_address_t num_reg_rc_log = in_RENAME_IN_NUM_REG_RC_LOG [i]->read();
332	Tcontrol_t write_rd = in_RENAME_IN_WRITE_RD [i]->read();
333	Tgeneral_address_t num_reg_rd_log = in_RENAME_IN_NUM_REG_RD_LOG [i]->read();
334	Tgeneral_address_t num_reg_rd_phy_old = in_RENAME_IN_NUM_REG_RD_PHY_OLD [i]->read();
335	Tgeneral_address_t num_reg_rd_phy_new = in_RENAME_IN_NUM_REG_RD_PHY_NEW [i]->read();
336	Tcontrol_t write_re = in_RENAME_IN_WRITE_RE [i]->read();
337	Tspecial_address_t num_reg_re_log = in_RENAME_IN_NUM_REG_RE_LOG [i]->read();
338	Tspecial_address_t num_reg_re_phy_old = in_RENAME_IN_NUM_REG_RE_PHY_OLD [i]->read();
339	Tspecial_address_t num_reg_re_phy_new = in_RENAME_IN_NUM_REG_RE_PHY_NEW [i]->read();
340
341	TEST(Tcontrol_t ,out_RENAME_OUT_READ_RA [i]->read(), read_ra );
342	TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RA_LOG [i]->read(), num_reg_ra_log );
343	if (read_ra)
344	TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RA_PHY [i]->read(), rat_gpr[front_end_id][context_id][num_reg_ra_log]);
345	TEST(Tcontrol_t ,out_RENAME_OUT_READ_RB [i]->read(), read_rb );
346	TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RB_LOG [i]->read(), num_reg_rb_log );
347	if (read_rb)
348	TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RB_PHY [i]->read(), rat_gpr[front_end_id][context_id][num_reg_rb_log]);
349	TEST(Tcontrol_t ,out_RENAME_OUT_READ_RC [i]->read(), read_rc );
350	TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RC_LOG [i]->read(), num_reg_rc_log );
351	if (read_rc)
352	TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RC_PHY [i]->read(), rat_spr[front_end_id][context_id][num_reg_rc_log]);
353	TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RD [i]->read(), write_rd );
354	TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD_LOG [i]->read(), num_reg_rd_log );
355	if (write_rd)
356	{
357	TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i]->read(), rat_gpr[front_end_id][context_id][num_reg_rd_log]);
358	TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD_PHY_NEW [i]->read(), free_list_gpr[front_end_id][context_id].front());
359	}
360	TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RE [i]->read(), write_re );
361	TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE_LOG [i]->read(), num_reg_re_log );
362	if (write_re)
363	{
364	TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i]->read(), rat_spr[front_end_id][context_id][num_reg_re_log]);
365	TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE_PHY_NEW [i]->read(), free_list_spr[front_end_id][context_id].front());
366	}
367
368	if (write_rd)
369	{
370	free_list_gpr[front_end_id][context_id].pop_front();
371	free_list_gpr[front_end_id][context_id].push_back(num_reg_rd_phy_old);
372	rat_gpr [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new;
373	}
374	if (write_re)
375	{
376	free_list_spr[front_end_id][context_id].pop_front();
377	free_list_spr[front_end_id][context_id].push_back(num_reg_re_phy_old);
378	rat_spr [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new;
379	}
380
381	}
382	}
383	SC_START(1);
384	}
385	}
386
387	/********************************************************
388	* Simulation - End
389	********************************************************/
390
391	TEST_OK ("End of Simulation");
392	delete _time;
393
394	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
395
396	delete in_CLOCK;
397	delete in_NRESET;
398
399	// delete [] in_RENAME_IN_VAL ;
400	// delete [] out_RENAME_IN_ACK ;
401	if (_param->_have_port_front_end_id)
402	delete [] in_RENAME_IN_FRONT_END_ID ;
403	if (_param->_have_port_context_id)
404	delete [] in_RENAME_IN_CONTEXT_ID ;
405	delete [] in_RENAME_IN_READ_RA ;
406	delete [] in_RENAME_IN_NUM_REG_RA_LOG ;
407	delete [] in_RENAME_IN_NUM_REG_RA_PHY ;
408	delete [] in_RENAME_IN_READ_RB ;
409	delete [] in_RENAME_IN_NUM_REG_RB_LOG ;
410	delete [] in_RENAME_IN_NUM_REG_RB_PHY ;
411	delete [] in_RENAME_IN_READ_RC ;
412	delete [] in_RENAME_IN_NUM_REG_RC_LOG ;
413	delete [] in_RENAME_IN_NUM_REG_RC_PHY ;
414	delete [] in_RENAME_IN_WRITE_RD ;
415	delete [] in_RENAME_IN_NUM_REG_RD_LOG ;
416	delete [] in_RENAME_IN_NUM_REG_RD_PHY_OLD ;
417	delete [] in_RENAME_IN_NUM_REG_RD_PHY_NEW ;
418	delete [] in_RENAME_IN_WRITE_RE ;
419	delete [] in_RENAME_IN_NUM_REG_RE_LOG ;
420	delete [] in_RENAME_IN_NUM_REG_RE_PHY_OLD ;
421	delete [] in_RENAME_IN_NUM_REG_RE_PHY_NEW ;
422	// delete [] out_RENAME_OUT_VAL ;
423	// delete [] in_RENAME_OUT_ACK ;
424	if (_param->_have_port_front_end_id)
425	delete [] out_RENAME_OUT_FRONT_END_ID ;
426	if (_param->_have_port_context_id)
427	delete [] out_RENAME_OUT_CONTEXT_ID ;
428	delete [] out_RENAME_OUT_READ_RA ;
429	delete [] out_RENAME_OUT_NUM_REG_RA_LOG ;
430	delete [] out_RENAME_OUT_NUM_REG_RA_PHY ;
431	delete [] out_RENAME_OUT_READ_RB ;
432	delete [] out_RENAME_OUT_NUM_REG_RB_LOG ;
433	delete [] out_RENAME_OUT_NUM_REG_RB_PHY ;
434	delete [] out_RENAME_OUT_READ_RC ;
435	delete [] out_RENAME_OUT_NUM_REG_RC_LOG ;
436	delete [] out_RENAME_OUT_NUM_REG_RC_PHY ;
437	delete [] out_RENAME_OUT_WRITE_RD ;
438	delete [] out_RENAME_OUT_NUM_REG_RD_LOG ;
439	delete [] out_RENAME_OUT_NUM_REG_RD_PHY_OLD;
440	delete [] out_RENAME_OUT_NUM_REG_RD_PHY_NEW;
441	delete [] out_RENAME_OUT_WRITE_RE ;
442	delete [] out_RENAME_OUT_NUM_REG_RE_LOG ;
443	delete [] out_RENAME_OUT_NUM_REG_RE_PHY_OLD;
444	delete [] out_RENAME_OUT_NUM_REG_RE_PHY_NEW;
445
446	#endif
447
448	delete _Dependency_checking_unit;
449	#ifdef STATISTICS
450	delete _parameters_statistics;
451	#endif
452	}

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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/test.cpp @ 78

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