1 | #ifdef SYSTEMC |
---|
2 | /* |
---|
3 | * $Id: Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp 145 2010-10-13 18:15:51Z rosiere $ |
---|
4 | * |
---|
5 | * [ Description ] |
---|
6 | * |
---|
7 | */ |
---|
8 | |
---|
9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" |
---|
10 | |
---|
11 | namespace morpheo { |
---|
12 | namespace behavioural { |
---|
13 | namespace core { |
---|
14 | namespace multi_ooo_engine { |
---|
15 | namespace ooo_engine { |
---|
16 | namespace rename_unit { |
---|
17 | namespace register_translation_unit { |
---|
18 | namespace register_address_translation_unit { |
---|
19 | |
---|
20 | |
---|
21 | #undef FUNCTION |
---|
22 | #define FUNCTION "Register_Address_Translation_unit::function_depth_save_genMealy_rename" |
---|
23 | void Register_Address_Translation_unit::function_depth_save_genMealy_rename (void) |
---|
24 | { |
---|
25 | log_begin(Register_Address_Translation_unit,FUNCTION); |
---|
26 | log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); |
---|
27 | |
---|
28 | if (PORT_READ(in_NRESET) != 0) |
---|
29 | { |
---|
30 | bool rat_gpr_speculative_valid [_param->_nb_front_end][_param->_max_nb_context][_param->_max_nb_branch_speculated][_param->_nb_general_register_logic]; |
---|
31 | bool rat_spr_speculative_valid [_param->_nb_front_end][_param->_max_nb_context][_param->_max_nb_branch_speculated][_param->_nb_special_register_logic]; |
---|
32 | // bool reg_save_rat [_param->_nb_front_end][_param->_max_nb_context]; |
---|
33 | |
---|
34 | for (uint32_t i=0; i<_param->_nb_front_end; ++i) |
---|
35 | for (uint32_t j=0; j<_param->_nb_context[i]; ++j) |
---|
36 | { |
---|
37 | // reg_save_rat [i][j] = reg_SAVE_RAT [i][j]; |
---|
38 | for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k) |
---|
39 | { |
---|
40 | for (uint32_t l=0; l<_param->_nb_general_register_logic; ++l) |
---|
41 | rat_gpr_speculative_valid [i][j][k][l] = RAT_GPR_SPECULATIVE_VALID [i][j][k][l]; |
---|
42 | for (uint32_t l=0; l<_param->_nb_special_register_logic; ++l) |
---|
43 | rat_spr_speculative_valid [i][j][k][l] = RAT_SPR_SPECULATIVE_VALID [i][j][k][l]; |
---|
44 | } |
---|
45 | } |
---|
46 | |
---|
47 | for (uint32_t i=0; i<_param->_nb_inst_insert; i++) |
---|
48 | { |
---|
49 | if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access |
---|
50 | { |
---|
51 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RENAME [%d]",i); |
---|
52 | |
---|
53 | Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; |
---|
54 | Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; |
---|
55 | |
---|
56 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); |
---|
57 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id); |
---|
58 | |
---|
59 | Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN[front_end_id][context_id]):0; |
---|
60 | Tdepth_t depth_max = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX[front_end_id][context_id]):0; |
---|
61 | Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL [front_end_id][context_id]); |
---|
62 | |
---|
63 | Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_RENAME_DEPTH [i]):0; |
---|
64 | // Tcontrol_t save_rat = PORT_READ(in_RENAME_SAVE_RAT [i]); |
---|
65 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * depth/min/max/full : %d - [%d:%d] - %d",depth,depth_min,depth_max,depth_full); |
---|
66 | // log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * save_rat (new) : %d",save_rat); |
---|
67 | // log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * save_rat (old) : %d",reg_save_rat [front_end_id][context_id]); |
---|
68 | |
---|
69 | // if (reg_save_rat [front_end_id][context_id]) |
---|
70 | // { |
---|
71 | // for (uint32_t num_reg_log=0; num_reg_log<_param->_nb_general_register_logic; num_reg_log++) |
---|
72 | // rat_gpr_speculative_valid [front_end_id][context_id][depth][num_reg_log] = false; |
---|
73 | // for (uint32_t num_reg_log=0; num_reg_log<_param->_nb_special_register_logic; num_reg_log++) |
---|
74 | // rat_spr_speculative_valid [front_end_id][context_id][depth][num_reg_log] = false; |
---|
75 | // } |
---|
76 | |
---|
77 | // reg_save_rat[front_end_id][context_id] = save_rat; |
---|
78 | |
---|
79 | Tgeneral_address_t num_reg_ra_log = PORT_READ(in_RENAME_NUM_REG_RA_LOG [i]); //%_param->_nb_general_register; |
---|
80 | Tgeneral_address_t num_reg_rb_log = PORT_READ(in_RENAME_NUM_REG_RB_LOG [i]); //%_param->_nb_general_register; |
---|
81 | Tspecial_address_t num_reg_rc_log = PORT_READ(in_RENAME_NUM_REG_RC_LOG [i]); //%_param->_nb_special_register; |
---|
82 | Tgeneral_address_t num_reg_rd_log = PORT_READ(in_RENAME_NUM_REG_RD_LOG [i]); //%_param->_nb_general_register; |
---|
83 | Tspecial_address_t num_reg_re_log = PORT_READ(in_RENAME_NUM_REG_RE_LOG [i]); //%_param->_nb_special_register; |
---|
84 | |
---|
85 | Tgeneral_address_t num_reg_ra_phy ; |
---|
86 | Tgeneral_address_t num_reg_rb_phy ; |
---|
87 | Tspecial_address_t num_reg_rc_phy ; |
---|
88 | Tgeneral_address_t num_reg_rd_phy_old; |
---|
89 | Tspecial_address_t num_reg_re_phy_old; |
---|
90 | |
---|
91 | bool find_ra = false; |
---|
92 | bool find_rb = false; |
---|
93 | bool find_rc = false; |
---|
94 | bool find_rd = false; |
---|
95 | bool find_re = false; |
---|
96 | |
---|
97 | for (uint32_t num_branch=0; num_branch<_param->_nb_branch_speculated[front_end_id][context_id]; ++num_branch) |
---|
98 | { |
---|
99 | uint32_t index = (depth-num_branch)%_param->_nb_branch_speculated[front_end_id][context_id]; |
---|
100 | |
---|
101 | if (not find_ra and rat_gpr_speculative_valid [front_end_id][context_id][index][num_reg_ra_log]) |
---|
102 | { |
---|
103 | find_ra = true; |
---|
104 | num_reg_ra_phy = RAT_GPR_SPECULATIVE[front_end_id][context_id][index][num_reg_ra_log]; |
---|
105 | } |
---|
106 | |
---|
107 | if (not find_rb and rat_gpr_speculative_valid [front_end_id][context_id][index][num_reg_rb_log]) |
---|
108 | { |
---|
109 | find_rb = true; |
---|
110 | num_reg_rb_phy = RAT_GPR_SPECULATIVE[front_end_id][context_id][index][num_reg_rb_log]; |
---|
111 | } |
---|
112 | |
---|
113 | if (not find_rc and rat_spr_speculative_valid [front_end_id][context_id][index][num_reg_rc_log]) |
---|
114 | { |
---|
115 | find_rc = true; |
---|
116 | num_reg_rc_phy = RAT_SPR_SPECULATIVE[front_end_id][context_id][index][num_reg_rc_log]; |
---|
117 | } |
---|
118 | |
---|
119 | if (not find_rd and rat_gpr_speculative_valid [front_end_id][context_id][index][num_reg_rd_log]) |
---|
120 | { |
---|
121 | find_rd = true; |
---|
122 | num_reg_rd_phy_old = RAT_GPR_SPECULATIVE[front_end_id][context_id][index][num_reg_rd_log]; |
---|
123 | } |
---|
124 | |
---|
125 | if (not find_re and rat_spr_speculative_valid [front_end_id][context_id][index][num_reg_re_log]) |
---|
126 | { |
---|
127 | find_re = true; |
---|
128 | num_reg_re_phy_old = RAT_SPR_SPECULATIVE[front_end_id][context_id][index][num_reg_re_log]; |
---|
129 | } |
---|
130 | |
---|
131 | // if index == depth_min, stop because depth_min is the not speculative. |
---|
132 | // if (index == depth_min) |
---|
133 | // break; |
---|
134 | } |
---|
135 | |
---|
136 | if (not find_ra) |
---|
137 | num_reg_ra_phy = RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_ra_log]; |
---|
138 | if (not find_rb) |
---|
139 | num_reg_rb_phy = RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rb_log]; |
---|
140 | if (not find_rc) |
---|
141 | num_reg_rc_phy = RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rc_log]; |
---|
142 | if (not find_rd) |
---|
143 | num_reg_rd_phy_old = RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rd_log]; |
---|
144 | if (not find_re) |
---|
145 | num_reg_re_phy_old = RAT_SPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_re_log]; |
---|
146 | |
---|
147 | // if rat_SPECULATIVE is valid, |
---|
148 | // then read rat_SPECULATIVE have the most valid alias register |
---|
149 | // else, they have an previous event, the rat_NOT_SPECULATIVE have the valid register |
---|
150 | |
---|
151 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_ra : %d -> %d",num_reg_ra_log,num_reg_ra_phy ); |
---|
152 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rb : %d -> %d",num_reg_rb_log,num_reg_rb_phy ); |
---|
153 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rc : %d -> %d",num_reg_rc_log,num_reg_rc_phy ); |
---|
154 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd : %d -> %d",num_reg_rd_log,num_reg_rd_phy_old); |
---|
155 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re : %d -> %d",num_reg_re_log,num_reg_re_phy_old); |
---|
156 | |
---|
157 | PORT_WRITE(out_RENAME_NUM_REG_RA_PHY [i], num_reg_ra_phy ); |
---|
158 | PORT_WRITE(out_RENAME_NUM_REG_RB_PHY [i], num_reg_rb_phy ); |
---|
159 | PORT_WRITE(out_RENAME_NUM_REG_RC_PHY [i], num_reg_rc_phy ); |
---|
160 | PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], num_reg_rd_phy_old); |
---|
161 | PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], num_reg_re_phy_old); |
---|
162 | } |
---|
163 | } |
---|
164 | } |
---|
165 | |
---|
166 | log_end(Register_Address_Translation_unit,FUNCTION); |
---|
167 | }; |
---|
168 | |
---|
169 | }; // end namespace register_address_translation_unit |
---|
170 | }; // end namespace register_translation_unit |
---|
171 | }; // end namespace rename_unit |
---|
172 | }; // end namespace ooo_engine |
---|
173 | }; // end namespace multi_ooo_engine |
---|
174 | }; // end namespace core |
---|
175 | |
---|
176 | }; // end namespace behavioural |
---|
177 | }; // end namespace morpheo |
---|
178 | #endif |
---|