[78] | 1 | #ifdef SYSTEMC |
---|
| 2 | /* |
---|
| 3 | * $Id: Register_Address_Translation_unit_transition.cpp 88 2008-12-10 18:31:39Z rosiere $ |
---|
| 4 | * |
---|
| 5 | * [ Description ] |
---|
| 6 | * |
---|
| 7 | */ |
---|
| 8 | |
---|
| 9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" |
---|
| 10 | |
---|
| 11 | namespace morpheo { |
---|
| 12 | namespace behavioural { |
---|
| 13 | namespace core { |
---|
| 14 | namespace multi_ooo_engine { |
---|
| 15 | namespace ooo_engine { |
---|
| 16 | namespace rename_unit { |
---|
| 17 | namespace register_translation_unit { |
---|
| 18 | namespace register_address_translation_unit { |
---|
| 19 | |
---|
| 20 | |
---|
| 21 | #undef FUNCTION |
---|
| 22 | #define FUNCTION "Register_Address_Translation_unit::transition" |
---|
| 23 | void Register_Address_Translation_unit::transition (void) |
---|
| 24 | { |
---|
[88] | 25 | log_begin(Register_Address_Translation_unit,FUNCTION); |
---|
| 26 | log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); |
---|
[78] | 27 | |
---|
| 28 | if (PORT_READ(in_NRESET) == 0) |
---|
| 29 | { |
---|
| 30 | uint32_t gpr = 1; |
---|
| 31 | uint32_t spr = 0; |
---|
| 32 | |
---|
| 33 | for (uint32_t i=0; i<_param->_nb_front_end; i++) |
---|
| 34 | for (uint32_t j=0; j<_param->_nb_context[i]; j++) |
---|
| 35 | { |
---|
| 36 | rat_gpr [i][j][0] = 0; |
---|
| 37 | |
---|
| 38 | for (uint32_t k=1; k<_param->_nb_general_register_logic; k++) |
---|
| 39 | rat_gpr [i][j][k] = gpr++; |
---|
| 40 | for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) |
---|
| 41 | rat_spr [i][j][k] = spr++; |
---|
| 42 | } |
---|
| 43 | } |
---|
| 44 | else |
---|
| 45 | { |
---|
| 46 | // Note : GPR[0] is never write (in decod's stage : write_rd = 0 when num_reg_rd_log == 0) |
---|
| 47 | |
---|
| 48 | // ===================================================== |
---|
| 49 | // ====[ INSERT ]======================================= |
---|
| 50 | // ===================================================== |
---|
| 51 | // First : interface insert |
---|
| 52 | for (uint32_t i=0; i<_param->_nb_inst_insert; i++) |
---|
| 53 | // Test transaction |
---|
| 54 | if (PORT_READ(in_INSERT_VAL [i]) and internal_INSERT_ACK [i]) |
---|
| 55 | { |
---|
| 56 | Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; |
---|
| 57 | Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; |
---|
| 58 | |
---|
| 59 | // Test if write |
---|
| 60 | if (PORT_READ(in_INSERT_WRITE_RD [i]) == 1) |
---|
| 61 | rat_gpr[front_end_id][context_id][PORT_READ(in_INSERT_NUM_REG_RD_LOG [i])] = PORT_READ(in_INSERT_NUM_REG_RD_PHY [i]); |
---|
| 62 | if (PORT_READ(in_INSERT_WRITE_RE [i]) == 1) |
---|
| 63 | rat_spr[front_end_id][context_id][PORT_READ(in_INSERT_NUM_REG_RE_LOG [i])] = PORT_READ(in_INSERT_NUM_REG_RE_PHY [i]); |
---|
| 64 | } |
---|
| 65 | |
---|
| 66 | // ===================================================== |
---|
| 67 | // ====[ RETIRE ]======================================= |
---|
| 68 | // ===================================================== |
---|
| 69 | // Second : interface retire |
---|
| 70 | // (because if an event on the same thread : the instruction is already renamed) |
---|
| 71 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
---|
| 72 | if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i]) |
---|
| 73 | { |
---|
| 74 | // if no event : no effect, because the RAT content the most recently register |
---|
| 75 | // but if they have a event (exception or miss speculation), the rat must restore the oldest value |
---|
| 76 | // To restore the oldest valid value, we use the rat_update_table. if the bit is unset, also they have none update on this register |
---|
| 77 | // the retire interface became of the Re Order Buffer, also is in program sequence ! |
---|
| 78 | if (PORT_READ(in_RETIRE_EVENT_STATE [i]) != EVENT_STATE_NO_EVENT) |
---|
| 79 | { |
---|
| 80 | Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0; |
---|
| 81 | Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RETIRE_CONTEXT_ID [i]):0; |
---|
| 82 | |
---|
| 83 | // Test if event have just occure |
---|
| 84 | if (PORT_READ(in_RETIRE_EVENT_STATE [i]) == EVENT_STATE_EVENT) |
---|
| 85 | { |
---|
| 86 | // Reset update_table |
---|
| 87 | for (uint32_t j=0; j<_param->_nb_general_register_logic; j++) |
---|
| 88 | rat_gpr_update_table[front_end_id][context_id][j] = 0; |
---|
| 89 | for (uint32_t j=0; j<_param->_nb_special_register_logic; j++) |
---|
| 90 | rat_spr_update_table[front_end_id][context_id][j] = 0; |
---|
| 91 | } |
---|
| 92 | |
---|
[88] | 93 | // Test if write and have not a previous update |
---|
[78] | 94 | if (PORT_READ(in_RETIRE_WRITE_RD [i]) == 1) |
---|
| 95 | { |
---|
| 96 | Tgeneral_address_t rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]); |
---|
| 97 | |
---|
[88] | 98 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * retire[%d]",i); |
---|
| 99 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); |
---|
| 100 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id ); |
---|
| 101 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * rd_log : %d",rd_log ); |
---|
[78] | 102 | |
---|
[88] | 103 | // if (RETIRE_RESTORE_RD_PHY_OLD [i]) |
---|
[78] | 104 | if (rat_gpr_update_table[front_end_id][context_id][rd_log] == 0) |
---|
| 105 | { |
---|
| 106 | rat_gpr [front_end_id][context_id][rd_log] = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_OLD [i]); |
---|
| 107 | rat_gpr_update_table[front_end_id][context_id][rd_log] = 1; |
---|
| 108 | } |
---|
| 109 | } |
---|
| 110 | |
---|
| 111 | if (PORT_READ(in_RETIRE_WRITE_RE [i]) == 1) |
---|
| 112 | { |
---|
| 113 | Tspecial_address_t re_log = PORT_READ(in_RETIRE_NUM_REG_RE_LOG [i]); |
---|
| 114 | |
---|
[88] | 115 | // if (RETIRE_RESTORE_RE_PHY_OLD [i]) |
---|
[78] | 116 | if (rat_spr_update_table[front_end_id][context_id][re_log] == 0) |
---|
| 117 | { |
---|
| 118 | rat_spr [front_end_id][context_id][re_log] = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_OLD [i]); |
---|
| 119 | rat_spr_update_table[front_end_id][context_id][re_log] = 1; |
---|
| 120 | } |
---|
| 121 | } |
---|
| 122 | } |
---|
| 123 | } |
---|
| 124 | } |
---|
| 125 | |
---|
[88] | 126 | #if (DEBUG >= DEBUG_TRACE) and (DEBUG_Register_Address_Translation_unit == true) |
---|
| 127 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * Dump RAT (Register_Address_Translation_unit)"); |
---|
| 128 | for (uint32_t i=0; i<_param->_nb_front_end; ++i) |
---|
| 129 | for (uint32_t j=0; j<_param->_nb_context[i]; ++j) |
---|
| 130 | { |
---|
| 131 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end[%d].context[%d]",i,j); |
---|
| 132 | |
---|
| 133 | for (uint32_t k=0; k<_param->_nb_general_register_logic; ++k) |
---|
| 134 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * GPR[%.2d] - %.5d %.1d",k,rat_gpr[i][j][k],rat_gpr_update_table[i][j][k]); |
---|
| 135 | |
---|
| 136 | for (uint32_t k=0; k<_param->_nb_special_register_logic; ++k) |
---|
| 137 | log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * SPR[%.2d] - %.5d %.1d",k,rat_spr[i][j][k],rat_spr_update_table[i][j][k]); |
---|
| 138 | } |
---|
| 139 | #endif |
---|
| 140 | |
---|
[78] | 141 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
---|
| 142 | end_cycle (); |
---|
| 143 | #endif |
---|
| 144 | |
---|
[88] | 145 | log_end(Register_Address_Translation_unit,FUNCTION); |
---|
[78] | 146 | }; |
---|
| 147 | |
---|
| 148 | }; // end namespace register_address_translation_unit |
---|
| 149 | }; // end namespace register_translation_unit |
---|
| 150 | }; // end namespace rename_unit |
---|
| 151 | }; // end namespace ooo_engine |
---|
| 152 | }; // end namespace multi_ooo_engine |
---|
| 153 | }; // end namespace core |
---|
| 154 | |
---|
| 155 | }; // end namespace behavioural |
---|
| 156 | }; // end namespace morpheo |
---|
| 157 | #endif |
---|