| 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Register_translation_unit_Glue_genMealy_insert.cpp 88 2008-12-10 18:31:39Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_ooo_engine { |
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| 15 | namespace ooo_engine { |
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| 16 | namespace rename_unit { |
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| 17 | namespace register_translation_unit { |
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| 18 | namespace register_translation_unit_glue { |
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| 19 | |
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| 20 | |
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| 21 | #undef FUNCTION |
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| 22 | #define FUNCTION "Register_translation_unit_Glue::genMealy_insert" |
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| 23 | void Register_translation_unit_Glue::genMealy_insert (void) |
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| 24 | { |
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| 25 | log_begin(Register_translation_unit_Glue,FUNCTION); |
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| 26 | log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str()); |
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| 27 | |
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| 28 | for (uint32_t i=0; i<_param->_nb_inst_insert; i++) |
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| 29 | { |
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| 30 | Tcontrol_t READ_RA = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RA [i]); |
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| 31 | Tgeneral_address_t NUM_REG_RA_PHY = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY [i]); |
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| 32 | Tcontrol_t READ_RB = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RB [i]); |
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| 33 | Tgeneral_address_t NUM_REG_RB_PHY = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY [i]); |
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| 34 | Tcontrol_t READ_RC = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RC [i]); |
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| 35 | Tspecial_address_t NUM_REG_RC_PHY = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY [i]); |
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| 36 | Tcontrol_t WRITE_RD = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_WRITE_RD [i]); |
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| 37 | Tgeneral_address_t NUM_REG_RD_LOG = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG [i]); |
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| 38 | Tgeneral_address_t NUM_REG_RD_PHY_OLD = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD [i]); |
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| 39 | Tgeneral_address_t NUM_REG_RD_PHY_NEW = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW [i]); |
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| 40 | Tcontrol_t WRITE_RE = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_WRITE_RE [i]); |
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| 41 | Tspecial_address_t NUM_REG_RE_LOG = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG [i]); |
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| 42 | Tspecial_address_t NUM_REG_RE_PHY_OLD = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD [i]); |
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| 43 | Tspecial_address_t NUM_REG_RE_PHY_NEW = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW [i]); |
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| 44 | |
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| 45 | PORT_WRITE(out_INSERT_STAT_LIST_READ_RA [i], READ_RA ); |
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| 46 | PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY [i], NUM_REG_RA_PHY ); |
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| 47 | PORT_WRITE(out_INSERT_STAT_LIST_READ_RB [i], READ_RB ); |
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| 48 | PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY [i], NUM_REG_RB_PHY ); |
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| 49 | PORT_WRITE(out_INSERT_STAT_LIST_READ_RC [i], READ_RC ); |
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| 50 | PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY [i], NUM_REG_RC_PHY ); |
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| 51 | PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RD [i], WRITE_RD ); |
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| 52 | PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW); |
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| 53 | PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RE [i], WRITE_RE ); |
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| 54 | PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW); |
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| 55 | |
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| 56 | PORT_WRITE(out_INSERT_RAT_WRITE_RD [i], WRITE_RD ); |
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| 57 | PORT_WRITE(out_INSERT_RAT_NUM_REG_RD_LOG [i], NUM_REG_RD_LOG ); |
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| 58 | PORT_WRITE(out_INSERT_RAT_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW); |
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| 59 | PORT_WRITE(out_INSERT_RAT_WRITE_RE [i], WRITE_RE ); |
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| 60 | PORT_WRITE(out_INSERT_RAT_NUM_REG_RE_LOG [i], NUM_REG_RE_LOG ); |
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| 61 | PORT_WRITE(out_INSERT_RAT_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW); |
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| 62 | |
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| 63 | PORT_WRITE(out_INSERT_READ_RA [i], READ_RA ); |
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| 64 | PORT_WRITE(out_INSERT_NUM_REG_RA_PHY [i], NUM_REG_RA_PHY ); |
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| 65 | PORT_WRITE(out_INSERT_READ_RB [i], READ_RB ); |
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| 66 | PORT_WRITE(out_INSERT_NUM_REG_RB_PHY [i], NUM_REG_RB_PHY ); |
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| 67 | PORT_WRITE(out_INSERT_READ_RC [i], READ_RC ); |
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| 68 | PORT_WRITE(out_INSERT_NUM_REG_RC_PHY [i], NUM_REG_RC_PHY ); |
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| 69 | PORT_WRITE(out_INSERT_WRITE_RD [i], WRITE_RD ); |
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| 70 | PORT_WRITE(out_INSERT_NUM_REG_RD_LOG [i], NUM_REG_RD_LOG ); |
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| 71 | PORT_WRITE(out_INSERT_NUM_REG_RD_PHY_OLD [i], NUM_REG_RD_PHY_OLD); |
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| 72 | PORT_WRITE(out_INSERT_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW); |
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| 73 | PORT_WRITE(out_INSERT_WRITE_RE [i], WRITE_RE ); |
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| 74 | PORT_WRITE(out_INSERT_NUM_REG_RE_LOG [i], NUM_REG_RE_LOG ); |
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| 75 | PORT_WRITE(out_INSERT_NUM_REG_RE_PHY_OLD [i], NUM_REG_RE_PHY_OLD); |
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| 76 | PORT_WRITE(out_INSERT_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW); |
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| 77 | } |
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| 78 | |
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| 79 | log_end(Register_translation_unit_Glue,FUNCTION); |
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| 80 | }; |
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| 81 | |
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| 82 | }; // end namespace register_translation_unit_glue |
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| 83 | }; // end namespace register_translation_unit |
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| 84 | }; // end namespace rename_unit |
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| 85 | }; // end namespace ooo_engine |
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| 86 | }; // end namespace multi_ooo_engine |
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| 87 | }; // end namespace core |
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| 88 | |
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| 89 | }; // end namespace behavioural |
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| 90 | }; // end namespace morpheo |
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| 91 | #endif |
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