[78] | 1 | #ifdef SYSTEMC |
---|
| 2 | /* |
---|
| 3 | * $Id: Stat_List_unit_transition.cpp 112 2009-03-18 22:36:26Z rosiere $ |
---|
| 4 | * |
---|
| 5 | * [ Description ] |
---|
| 6 | * |
---|
| 7 | */ |
---|
| 8 | |
---|
| 9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" |
---|
| 10 | |
---|
| 11 | namespace morpheo { |
---|
| 12 | namespace behavioural { |
---|
| 13 | namespace core { |
---|
| 14 | namespace multi_ooo_engine { |
---|
| 15 | namespace ooo_engine { |
---|
| 16 | namespace rename_unit { |
---|
| 17 | namespace register_translation_unit { |
---|
| 18 | namespace stat_list_unit { |
---|
| 19 | |
---|
| 20 | |
---|
| 21 | #undef FUNCTION |
---|
| 22 | #define FUNCTION "Stat_List_unit::transition" |
---|
| 23 | void Stat_List_unit::transition (void) |
---|
| 24 | { |
---|
[88] | 25 | log_begin(Stat_List_unit,FUNCTION); |
---|
| 26 | log_function(Stat_List_unit,FUNCTION,_name.c_str()); |
---|
[78] | 27 | |
---|
| 28 | if (PORT_READ(in_NRESET) == 0) |
---|
| 29 | { |
---|
| 30 | uint32_t gpr = 0; |
---|
| 31 | uint32_t spr = 0; |
---|
| 32 | |
---|
| 33 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
| 34 | { |
---|
| 35 | for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) |
---|
| 36 | gpr_stat_list [i][j].reset((gpr++)<_param->_nb_gpr_use_init); |
---|
| 37 | for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) |
---|
| 38 | spr_stat_list [i][j].reset((spr++)<_param->_nb_spr_use_init); |
---|
| 39 | } |
---|
[112] | 40 | reg_GPR_PTR_FREE = 0; |
---|
| 41 | reg_SPR_PTR_FREE = 0; |
---|
[78] | 42 | } |
---|
| 43 | else |
---|
| 44 | { |
---|
| 45 | // ===================================================== |
---|
| 46 | // =====[ INSERT ]====================================== |
---|
| 47 | // ===================================================== |
---|
| 48 | for (uint32_t i=0; i<_param->_nb_inst_insert; i++) |
---|
| 49 | if (PORT_READ(in_INSERT_VAL[i]) and internal_INSERT_ACK[i]) |
---|
| 50 | { |
---|
[106] | 51 | log_printf(TRACE,Stat_List_unit,FUNCTION," * INSERT [%d]",i); |
---|
| 52 | |
---|
[112] | 53 | // if (PORT_READ(in_INSERT_READ_RA [i])) |
---|
| 54 | // { |
---|
| 55 | // Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RA_PHY [i]); |
---|
[106] | 56 | |
---|
[112] | 57 | // log_printf(TRACE,Stat_List_unit,FUNCTION," * READ_RA - num_reg : %d",num_reg); |
---|
[106] | 58 | |
---|
[112] | 59 | // uint32_t bank = num_reg >> _param->_shift_gpr; |
---|
| 60 | // uint32_t reg = num_reg & _param->_mask_gpr ; |
---|
| 61 | // gpr_stat_list [bank][reg].insert_read(); |
---|
| 62 | // } |
---|
[78] | 63 | |
---|
[112] | 64 | // if (PORT_READ(in_INSERT_READ_RB [i])) |
---|
| 65 | // { |
---|
| 66 | // Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RB_PHY [i]); |
---|
[106] | 67 | |
---|
[112] | 68 | // log_printf(TRACE,Stat_List_unit,FUNCTION," * READ_RB - num_reg : %d",num_reg); |
---|
[106] | 69 | |
---|
[112] | 70 | // uint32_t bank = num_reg >> _param->_shift_gpr; |
---|
| 71 | // uint32_t reg = num_reg & _param->_mask_gpr ; |
---|
| 72 | // gpr_stat_list [bank][reg].insert_read(); |
---|
| 73 | // } |
---|
[78] | 74 | |
---|
[112] | 75 | // if (PORT_READ(in_INSERT_READ_RC [i])) |
---|
| 76 | // { |
---|
| 77 | // Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RC_PHY [i]); |
---|
[106] | 78 | |
---|
[112] | 79 | // log_printf(TRACE,Stat_List_unit,FUNCTION," * READ_RC - num_reg : %d",num_reg); |
---|
[106] | 80 | |
---|
[112] | 81 | // uint32_t bank = num_reg >> _param->_shift_spr; |
---|
| 82 | // uint32_t reg = num_reg & _param->_mask_spr ; |
---|
| 83 | // spr_stat_list [bank][reg].insert_read(); |
---|
| 84 | // } |
---|
[78] | 85 | |
---|
| 86 | if (PORT_READ(in_INSERT_WRITE_RD [i])) |
---|
| 87 | { |
---|
| 88 | Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]); |
---|
[106] | 89 | |
---|
[112] | 90 | log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RD - num_reg new : %d",num_reg); |
---|
[106] | 91 | |
---|
[78] | 92 | uint32_t bank = num_reg >> _param->_shift_gpr; |
---|
| 93 | uint32_t reg = num_reg & _param->_mask_gpr ; |
---|
| 94 | gpr_stat_list [bank][reg].insert_write(); |
---|
| 95 | } |
---|
| 96 | |
---|
| 97 | if (PORT_READ(in_INSERT_WRITE_RE [i])) |
---|
| 98 | { |
---|
[112] | 99 | Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]); |
---|
[106] | 100 | |
---|
[112] | 101 | log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RE - num_reg new : %d",num_reg); |
---|
[106] | 102 | |
---|
[78] | 103 | uint32_t bank = num_reg >> _param->_shift_spr; |
---|
| 104 | uint32_t reg = num_reg & _param->_mask_spr ; |
---|
| 105 | spr_stat_list [bank][reg].insert_write(); |
---|
| 106 | } |
---|
| 107 | } |
---|
| 108 | |
---|
| 109 | // ===================================================== |
---|
| 110 | // =====[ RETIRE ]====================================== |
---|
| 111 | // ===================================================== |
---|
| 112 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
---|
| 113 | if (PORT_READ(in_RETIRE_VAL[i]) and internal_RETIRE_ACK[i]) |
---|
| 114 | { |
---|
[106] | 115 | log_printf(TRACE,Stat_List_unit,FUNCTION," * RETIRE [%d]",i); |
---|
| 116 | |
---|
[112] | 117 | Tcontrol_t restore = PORT_READ(in_RETIRE_RESTORE [i]); |
---|
[106] | 118 | |
---|
[112] | 119 | log_printf(TRACE,Stat_List_unit,FUNCTION," * restore : %d",restore); |
---|
[106] | 120 | |
---|
[112] | 121 | // if (PORT_READ(in_RETIRE_READ_RA [i])) |
---|
| 122 | // { |
---|
| 123 | // Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RA_PHY [i]); |
---|
[78] | 124 | |
---|
[112] | 125 | // log_printf(TRACE,Stat_List_unit,FUNCTION," * READ_RA - num_reg : %d",num_reg); |
---|
[106] | 126 | |
---|
[112] | 127 | // uint32_t bank = num_reg >> _param->_shift_gpr; |
---|
| 128 | // uint32_t reg = num_reg & _param->_mask_gpr ; |
---|
| 129 | // gpr_stat_list [bank][reg].retire_read(); |
---|
| 130 | // } |
---|
[106] | 131 | |
---|
[112] | 132 | // if (PORT_READ(in_RETIRE_READ_RB [i])) |
---|
| 133 | // { |
---|
| 134 | // Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RB_PHY [i]); |
---|
[78] | 135 | |
---|
[112] | 136 | // log_printf(TRACE,Stat_List_unit,FUNCTION," * READ_RB - num_reg : %d",num_reg); |
---|
[106] | 137 | |
---|
[112] | 138 | // uint32_t bank = num_reg >> _param->_shift_gpr; |
---|
| 139 | // uint32_t reg = num_reg & _param->_mask_gpr ; |
---|
| 140 | // gpr_stat_list [bank][reg].retire_read(); |
---|
| 141 | // } |
---|
[106] | 142 | |
---|
[112] | 143 | // if (PORT_READ(in_RETIRE_READ_RC [i])) |
---|
| 144 | // { |
---|
| 145 | // Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RC_PHY [i]); |
---|
[78] | 146 | |
---|
[112] | 147 | // log_printf(TRACE,Stat_List_unit,FUNCTION," * READ_RC - num_reg : %d",num_reg); |
---|
| 148 | |
---|
| 149 | // uint32_t bank = num_reg >> _param->_shift_spr; |
---|
| 150 | // uint32_t reg = num_reg & _param->_mask_spr ; |
---|
| 151 | // spr_stat_list [bank][reg].retire_read(); |
---|
| 152 | // } |
---|
| 153 | |
---|
[78] | 154 | if (PORT_READ(in_RETIRE_WRITE_RD [i])) |
---|
| 155 | { |
---|
[88] | 156 | Tcontrol_t restore_old = PORT_READ(in_RETIRE_RESTORE_RD_PHY_OLD [i]); |
---|
[106] | 157 | |
---|
| 158 | log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RD - restore_old : %d",restore_old); |
---|
| 159 | |
---|
[78] | 160 | { |
---|
| 161 | Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_OLD [i]); |
---|
[106] | 162 | |
---|
[112] | 163 | log_printf(TRACE,Stat_List_unit,FUNCTION," num_reg_old : %d",num_reg); |
---|
[106] | 164 | |
---|
[78] | 165 | uint32_t bank = num_reg >> _param->_shift_gpr; |
---|
| 166 | uint32_t reg = num_reg & _param->_mask_gpr ; |
---|
[112] | 167 | gpr_stat_list [bank][reg].retire_write_old(restore, restore_old); |
---|
[78] | 168 | } |
---|
| 169 | { |
---|
| 170 | Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_NEW [i]); |
---|
[106] | 171 | |
---|
[112] | 172 | log_printf(TRACE,Stat_List_unit,FUNCTION," num_reg_new : %d",num_reg); |
---|
[106] | 173 | |
---|
[78] | 174 | uint32_t bank = num_reg >> _param->_shift_gpr; |
---|
| 175 | uint32_t reg = num_reg & _param->_mask_gpr ; |
---|
[112] | 176 | gpr_stat_list [bank][reg].retire_write_new(restore, restore_old); |
---|
[78] | 177 | } |
---|
| 178 | } |
---|
| 179 | |
---|
| 180 | if (PORT_READ(in_RETIRE_WRITE_RE [i])) |
---|
| 181 | { |
---|
[88] | 182 | Tcontrol_t restore_old = PORT_READ(in_RETIRE_RESTORE_RE_PHY_OLD [i]); |
---|
[106] | 183 | |
---|
| 184 | log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RE - restore_old : %d",restore_old); |
---|
| 185 | |
---|
[78] | 186 | { |
---|
[112] | 187 | Tspecial_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_OLD [i]); |
---|
[106] | 188 | |
---|
[112] | 189 | log_printf(TRACE,Stat_List_unit,FUNCTION," num_reg_old : %d",num_reg); |
---|
[106] | 190 | |
---|
[78] | 191 | uint32_t bank = num_reg >> _param->_shift_spr; |
---|
| 192 | uint32_t reg = num_reg & _param->_mask_spr ; |
---|
[112] | 193 | spr_stat_list [bank][reg].retire_write_old(restore, restore_old); |
---|
[78] | 194 | } |
---|
| 195 | { |
---|
[112] | 196 | Tspecial_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]); |
---|
[106] | 197 | |
---|
[112] | 198 | log_printf(TRACE,Stat_List_unit,FUNCTION," num_reg_new : %d",num_reg); |
---|
[106] | 199 | |
---|
[78] | 200 | uint32_t bank = num_reg >> _param->_shift_spr; |
---|
| 201 | uint32_t reg = num_reg & _param->_mask_spr ; |
---|
[112] | 202 | spr_stat_list [bank][reg].retire_write_new(restore, restore_old); |
---|
[78] | 203 | } |
---|
| 204 | } |
---|
| 205 | } |
---|
| 206 | |
---|
| 207 | for (uint32_t i=0; i<_param->_nb_reg_free; i++) |
---|
| 208 | { |
---|
| 209 | // ===================================================== |
---|
| 210 | // =====[ PUSH_GPR ]==================================== |
---|
| 211 | // ===================================================== |
---|
| 212 | if (internal_PUSH_GPR_VAL [i] and PORT_READ(in_PUSH_GPR_ACK [i])) |
---|
[112] | 213 | gpr_stat_list[internal_PUSH_GPR_NUM_BANK [i]][reg_GPR_PTR_FREE].free(); |
---|
[78] | 214 | |
---|
| 215 | // ===================================================== |
---|
| 216 | // =====[ PUSH_SPR ]==================================== |
---|
| 217 | // ===================================================== |
---|
| 218 | if (internal_PUSH_SPR_VAL [i] and PORT_READ(in_PUSH_SPR_ACK [i])) |
---|
[112] | 219 | spr_stat_list[internal_PUSH_SPR_NUM_BANK [i]][reg_SPR_PTR_FREE].free(); |
---|
[78] | 220 | } |
---|
| 221 | |
---|
| 222 | // Update pointer |
---|
[112] | 223 | reg_GPR_PTR_FREE = ((reg_GPR_PTR_FREE==0)?_param->_nb_general_register_by_bank:reg_GPR_PTR_FREE)-1; |
---|
| 224 | reg_SPR_PTR_FREE = ((reg_SPR_PTR_FREE==0)?_param->_nb_special_register_by_bank:reg_SPR_PTR_FREE)-1; |
---|
[78] | 225 | } |
---|
| 226 | |
---|
| 227 | |
---|
[88] | 228 | #if (DEBUG >= DEBUG_TRACE) |
---|
[112] | 229 | { |
---|
| 230 | log_printf(TRACE,Stat_List_unit,FUNCTION," * Dump Stat List"); |
---|
| 231 | log_printf(TRACE,Stat_List_unit,FUNCTION," * reg_GPR_PTR_FREE : %d",reg_GPR_PTR_FREE); |
---|
| 232 | log_printf(TRACE,Stat_List_unit,FUNCTION," * reg_SPR_PTR_FREE : %d",reg_SPR_PTR_FREE); |
---|
| 233 | |
---|
| 234 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
| 235 | for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) |
---|
| 236 | log_printf(TRACE,Stat_List_unit,FUNCTION," * GPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d", |
---|
| 237 | i, |
---|
| 238 | j, |
---|
| 239 | (i<<_param->_shift_gpr)|j, |
---|
| 240 | gpr_stat_list[i][j]._is_free, |
---|
| 241 | gpr_stat_list[i][j]._is_link// , |
---|
| 242 | // gpr_stat_list[i][j]._is_valid, |
---|
| 243 | // gpr_stat_list[i][j]._counter |
---|
| 244 | ); |
---|
| 245 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
| 246 | for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) |
---|
| 247 | log_printf(TRACE,Stat_List_unit,FUNCTION," * SPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d", |
---|
| 248 | i, |
---|
| 249 | j, |
---|
| 250 | (i<<_param->_shift_spr)|j, |
---|
| 251 | spr_stat_list[i][j]._is_free, |
---|
| 252 | spr_stat_list[i][j]._is_link// , |
---|
| 253 | // spr_stat_list[i][j]._is_valid, |
---|
| 254 | // spr_stat_list[i][j]._counter |
---|
| 255 | ); |
---|
| 256 | } |
---|
[88] | 257 | #endif |
---|
| 258 | |
---|
[112] | 259 | #ifdef DEBUG_TEST |
---|
| 260 | # if 0 |
---|
| 261 | { |
---|
| 262 | uint32_t size_rob = 64; |
---|
| 263 | uint32_t nb_context = 1; |
---|
| 264 | |
---|
| 265 | { |
---|
| 266 | uint32_t nb_is_link = 0; |
---|
| 267 | uint32_t nb_reg = 32; |
---|
| 268 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
| 269 | for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) |
---|
| 270 | if (gpr_stat_list[i][j]._is_link) |
---|
| 271 | nb_is_link ++; |
---|
| 272 | |
---|
| 273 | log_printf(TRACE,Stat_List_unit,FUNCTION," * nb_GPR_IS_LINK : %d",nb_is_link); |
---|
| 274 | |
---|
| 275 | if (nb_is_link > size_rob+nb_context*nb_reg) |
---|
| 276 | throw ERRORMORPHEO(FUNCTION,toString(_("They are %d linked gpr register, but max is size_rob+nb_context*%d = %d+%d*%d = %d"),nb_is_link,nb_reg,size_rob,nb_context,nb_reg,size_rob+nb_context*nb_reg)); |
---|
| 277 | } |
---|
| 278 | |
---|
| 279 | { |
---|
| 280 | uint32_t nb_is_link = 0; |
---|
| 281 | uint32_t nb_reg = 2; |
---|
| 282 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
---|
| 283 | for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) |
---|
| 284 | if (spr_stat_list[i][j]._is_link) |
---|
| 285 | nb_is_link ++; |
---|
| 286 | |
---|
| 287 | log_printf(TRACE,Stat_List_unit,FUNCTION," * nb_SPR_IS_LINK : %d",nb_is_link); |
---|
| 288 | |
---|
| 289 | if (nb_is_link > size_rob+nb_context*nb_reg) |
---|
| 290 | throw ERRORMORPHEO(FUNCTION,toString(_("They are %d linked spr register, but max is size_rob+nb_context*%d = %d+%d*%d = %d"),nb_is_link,nb_reg,size_rob,nb_context,nb_reg,size_rob+nb_context*nb_reg)); |
---|
| 291 | } |
---|
| 292 | } |
---|
| 293 | # endif |
---|
| 294 | #endif |
---|
| 295 | |
---|
| 296 | |
---|
[78] | 297 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
---|
| 298 | end_cycle (); |
---|
| 299 | #endif |
---|
| 300 | |
---|
[88] | 301 | log_end(Stat_List_unit,FUNCTION); |
---|
[78] | 302 | }; |
---|
| 303 | |
---|
| 304 | }; // end namespace stat_list_unit |
---|
| 305 | }; // end namespace register_translation_unit |
---|
| 306 | }; // end namespace rename_unit |
---|
| 307 | }; // end namespace ooo_engine |
---|
| 308 | }; // end namespace multi_ooo_engine |
---|
| 309 | }; // end namespace core |
---|
| 310 | |
---|
| 311 | }; // end namespace behavioural |
---|
| 312 | }; // end namespace morpheo |
---|
| 313 | #endif |
---|