[78] | 1 | #ifdef VHDL |
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| 2 | /* |
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| 3 | * $Id: Stat_List_unit_vhdl_body.cpp 135 2009-07-17 08:59:05Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_ooo_engine { |
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| 15 | namespace ooo_engine { |
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| 16 | namespace rename_unit { |
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| 17 | namespace register_translation_unit { |
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| 18 | namespace stat_list_unit { |
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| 19 | |
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| 20 | |
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| 21 | #undef FUNCTION |
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| 22 | #define FUNCTION "Stat_List_unit::vhdl_body" |
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| 23 | void Stat_List_unit::vhdl_body (Vhdl * & vhdl) |
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| 24 | { |
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| 25 | log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); |
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[135] | 26 | |
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| 27 | uint32_t size_bank = log2(_param->_nb_bank); |
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| 28 | uint32_t size_gpr_ptr = log2(_param->_nb_general_register_by_bank); |
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| 29 | uint32_t size_spr_ptr = log2(_param->_nb_special_register_by_bank); |
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| 30 | |
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| 31 | uint32_t LSB_gpr_num_reg = 0; |
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| 32 | uint32_t MSB_gpr_num_reg = log2(_param->_nb_general_register_by_bank) - 1; |
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| 33 | uint32_t LSB_gpr_num_bank = MSB_gpr_num_reg+1; |
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| 34 | uint32_t MSB_gpr_num_bank = _param->_size_general_register -1 ; |
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| 35 | |
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| 36 | uint32_t LSB_spr_num_reg = 0; |
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| 37 | uint32_t MSB_spr_num_reg = log2(_param->_nb_special_register_by_bank) - 1; |
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| 38 | uint32_t LSB_spr_num_bank = MSB_spr_num_reg+1; |
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| 39 | uint32_t MSB_spr_num_bank = _param->_size_special_register -1; |
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| 40 | |
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| 41 | |
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| 42 | vhdl->set_comment(0,"====================================================="); |
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| 43 | vhdl->set_comment(0,"=====[ CONSTANT ]===================================="); |
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| 44 | vhdl->set_comment(0,"====================================================="); |
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| 45 | |
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| 46 | for (uint32_t j=0; j<_param->_nb_inst_insert; j++) |
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| 47 | vhdl->set_body (0,"internal_INSERT_"+toString(j)+"_ACK <= '1';"); |
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| 48 | |
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| 49 | for (uint32_t j=0; j<_param->_nb_inst_insert; j++) |
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| 50 | vhdl->set_body (0," out_INSERT_"+toString(j)+"_ACK <= internal_INSERT_"+toString(j)+"_ACK;"); |
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| 51 | |
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| 52 | for (uint32_t j=0; j<_param->_nb_inst_retire; j++) |
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| 53 | vhdl->set_body (0,"internal_RETIRE_"+toString(j)+"_ACK <= '1';"); |
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| 54 | |
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| 55 | for (uint32_t j=0; j<_param->_nb_inst_retire; j++) |
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| 56 | vhdl->set_body (0," out_RETIRE_"+toString(j)+"_ACK <= internal_RETIRE_"+toString(j)+"_ACK;"); |
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| 57 | |
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| 58 | |
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| 59 | vhdl->set_body (0,""); |
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| 60 | vhdl->set_body (0,"transition: process (in_CLOCK)"); |
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| 61 | |
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| 62 | // vhdl->set_body (0,"variable gpr_stat_list_next : Tstat_list_gpr;"); |
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| 63 | // vhdl->set_body (0,"variable spr_stat_list_next : Tstat_list_spr;"); |
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| 64 | |
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| 65 | vhdl->set_body (0,"begin -- process transition"); |
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| 66 | vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then"); |
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| 67 | vhdl->set_body (2,"if in_NRESET = '0' then"); |
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| 68 | |
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| 69 | uint32_t gpr = 0; |
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| 70 | uint32_t spr = 0; |
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| 71 | |
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| 72 | vhdl->set_comment(3,"Init Stat List"); |
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| 73 | vhdl->set_comment(3,"xxx_stat_list : "); |
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| 74 | |
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| 75 | vhdl->set_comment(3," [0] is_free"); |
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| 76 | vhdl->set_comment(3," [1] is_link"); |
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| 77 | |
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| 78 | vhdl->set_body (3,""); |
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| 79 | vhdl->set_comment(3,"gpr_stat_list"); |
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| 80 | vhdl->set_body (3,""); |
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| 81 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
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| 82 | for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) |
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| 83 | if ((gpr++)<_param->_nb_gpr_use_init) |
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| 84 | { |
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| 85 | vhdl->set_body (3,"gpr_stat_list("+toString(i)+")("+toString(j)+")<=\"10\";"); |
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| 86 | } |
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| 87 | else |
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| 88 | { |
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| 89 | vhdl->set_body (3,"gpr_stat_list("+toString(i)+")("+toString(j)+")<=\"00\";"); |
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| 90 | } |
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| 91 | |
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| 92 | vhdl->set_body (3,""); |
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| 93 | vhdl->set_comment(3,"spr_stat_list"); |
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| 94 | vhdl->set_body (3,""); |
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| 95 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
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| 96 | for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) |
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| 97 | if ((spr++)<_param->_nb_spr_use_init) |
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| 98 | { |
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| 99 | vhdl->set_body (3,"spr_stat_list("+toString(i)+")("+toString(j)+")<=\"10\";"); |
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| 100 | } |
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| 101 | else |
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| 102 | { |
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| 103 | vhdl->set_body (3,"spr_stat_list("+toString(i)+")("+toString(j)+")<=\"00\";"); |
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| 104 | } |
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| 105 | |
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| 106 | vhdl->set_body (3,""); |
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| 107 | vhdl->set_comment(3,"Init Pointer"); |
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| 108 | |
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| 109 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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| 110 | if (size_gpr_ptr>0) |
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| 111 | vhdl->set_body (3,"reg_GPR_PTR_FREE <= "+std_logic_cst(size_gpr_ptr,1)+";"); |
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| 112 | if (size_spr_ptr>0) |
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| 113 | vhdl->set_body (3,"reg_SPR_PTR_FREE <= "+std_logic_cst(size_spr_ptr,1)+";"); |
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| 114 | #else |
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| 115 | if (size_gpr_ptr>0) |
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| 116 | vhdl->set_body (3,"reg_GPR_PTR_FREE <= "+std_logic_cst(size_gpr_ptr,0)+";"); |
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| 117 | if (size_spr_ptr>0) |
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| 118 | vhdl->set_body (3,"reg_SPR_PTR_FREE <= "+std_logic_cst(size_spr_ptr,0)+";"); |
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| 119 | #endif |
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| 120 | |
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| 121 | vhdl->set_body (2,"else"); // in_CLOCK'event and in_CLOCK = '1' |
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| 122 | |
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| 123 | // vhdl->set_body (2,"gpr_stat_list_next := gpr_stat_list;"); |
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| 124 | // vhdl->set_body (2,"spr_stat_list_next := spr_stat_list;"); |
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| 125 | |
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| 126 | vhdl->set_comment(3,"====================================================="); |
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| 127 | vhdl->set_comment(3,"=====[ INSERT ]======================================"); |
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| 128 | vhdl->set_comment(3,"====================================================="); |
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| 129 | |
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| 130 | for (uint32_t i=0; i<_param->_nb_inst_insert; i++) |
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| 131 | { |
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| 132 | vhdl->set_body (3,"if ((in_INSERT_"+toString(i)+"_VAL and internal_INSERT_"+toString(i)+"_ACK) = '1') then"); |
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| 133 | |
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| 134 | { |
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| 135 | vhdl->set_body (4,"if (in_INSERT_"+toString(i)+"_WRITE_RD = '1') then"); |
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| 136 | std::string port = "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW"; |
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| 137 | std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0"; |
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| 138 | std::string num_reg = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0"; |
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| 139 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 140 | |
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| 141 | vhdl->set_body (5,"gpr_stat_list"+addr+" <= \"10\";"); |
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| 142 | vhdl->set_body (4,"end if;"); // write_rd |
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| 143 | } |
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| 144 | |
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| 145 | { |
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| 146 | vhdl->set_body (4,"if (in_INSERT_"+toString(i)+"_WRITE_RE = '1') then"); |
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| 147 | std::string port = "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW"; |
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| 148 | std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0"; |
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| 149 | std::string num_reg = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0"; |
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| 150 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 151 | vhdl->set_body (5,"spr_stat_list"+addr+" <= \"10\";"); |
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| 152 | vhdl->set_body (4,"end if;"); // write_re |
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| 153 | } |
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| 154 | |
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| 155 | vhdl->set_body (3,"end if;"); // transaction insert |
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| 156 | } |
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| 157 | |
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| 158 | vhdl->set_comment(3,"====================================================="); |
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| 159 | vhdl->set_comment(3,"=====[ RETIRE ]======================================"); |
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| 160 | vhdl->set_comment(3,"====================================================="); |
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| 161 | |
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| 162 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
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| 163 | { |
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| 164 | vhdl->set_body (3,"if ((in_RETIRE_"+toString(i)+"_VAL and internal_RETIRE_"+toString(i)+"_ACK) = '1') then"); |
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| 165 | |
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| 166 | std::string restore = "in_RETIRE_"+toString(i)+"_RESTORE"; |
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| 167 | |
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| 168 | // write rd |
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| 169 | vhdl->set_body (4,"if (in_RETIRE_"+toString(i)+"_WRITE_RD = '1') then"); |
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| 170 | { |
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| 171 | std::string restore_old = "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD"; |
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| 172 | |
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| 173 | { |
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| 174 | std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD"; |
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| 175 | std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0"; |
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| 176 | std::string num_reg = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0"; |
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| 177 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 178 | vhdl->set_body (5,"gpr_stat_list"+addr+"(1) <= "+restore+" and "+restore_old+";"); |
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| 179 | } |
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| 180 | |
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| 181 | { |
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| 182 | std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW"; |
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| 183 | std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0"; |
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| 184 | std::string num_reg = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0"; |
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| 185 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 186 | |
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| 187 | vhdl->set_body (5,"if ("+restore+" = '1') then"); |
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| 188 | vhdl->set_body (5,"gpr_stat_list"+addr+"(1) <= '0';"); |
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| 189 | vhdl->set_body (5,"end if;"); // write_rd |
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| 190 | } |
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| 191 | } |
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| 192 | |
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| 193 | vhdl->set_body (4,"end if;"); // write_rd |
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| 194 | |
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| 195 | // write re |
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| 196 | vhdl->set_body (4,"if (in_RETIRE_"+toString(i)+"_WRITE_RE = '1') then"); |
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| 197 | { |
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| 198 | std::string restore_old = "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD"; |
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| 199 | |
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| 200 | { |
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| 201 | std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD"; |
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| 202 | std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0"; |
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| 203 | std::string num_reg = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0"; |
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| 204 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 205 | vhdl->set_body (5,"spr_stat_list"+addr+"(1) <= "+restore+" and "+restore_old+";"); |
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| 206 | } |
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| 207 | |
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| 208 | { |
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| 209 | std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW"; |
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| 210 | std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0"; |
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| 211 | std::string num_reg = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0"; |
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| 212 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 213 | |
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| 214 | vhdl->set_body (5,"if ("+restore+" = '1') then"); |
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| 215 | vhdl->set_body (5,"spr_stat_list"+addr+"(1) <= '0';"); |
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| 216 | vhdl->set_body (5,"end if;"); // write_re |
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| 217 | } |
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| 218 | } |
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| 219 | |
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| 220 | vhdl->set_body (4,"end if;"); // write_re |
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| 221 | vhdl->set_body (3,"end if;"); // transaction retire |
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| 222 | } |
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| 223 | |
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| 224 | for (uint32_t i=0; i<_param->_nb_reg_free; i++) |
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| 225 | { |
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| 226 | { |
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| 227 | vhdl->set_comment(3,"====================================================="); |
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| 228 | vhdl->set_comment(3,"=====[ PUSH_GPR ]===================================="); |
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| 229 | vhdl->set_comment(3,"====================================================="); |
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| 230 | vhdl->set_body (3,"if ((internal_PUSH_GPR_"+toString(i)+"_VAL and in_PUSH_GPR_"+toString(i)+"_ACK) = '1') then"); |
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| 231 | |
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| 232 | std::string num_bank = (size_bank >0)?("conv_integer(internal_PUSH_GPR_"+toString(i)+"_NUM_BANK)"):"0"; |
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| 233 | std::string num_reg = (size_gpr_ptr>0)?("conv_integer(internal_PUSH_GPR_"+toString(i)+"_NUM_REG )"):"0"; |
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| 234 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 235 | |
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| 236 | vhdl->set_body (4,"gpr_stat_list"+addr+"(0) <= '1';"); |
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| 237 | vhdl->set_body (3,"end if;"); |
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| 238 | } |
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| 239 | |
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| 240 | { |
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| 241 | vhdl->set_comment(3,"====================================================="); |
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| 242 | vhdl->set_comment(3,"=====[ PUSH_SPR ]===================================="); |
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| 243 | vhdl->set_comment(3,"====================================================="); |
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| 244 | vhdl->set_body (3,"if ((internal_PUSH_SPR_"+toString(i)+"_VAL and in_PUSH_SPR_"+toString(i)+"_ACK) = '1') then"); |
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| 245 | |
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| 246 | std::string num_bank = (size_bank >0)?("conv_integer(internal_PUSH_SPR_"+toString(i)+"_NUM_BANK)"):"0"; |
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| 247 | std::string num_reg = (size_spr_ptr>0)?("conv_integer(internal_PUSH_SPR_"+toString(i)+"_NUM_REG )"):"0"; |
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| 248 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 249 | |
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| 250 | vhdl->set_body (4,"spr_stat_list"+addr+"(0) <= '1';"); |
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| 251 | vhdl->set_body (3,"end if;"); |
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| 252 | } |
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| 253 | } |
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| 254 | |
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| 255 | vhdl->set_comment(3,"====================================================="); |
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| 256 | vhdl->set_comment(3,"=====[ POINTER ]====================================="); |
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| 257 | vhdl->set_comment(3,"====================================================="); |
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| 258 | |
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| 259 | if (size_gpr_ptr>0) |
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| 260 | { |
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| 261 | if (is_power2(_param->_nb_general_register_by_bank)) |
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| 262 | { |
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| 263 | if (size_gpr_ptr == 1) |
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| 264 | vhdl->set_body (3,"reg_GPR_PTR_FREE <= not reg_GPR_PTR_FREE;"); |
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| 265 | else |
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| 266 | vhdl->set_body (3,"reg_GPR_PTR_FREE <= reg_GPR_PTR_FREE - "+std_logic_cst(size_gpr_ptr,1)+";"); |
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| 267 | } |
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| 268 | else |
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| 269 | { |
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| 270 | throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of GPR must a power of 2.")); |
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| 271 | } |
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| 272 | } |
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| 273 | |
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| 274 | if (size_spr_ptr>0) |
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| 275 | { |
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| 276 | if (is_power2(_param->_nb_special_register_by_bank)) |
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| 277 | { |
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| 278 | if (size_spr_ptr == 1) |
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| 279 | vhdl->set_body (3,"reg_SPR_PTR_FREE <= not reg_SPR_PTR_FREE;"); |
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| 280 | else |
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| 281 | vhdl->set_body (3,"reg_SPR_PTR_FREE <= reg_SPR_PTR_FREE - "+std_logic_cst(size_spr_ptr,1)+";"); |
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| 282 | } |
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| 283 | else |
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| 284 | { |
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| 285 | throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of SPR must a power of 2.")); |
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| 286 | } |
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| 287 | } |
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| 288 | |
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| 289 | vhdl->set_body (2,"end if;"); // in_CLOCK'event and in_CLOCK = '1' |
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| 290 | vhdl->set_body (1,"end if;"); // if in_NRESET = '0' |
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| 291 | vhdl->set_body (0,"end process transition;"); |
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| 292 | |
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| 293 | { |
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| 294 | vhdl->set_body (0,""); |
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| 295 | vhdl->set_comment(0,"====================================================="); |
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| 296 | vhdl->set_comment(0,"=====[ PUSH_GPR ]===================================="); |
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| 297 | vhdl->set_comment(0,"====================================================="); |
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| 298 | vhdl->set_body (0,""); |
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| 299 | |
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| 300 | for (uint32_t i=0; i<_param->_nb_reg_free; i++) |
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| 301 | { |
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| 302 | uint32_t offset = i*_param->_nb_bank_by_port_free; |
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| 303 | std::string address; |
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| 304 | |
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| 305 | if (size_gpr_ptr > 0) |
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| 306 | { |
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| 307 | address = "internal_PUSH_GPR_"+toString(i)+"_NUM_REG"; |
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| 308 | vhdl->set_body (0,"internal_PUSH_GPR_"+toString(i)+"_NUM_REG <= reg_GPR_PTR_FREE;"); |
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| 309 | } |
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| 310 | else |
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| 311 | { |
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| 312 | address = "0"; |
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| 313 | } |
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| 314 | |
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| 315 | vhdl->set_body (0,"internal_PUSH_GPR_"+toString(i)+"_VAL <= '1' when"); |
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| 316 | vhdl->set_body (1,"false"); |
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| 317 | |
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| 318 | for (uint32_t j=0; j<_param->_nb_bank_by_port_free; j++) |
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| 319 | { |
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| 320 | std::string num_bank = toString(offset+j); |
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| 321 | std::string num_reg = "conv_integer("+address+")"; |
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| 322 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 323 | |
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| 324 | vhdl->set_body (1,"or (gpr_stat_list"+addr+" = \"00\")"); |
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| 325 | } |
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| 326 | vhdl->set_body (1,"else '0';"); |
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| 327 | |
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| 328 | if (size_bank > 0) |
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| 329 | { |
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| 330 | vhdl->set_body (0,"internal_PUSH_GPR_"+toString(i)+"_NUM_BANK <= "); |
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| 331 | for (uint32_t j=0; j<_param->_nb_bank_by_port_free-1; j++) |
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| 332 | { |
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| 333 | uint32_t _num_bank = offset+j; |
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| 334 | std::string num_bank = toString(_num_bank); |
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| 335 | std::string num_reg = "conv_integer("+address+")"; |
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| 336 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 337 | |
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| 338 | vhdl->set_body (1,std_logic_cst(size_bank,_num_bank)+" when (gpr_stat_list"+addr+" = \"00\") else"); |
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| 339 | } |
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| 340 | vhdl->set_body (1,std_logic_cst(size_bank,offset+_param->_nb_bank_by_port_free-1)+";"); |
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| 341 | } |
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| 342 | |
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| 343 | vhdl->set_body (0,"out_PUSH_GPR_"+toString(i)+"_VAL <= internal_PUSH_GPR_"+toString(i)+"_VAL;"); |
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| 344 | |
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| 345 | if (is_power2(_param->_nb_general_register_by_bank)) |
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| 346 | { |
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| 347 | std::string num_bank = (size_bank > 0)?("internal_PUSH_GPR_"+toString(i)+"_NUM_BANK"):""; |
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| 348 | std::string num_reg = (size_gpr_ptr > 0)?address:""; |
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| 349 | std::string conc = ((size_gpr_ptr*size_bank) > 0)?" & ":""; |
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| 350 | |
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| 351 | vhdl->set_body (0,"out_PUSH_GPR_"+toString(i)+"_NUM_REG <= "+num_bank+conc+num_reg+";"); |
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| 352 | } |
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| 353 | else |
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| 354 | { |
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| 355 | throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of GPR must a power of 2.")); |
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| 356 | } |
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| 357 | } |
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| 358 | } |
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| 359 | |
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| 360 | |
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| 361 | { |
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| 362 | vhdl->set_body (0,""); |
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| 363 | vhdl->set_comment(0,"====================================================="); |
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| 364 | vhdl->set_comment(0,"=====[ PUSH_SPR ]===================================="); |
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| 365 | vhdl->set_comment(0,"====================================================="); |
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| 366 | vhdl->set_body (0,""); |
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| 367 | |
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| 368 | for (uint32_t i=0; i<_param->_nb_reg_free; i++) |
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| 369 | { |
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| 370 | uint32_t offset = i*_param->_nb_bank_by_port_free; |
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| 371 | std::string address; |
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| 372 | |
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| 373 | if (size_spr_ptr > 0) |
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| 374 | { |
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| 375 | address = "internal_PUSH_SPR_"+toString(i)+"_NUM_REG"; |
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| 376 | vhdl->set_body (0,"internal_PUSH_SPR_"+toString(i)+"_NUM_REG <= reg_SPR_PTR_FREE;"); |
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| 377 | } |
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| 378 | else |
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| 379 | { |
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| 380 | address = "0"; |
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| 381 | } |
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| 382 | |
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| 383 | vhdl->set_body (0,"internal_PUSH_SPR_"+toString(i)+"_VAL <= '1' when"); |
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| 384 | vhdl->set_body (1,"false"); |
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| 385 | |
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| 386 | for (uint32_t j=0; j<_param->_nb_bank_by_port_free; j++) |
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| 387 | { |
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| 388 | std::string num_bank = toString(offset+j); |
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| 389 | std::string num_reg = "conv_integer("+address+")"; |
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| 390 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 391 | |
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| 392 | vhdl->set_body (1,"or (spr_stat_list"+addr+" = \"00\")"); |
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| 393 | } |
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| 394 | vhdl->set_body (1,"else '0';"); |
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| 395 | |
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| 396 | if (size_bank > 0) |
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| 397 | { |
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| 398 | vhdl->set_body (0,"internal_PUSH_SPR_"+toString(i)+"_NUM_BANK <= "); |
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| 399 | for (uint32_t j=0; j<_param->_nb_bank_by_port_free-1; j++) |
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| 400 | { |
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| 401 | uint32_t _num_bank = offset+j; |
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| 402 | std::string num_bank = toString(_num_bank); |
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| 403 | std::string num_reg = "conv_integer("+address+")"; |
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| 404 | std::string addr = "("+num_bank+")("+num_reg+")"; |
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| 405 | |
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| 406 | vhdl->set_body (1,std_logic_cst(size_bank,_num_bank)+" when (spr_stat_list"+addr+" = \"00\") else"); |
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| 407 | } |
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| 408 | vhdl->set_body (1,std_logic_cst(size_bank,offset+_param->_nb_bank_by_port_free-1)+";"); |
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| 409 | } |
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| 410 | |
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| 411 | vhdl->set_body (0,"out_PUSH_SPR_"+toString(i)+"_VAL <= internal_PUSH_SPR_"+toString(i)+"_VAL;"); |
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| 412 | |
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| 413 | if (is_power2(_param->_nb_special_register_by_bank)) |
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| 414 | { |
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| 415 | std::string num_bank = (size_bank > 0)?("internal_PUSH_SPR_"+toString(i)+"_NUM_BANK"):""; |
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| 416 | std::string num_reg = (size_spr_ptr > 0)?address:""; |
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| 417 | std::string conc = ((size_spr_ptr*size_bank) > 0)?" & ":""; |
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| 418 | |
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| 419 | vhdl->set_body (0,"out_PUSH_SPR_"+toString(i)+"_NUM_REG <= "+num_bank+conc+num_reg+";"); |
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| 420 | } |
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| 421 | else |
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| 422 | { |
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| 423 | throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of SPR must a power of 2.")); |
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| 424 | } |
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| 425 | } |
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| 426 | } |
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| 427 | |
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[78] | 428 | log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); |
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| 429 | }; |
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| 430 | |
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| 431 | }; // end namespace stat_list_unit |
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| 432 | }; // end namespace register_translation_unit |
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| 433 | }; // end namespace rename_unit |
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| 434 | }; // end namespace ooo_engine |
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| 435 | }; // end namespace multi_ooo_engine |
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| 436 | }; // end namespace core |
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| 437 | |
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| 438 | }; // end namespace behavioural |
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| 439 | }; // end namespace morpheo |
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| 440 | #endif |
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