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Register_translation_unit_allocation.cpp @ 78

Last change on this file since 78 was 78, checked in by rosiere, 16 years ago

Add :

Execute_loop (must be test systemC)
Prediction
- Direction : predifined scheme
- Branch Target Buffer
iFetch_unit
- ifetch_queue
- pc management
Decod_unit
- coming soon : support for custom operation
Rename_unit
- RAT
- Free_list
- Dependence RAW check
- Load store unit pointer
New Environnement (hierarchy_memory will remove in a next version)

Modif :

Manage Custom Operation
All component in execute_loop to use the new statistics management

Not Finish :

Return Address Stack
Environnement

File size: 38.5 KB

Line
1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_ooo_engine {
15	namespace ooo_engine {
16	namespace rename_unit {
17	namespace register_translation_unit {
18
19
20
21	#undef FUNCTION
22	#define FUNCTION "Register_translation_unit::allocation"
23	void Register_translation_unit::allocation (
24	#ifdef STATISTICS
25	morpheo::behavioural::Parameters_Statistics * param_statistics
26	#else
27	void
28	#endif
29	)
30	{
31	log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin");
32
33	_component = new Component (_usage);
34
35	Entity * entity = _component->set_entity (_name
36	,"Register_translation_unit"
37	#ifdef POSITION
38	,COMBINATORY
39	#endif
40	);
41
42	_interfaces = entity->set_interfaces();
43
44	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
45	{
46	Interface * interface = _interfaces->set_interface(""
47	#ifdef POSITION
48	,IN
49	,SOUTH,
50	"Generalist interface"
51	#endif
52	);
53
54	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
55	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
56	}
57
58	// ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
59	{
60	ALLOC1_INTERFACE("rename", IN, EAST, "Instruction with logical register", _param->_nb_inst_insert);
61
62	ALLOC1_VALACK_IN ( in_RENAME_VAL ,VAL);
63	ALLOC1_VALACK_OUT(out_RENAME_ACK ,ACK);
64	ALLOC1_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id );
65	ALLOC1_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
66	ALLOC1_SIGNAL_IN ( in_RENAME_READ_RA ,"read_ra" ,Tcontrol_t ,1 );
67	ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RA_LOG,"num_reg_ra_log",Tgeneral_address_t,_param->_size_general_register_logic);
68	ALLOC1_SIGNAL_IN ( in_RENAME_READ_RB ,"read_rb" ,Tcontrol_t ,1 );
69	ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RB_LOG,"num_reg_rb_log",Tgeneral_address_t,_param->_size_general_register_logic);
70	ALLOC1_SIGNAL_IN ( in_RENAME_READ_RC ,"read_rc" ,Tcontrol_t ,1 );
71	ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RC_LOG,"num_reg_rc_log",Tspecial_address_t,_param->_size_special_register_logic);
72	ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 );
73	ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RD_LOG,"num_reg_rd_log",Tgeneral_address_t,_param->_size_general_register_logic);
74	ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RE ,"write_re" ,Tcontrol_t ,1 );
75	ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RE_LOG,"num_reg_re_log",Tspecial_address_t,_param->_size_special_register_logic);
76	}
77
78	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
79	{
80	ALLOC1_INTERFACE("insert",OUT,WEST , "Instruction with physical register", _param->_nb_inst_insert);
81
82	ALLOC1_VALACK_OUT(out_INSERT_VAL ,VAL);
83	ALLOC1_VALACK_IN ( in_INSERT_ACK ,ACK);
84	ALLOC1_SIGNAL_OUT(out_INSERT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id );
85	ALLOC1_SIGNAL_OUT(out_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
86	ALLOC1_SIGNAL_OUT(out_INSERT_READ_RA ,"read_ra" ,Tcontrol_t ,1 );
87	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic);
88	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register );
89	ALLOC1_SIGNAL_OUT(out_INSERT_READ_RB ,"read_rb" ,Tcontrol_t ,1 );
90	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic);
91	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register );
92	ALLOC1_SIGNAL_OUT(out_INSERT_READ_RC ,"read_rc" ,Tcontrol_t ,1 );
93	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic);
94	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register );
95	ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 );
96	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic);
97	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register );
98	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register );
99	ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 );
100	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic);
101	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register );
102	ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register );
103	}
104
105	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
106	{
107	ALLOC1_INTERFACE("retire",IN ,NORTH, "Retire instruction, update renaming structure.", _param->_nb_inst_retire);
108	ALLOC1_VALACK_IN ( in_RETIRE_VAL ,VAL);
109	ALLOC1_VALACK_OUT(out_RETIRE_ACK ,ACK);
110	ALLOC1_SIGNAL_IN ( in_RETIRE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id );
111	ALLOC1_SIGNAL_IN ( in_RETIRE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
112	ALLOC1_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"event_state" ,Tevent_state_t ,_param->_size_event_state );
113	ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 );
114	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register );
115	ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 );
116	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register );
117	ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 );
118	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register );
119	ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 );
120	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic);
121	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register );
122	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register );
123	ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RE ,"write_re" ,Tcontrol_t ,1 );
124	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic);
125	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register );
126	ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register );
127	}
128	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
129	std::string name;
130	{
131	name = _name+"_dependency_checking_unit";
132	std::cout << "Create : " << name << std::endl;
133
134	_component_dependency_checking_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Dependency_checking_unit
135	(name.c_str()
136	#ifdef STATISTICS
137	,param_statistics
138	#endif
139	,_param->_param_dependency_checking_unit);
140
141	_component->set_component (_component_dependency_checking_unit->_component
142	#ifdef POSITION
143	, 50, 50, 10, 10
144	#endif
145	);
146	}
147
148	{
149	name = _name+"_free_list_unit";
150	std::cout << "Create : " << name << std::endl;
151
152	_component_free_list_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Free_List_unit
153	(name.c_str()
154	#ifdef STATISTICS
155	,param_statistics
156	#endif
157	,_param->_param_free_list_unit);
158
159	_component->set_component (_component_free_list_unit->_component
160	#ifdef POSITION
161	, 50, 50, 10, 10
162	#endif
163	);
164	}
165
166	{
167	name = _name+"_register_address_translation_unit";
168	std::cout << "Create : " << name << std::endl;
169
170	_component_register_address_translation_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit
171	(name.c_str()
172	#ifdef STATISTICS
173	,param_statistics
174	#endif
175	,_param->_param_register_address_translation_unit);
176
177	_component->set_component (_component_register_address_translation_unit->_component
178	#ifdef POSITION
179	, 50, 50, 10, 10
180	#endif
181	);
182	}
183
184	{
185	name = _name+"_stat_list_unit";
186	std::cout << "Create : " << name << std::endl;
187
188	_component_stat_list_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Stat_List_unit
189	(name.c_str()
190	#ifdef STATISTICS
191	,param_statistics
192	#endif
193	,_param->_param_stat_list_unit);
194
195	_component->set_component (_component_stat_list_unit->_component
196	#ifdef POSITION
197	, 50, 50, 10, 10
198	#endif
199	);
200	}
201
202	{
203	name = _name+"_register_translation_unit_glue";
204	std::cout << "Create : " << name << std::endl;
205
206	_component_register_translation_unit_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Register_translation_unit_Glue
207	(name.c_str()
208	#ifdef STATISTICS
209	,param_statistics
210	#endif
211	,_param->_param_register_translation_unit_glue);
212
213	_component->set_component (_component_register_translation_unit_glue->_component
214	#ifdef POSITION
215	, 50, 50, 10, 10
216	#endif
217	);
218	}
219
220	// ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
221	std::string src,dest;
222
223	// ===================================================================
224	// =====[ dependency_checking_unit ]==================================
225	// ===================================================================
226	{
227	src = _name+"_dependency_checking_unit";
228	std::cout << "Instance : " << src << std::endl;
229
230	{
231	dest = _name;
232	#ifdef POSITION
233	_component->interface_map (src ,"",
234	dest,"");
235	#endif
236	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
237	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
238	}
239
240	// ~~~~~[ Interface "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
241	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
242	{
243	dest = _name;
244	#ifdef POSITION
245	_component->interface_map (src ,"rename_in_"+toString(i)
246	dest,"rename_"+toString(i));
247	#endif
248
249	// PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_VAL" ,dest,);
250	// PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(i)+"_ACK" ,dest,);
251	if (_param->_have_port_front_end_id)
252	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_FRONT_END_ID" ,
253	dest, "in_RENAME_"+toString(i)+"_FRONT_END_ID" );
254	if (_param->_have_port_context_id)
255	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_CONTEXT_ID" ,
256	dest, "in_RENAME_"+toString(i)+"_CONTEXT_ID" );
257	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_READ_RA" ,
258	dest, "in_RENAME_"+toString(i)+"_READ_RA" );
259	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_LOG" ,
260	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG" );
261	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_READ_RB" ,
262	dest, "in_RENAME_"+toString(i)+"_READ_RB" );
263	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_LOG" ,
264	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG" );
265	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_READ_RC" ,
266	dest, "in_RENAME_"+toString(i)+"_READ_RC" );
267	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_LOG" ,
268	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG" );
269	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_WRITE_RD" ,
270	dest, "in_RENAME_"+toString(i)+"_WRITE_RD" );
271	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_LOG" ,
272	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG" );
273	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_WRITE_RE" ,
274	dest, "in_RENAME_"+toString(i)+"_WRITE_RE" );
275	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_LOG" ,
276	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG" );
277
278	dest = _name+"_register_address_translation_unit";
279
280	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_PHY" ,
281	dest,"out_RENAME_"+toString(i)+"_NUM_REG_RA_PHY" );
282	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_PHY" ,
283	dest,"out_RENAME_"+toString(i)+"_NUM_REG_RB_PHY" );
284	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_PHY" ,
285	dest,"out_RENAME_"+toString(i)+"_NUM_REG_RC_PHY" );
286	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
287	dest,"out_RENAME_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
288	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
289	dest,"out_RENAME_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
290
291	dest = _name+"_free_list_unit";
292
293	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
294	dest,"out_POP_"+toString(i)+"_GPR_NUM_REG");
295	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
296	dest,"out_POP_"+toString(i)+"_SPR_NUM_REG");
297	}
298
299	// ~~~~~[ Interface "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
300	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
301	{
302	dest = _name;
303	#ifdef POSITION
304	_component->interface_map (src ,"rename_out_"+toString(i),
305	dest,"insert_"+toString(i));
306	#endif
307
308	// PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_VAL" ,
309	// dest,"out_INSERT_"+toString(i)+"_VAL" );
310	// PORT_MAP(_component,src , "in_RENAME_OUT_"+toString(i)+"_ACK" ,
311	// dest, "in_INSERT_"+toString(i)+"_ACK" );
312	if (_param->_have_port_front_end_id)
313	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_FRONT_END_ID" ,
314	dest,"out_INSERT_"+toString(i)+"_FRONT_END_ID" );
315	if (_param->_have_port_context_id)
316	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_CONTEXT_ID" ,
317	dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID" );
318	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RA" ,
319	dest,"out_INSERT_"+toString(i)+"_READ_RA" );
320	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_LOG" ,
321	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_LOG" );
322	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_PHY" ,
323	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_PHY" );
324	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RB" ,
325	dest,"out_INSERT_"+toString(i)+"_READ_RB" );
326	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_LOG" ,
327	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_LOG" );
328	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_PHY" ,
329	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_PHY" );
330	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RC" ,
331	dest,"out_INSERT_"+toString(i)+"_READ_RC" );
332	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_LOG" ,
333	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_LOG" );
334	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_PHY" ,
335	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_PHY" );
336	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD" ,
337	dest,"out_INSERT_"+toString(i)+"_WRITE_RD" );
338	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_LOG" ,
339	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_LOG" );
340	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
341	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
342	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
343	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
344	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE" ,
345	dest,"out_INSERT_"+toString(i)+"_WRITE_RE" );
346	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_LOG" ,
347	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_LOG" );
348	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
349	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
350	PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
351	dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
352	}
353	}
354
355	// ===================================================================
356	// =====[ free_list_unit ]============================================
357	// ===================================================================
358	{
359	src = _name+"_free_list_unit";
360	std::cout << "Instance : " << src << std::endl;
361
362	{
363	dest = _name;
364	#ifdef POSITION
365	_component->interface_map (src ,"",
366	dest,"");
367	#endif
368	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
369	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
370	}
371
372	// ~~~~~[ interface : "pop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
373	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
374	{
375	dest = _name;
376	#ifdef POSITION
377	_component->interface_map (src ,"pop_"+toString(i)
378	dest,"rename_"+toString(i));
379	#endif
380
381	PORT_MAP(_component,src , "in_POP_"+toString(i)+"_GPR_VAL" ,
382	dest,"in_RENAME_"+toString(i)+"_WRITE_RD");
383	PORT_MAP(_component,src , "in_POP_"+toString(i)+"_SPR_VAL" ,
384	dest,"in_RENAME_"+toString(i)+"_WRITE_RE");
385
386	dest = _name+"_register_translation_unit_glue";
387	PORT_MAP(_component,src , "in_POP_"+toString(i)+"_VAL" ,
388	dest,"out_INSERT_"+toString(i)+"_FREE_LIST_VAL" );
389	PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_ACK" ,
390	dest, "in_INSERT_"+toString(i)+"_FREE_LIST_ACK" );
391
392	dest = _name+"_dependency_checking_unit";
393
394	PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_GPR_NUM_REG",
395	dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
396	PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_SPR_NUM_REG",
397	dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
398	}
399	// ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
400	// ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
401	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
402	{
403	dest = _name+"_stat_list_unit";
404	#ifdef POSITION
405	_component->interface_map (src ,"push_gpr_"+toString(i)
406	dest,"push_gpr_"+toString(i));
407	#endif
408
409	PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_VAL" ,
410	dest,"out_PUSH_GPR_"+toString(i)+"_VAL" );
411	PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_ACK" ,
412	dest, "in_PUSH_GPR_"+toString(i)+"_ACK" );
413	PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_NUM_REG",
414	dest,"out_PUSH_GPR_"+toString(i)+"_NUM_REG");
415
416	#ifdef POSITION
417	_component->interface_map (src ,"push_spr_"+toString(i)
418	dest,"push_spr_"+toString(i));
419	#endif
420
421	PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_VAL" ,
422	dest,"out_PUSH_SPR_"+toString(i)+"_VAL" );
423	PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_ACK" ,
424	dest, "in_PUSH_SPR_"+toString(i)+"_ACK" );
425	PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_NUM_REG",
426	dest,"out_PUSH_SPR_"+toString(i)+"_NUM_REG");
427	}
428	}
429
430	// ===================================================================
431	// =====[ register_address_translation_unit ]=========================
432	// ===================================================================
433	{
434	src = _name+"_register_address_translation_unit";
435	std::cout << "Instance : " << src << std::endl;
436
437	{
438	dest = _name;
439	#ifdef POSITION
440	_component->interface_map (src ,"",
441	dest,"");
442	#endif
443	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
444	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
445	}
446
447	// ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
448	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
449	{
450	dest = _name;
451	#ifdef POSITION
452	_component->interface_map (src ,"rename_"+toString(i)
453	dest,"rename_"+toString(i));
454	#endif
455
456	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_VAL" ,
457	dest, "in_RENAME_"+toString(i)+"_VAL" );
458	if (_param->_have_port_front_end_id)
459	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_FRONT_END_ID" ,
460	dest, "in_RENAME_"+toString(i)+"_FRONT_END_ID" );
461	if (_param->_have_port_context_id)
462	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_CONTEXT_ID" ,
463	dest, "in_RENAME_"+toString(i)+"_CONTEXT_ID" );
464	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG" ,
465	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG" );
466	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG" ,
467	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG" );
468	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG" ,
469	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG" );
470	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG" ,
471	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG" );
472	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG" ,
473	dest, "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG" );
474
475	dest = _name+"_register_translation_unit_glue";
476	PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_ACK",
477	dest, "in_INSERT_"+toString(i)+"_RAT_RENAME_ACK");
478
479	dest = _name+"_dependency_checking_unit";
480	PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RA_PHY" ,
481	dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_PHY" );
482	PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RB_PHY" ,
483	dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_PHY" );
484	PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RC_PHY" ,
485	dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_PHY" );
486	PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
487	dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
488	PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
489	dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
490	}
491
492	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
493	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
494	{
495	dest = _name+"_dependency_checking_unit";
496	#ifdef POSITION
497	_component->interface_map (src ,"rename_"+toString(i)
498	dest,"rename_in_"+toString(i));
499	#endif
500
501	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD" ,
502	dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD" );
503	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE" ,
504	dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE" );
505	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_LOG",
506	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_LOG");
507	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_LOG",
508	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_LOG");
509	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY",
510	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
511	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY",
512	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
513
514	dest = _name+"_register_translation_unit_glue";
515	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_VAL",
516	dest,"out_INSERT_"+toString(i)+"_RAT_INSERT_VAL");
517	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_ACK",
518	dest, "in_INSERT_"+toString(i)+"_RAT_INSERT_ACK");
519	}
520
521	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
522	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
523	{
524	dest = _name;
525	#ifdef POSITION
526	_component->interface_map (src ,"retire_"+toString(i)
527	dest,"retire_"+toString(i));
528	#endif
529
530	if (_param->_have_port_front_end_id)
531	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_FRONT_END_ID" ,
532	dest, "in_RETIRE_"+toString(i)+"_FRONT_END_ID" );
533	if (_param->_have_port_context_id)
534	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_CONTEXT_ID" ,
535	dest, "in_RETIRE_"+toString(i)+"_CONTEXT_ID" );
536	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_EVENT_STATE" ,
537	dest, "in_RETIRE_"+toString(i)+"_EVENT_STATE" );
538	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RD" ,
539	dest, "in_RETIRE_"+toString(i)+"_WRITE_RD" );
540	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RE" ,
541	dest, "in_RETIRE_"+toString(i)+"_WRITE_RE" );
542	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG" ,
543	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG" );
544	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG" ,
545	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG" );
546	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
547	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
548	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
549	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
550
551	dest = _name+"_register_translation_unit_glue";
552	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL" ,
553	dest,"out_RETIRE_"+toString(i)+"_RAT_VAL" );
554	PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK" ,
555	dest, "in_RETIRE_"+toString(i)+"_RAT_ACK" );
556	}
557	}
558
559	// ===================================================================
560	// =====[ stat_list_unit ]============================================
561	// ===================================================================
562	{
563	src = _name+"_stat_list_unit";
564	std::cout << "Instance : " << src << std::endl;
565
566	{
567	dest = _name;
568	#ifdef POSITION
569	_component->interface_map (src ,"",
570	dest,"");
571	#endif
572	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
573	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
574	}
575
576	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
577	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
578	{
579	dest = _name+"_dependency_checking_unit";
580	#ifdef POSITION
581	_component->interface_map (src ,"insert_"+toString(i)
582	dest,"rename_out_"+toString(i));
583	#endif
584
585	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RA" ,
586	dest,"out_RENAME_OUT_"+toString(i)+"_READ_RA" );
587	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RA_PHY" ,
588	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_PHY" );
589	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RB" ,
590	dest,"out_RENAME_OUT_"+toString(i)+"_READ_RB" );
591	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RB_PHY" ,
592	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_PHY" );
593	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RC" ,
594	dest,"out_RENAME_OUT_"+toString(i)+"_READ_RC" );
595	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RC_PHY" ,
596	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_PHY" );
597	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD" ,
598	dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD" );
599	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
600	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
601	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE" ,
602	dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE" );
603	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
604	dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
605
606	dest = _name+"_register_translation_unit_glue";
607	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_VAL" ,
608	dest,"out_INSERT_"+toString(i)+"_STAT_LIST_VAL");
609	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_ACK" ,
610	dest, "in_INSERT_"+toString(i)+"_STAT_LIST_ACK" );
611	}
612
613	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
614	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
615	{
616	dest = _name;
617	#ifdef POSITION
618	_component->interface_map (src ,"retire_"+toString(i)
619	dest,"retire_"+toString(i));
620	#endif
621
622	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RA" ,
623	dest, "in_RETIRE_"+toString(i)+"_READ_RA" );
624	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RA_PHY" ,
625	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RA_PHY" );
626	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RB" ,
627	dest, "in_RETIRE_"+toString(i)+"_READ_RB" );
628	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RB_PHY" ,
629	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RB_PHY" );
630	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RC" ,
631	dest, "in_RETIRE_"+toString(i)+"_READ_RC" );
632	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RC_PHY" ,
633	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RC_PHY" );
634	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RD" ,
635	dest, "in_RETIRE_"+toString(i)+"_WRITE_RD" );
636	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
637	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
638	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
639	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
640	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RE" ,
641	dest, "in_RETIRE_"+toString(i)+"_WRITE_RE" );
642	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
643	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
644	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
645	dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
646
647	dest = _name+"_register_translation_unit_glue";
648	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL",
649	dest,"out_RETIRE_"+toString(i)+"_STAT_LIST_VAL");
650	PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK",
651	dest, "in_RETIRE_"+toString(i)+"_STAT_LIST_ACK");
652	}
653
654	// ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
655	// ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
656	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
657	{
658	dest = _name+"_free_list_unit";
659	#ifdef POSITION
660	_component->interface_map (src ,"push_gpr_"+toString(i)
661	dest,"push_gpr_"+toString(i));
662	#endif
663
664	PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_VAL" ,
665	dest, "in_PUSH_GPR_"+toString(i)+"_VAL" );
666	PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_ACK" ,
667	dest,"out_PUSH_GPR_"+toString(i)+"_ACK" );
668	PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_NUM_REG",
669	dest, "in_PUSH_GPR_"+toString(i)+"_NUM_REG");
670
671	#ifdef POSITION
672	_component->interface_map (src ,"push_spr_"+toString(i)
673	dest,"push_spr_"+toString(i));
674	#endif
675
676	PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_VAL" ,
677	dest, "in_PUSH_SPR_"+toString(i)+"_VAL" );
678	PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_ACK" ,
679	dest,"out_PUSH_SPR_"+toString(i)+"_ACK" );
680	PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_NUM_REG",
681	dest, "in_PUSH_SPR_"+toString(i)+"_NUM_REG");
682	}
683	}
684
685	// ===================================================================
686	// =====[ register_translation_unit_glue ]============================
687	// ===================================================================
688	{
689	src = _name+"_register_translation_unit_glue";
690	std::cout << "Instance : " << src << std::endl;
691
692	{
693	dest = _name;
694	#ifdef POSITION
695	_component->interface_map (src ,"",
696	dest,"");
697	#endif
698	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
699	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
700	}
701
702	// ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
703	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
704	{
705	dest = _name;
706	#ifdef POSITION
707	_component->interface_map (src ,"insert_"+toString(i),
708	dest,"insert_"+toString(i));
709	#endif
710
711	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_RENAME_VAL" ,
712	dest, "in_RENAME_"+toString(i)+"_VAL" );
713	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RENAME_ACK" ,
714	dest,"out_RENAME_"+toString(i)+"_ACK" );
715	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_INSERT_VAL" ,
716	dest,"out_INSERT_"+toString(i)+"_VAL" );
717	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_INSERT_ACK" ,
718	dest, "in_INSERT_"+toString(i)+"_ACK" );
719
720	dest = _name+"_register_address_translation_unit";
721	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RAT_INSERT_VAL",
722	dest, "in_INSERT_"+toString(i)+"_VAL");
723	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_RAT_RENAME_ACK",
724	dest,"out_RENAME_"+toString(i)+"_ACK");
725	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_RAT_INSERT_ACK",
726	dest,"out_INSERT_"+toString(i)+"_ACK");
727
728	dest = _name+"_free_list_unit";
729	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_FREE_LIST_VAL" ,
730	dest, "in_POP_"+toString(i)+"_VAL" );
731	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_FREE_LIST_ACK" ,
732	dest,"out_POP_"+toString(i)+"_ACK" );
733
734	dest = _name+"_stat_list_unit";
735	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_STAT_LIST_VAL" ,
736	dest, "in_INSERT_"+toString(i)+"_VAL" );
737	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_STAT_LIST_ACK" ,
738	dest,"out_INSERT_"+toString(i)+"_ACK" );
739	}
740
741	// ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
742	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
743	{
744	dest = _name;
745	#ifdef POSITION
746	_component->interface_map (src ,"retire",
747	dest,"retire");
748	#endif
749
750	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL" ,
751	dest, "in_RETIRE_"+toString(i)+"_VAL" );
752	PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK" ,
753	dest,"out_RETIRE_"+toString(i)+"_ACK" );
754
755	dest = _name+"_register_address_translation_unit";
756	PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RAT_VAL" ,
757	dest, "in_RETIRE_"+toString(i)+"_VAL" );
758	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RAT_ACK" ,
759	dest,"out_RETIRE_"+toString(i)+"_ACK" );
760
761	dest = _name+"_stat_list_unit";
762	PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_STAT_LIST_VAL",
763	dest, "in_RETIRE_"+toString(i)+"_VAL");
764	PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_STAT_LIST_ACK",
765	dest,"out_RETIRE_"+toString(i)+"_ACK");
766	}
767	}
768
769
770	// ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
771	_component->test_map();
772
773	#ifdef POSITION
774	_component->generate_file();
775	#endif
776
777	log_printf(FUNC,Register_translation_unit,FUNCTION,"End");
778	};
779
780	}; // end namespace register_translation_unit
781	}; // end namespace rename_unit
782	}; // end namespace ooo_engine
783	}; // end namespace multi_ooo_engine
784	}; // end namespace core
785
786	}; // end namespace behavioural
787	}; // end namespace morpheo

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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp @ 78

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