source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Internal_Banked/src/RegisterFile_Internal_Banked_vhdl_body.cpp @ 145

Last change on this file since 145 was 145, checked in by rosiere, 14 years ago

1) add test with SPECINT2K
2) new config of Selftest
3) modif RAT to support multiple depth_save ... but not finish (need fix Update Prediction Table)
4) add Function_pointer but need fix
  • Property svn:keywords set to Id
File size: 6.5 KB
Line 
1#ifdef VHDL
2/*
3 * $Id: RegisterFile_Internal_Banked_vhdl_body.cpp 145 2010-10-13 18:15:51Z rosiere $
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/Generic/RegisterFile/RegisterFile_Internal_Banked/include/RegisterFile_Internal_Banked.h"
10
11namespace morpheo                    {
12namespace behavioural                {
13namespace generic                    {
14namespace registerfile               {
15namespace registerfile_internal_banked    {
16
17  void RegisterFile_Internal_Banked::vhdl_body (Vhdl * & vhdl)
18  {
19    vhdl->set_body   (0,"");
20    vhdl->set_comment(0,"---------------------------------------------------------------------------");
21    vhdl->set_comment(0," Ackitement");
22    vhdl->set_comment(0,"---------------------------------------------------------------------------");
23    vhdl->set_body   (0,"");
24
25    for (uint32_t num_read=0; num_read<_param->_nb_port_read; ++num_read)
26      vhdl->set_body   (0,"out_READ_"+toString(num_read)+"_ACK  <= '1';");
27    for (uint32_t num_write=0; num_write<_param->_nb_port_write; ++num_write)
28      vhdl->set_body   (0,"out_WRITE_"+toString(num_write)+"_ACK <= '1';");
29
30    vhdl->set_body   (0,"");
31    vhdl->set_comment(0,"---------------------------------------------------------------------------");
32    vhdl->set_comment(0," Read RegisterFile");
33    vhdl->set_comment(0,"---------------------------------------------------------------------------");
34    vhdl->set_body   (0,"");
35
36    if (_param->_size_ptr_write>0)
37      for (uint32_t num_read=0; num_read<_param->_nb_port_read; ++num_read)
38        {
39#ifdef PTR_IS_REGFILE
40          std::string str_address;
41          if (_param->_have_port_address)
42            str_address = "conv_integer(in_READ_"+toString(num_read)+"_ADDRESS)";
43          else
44            str_address = "0";
45
46          vhdl->set_body   (0,"READ_NUM_BANK_"+toString(num_read)+" <= reg_PTR_WRITE("+str_address+");");
47#else
48
49          vhdl->set_body   (0,"with in_READ_"+toString(num_read)+"_ADDRESS select");
50          vhdl->set_body   (1,"READ_NUM_BANK_"+toString(num_read)+" <=");
51          for (uint32_t num_word=0; num_word<_param->_nb_word-1; ++num_word)
52            vhdl->set_body   (1,"reg_PTR_WRITE_"+toString(num_word)+" when "+std_logic_cst(_param->_size_address,num_word)+",");
53          vhdl->set_body   (1,"reg_PTR_WRITE_"+toString(_param->_nb_word-1)+" when others;");
54#endif
55        }
56    vhdl->set_body   (0,"");
57
58    for (uint32_t num_read=0; num_read<_param->_nb_port_read; ++num_read)
59      {
60        std::string str_address;
61        if (_param->_have_port_address)
62          str_address = "conv_integer(in_READ_"+toString(num_read)+"_ADDRESS)";
63        else
64          str_address = "0";
65
66        vhdl->set_body   (0,"out_READ_"+toString(num_read)+"_DATA <=");
67        for (uint32_t num_write=0; num_write<_param->_nb_port_write; ++num_write)
68          {
69            std::string str_ptr_write="";
70            if (_param->_size_ptr_write>0)
71              str_ptr_write = " and READ_NUM_BANK_"+toString(num_read)+" = "+std_logic_cst(_param->_size_ptr_write,num_write);
72
73            vhdl->set_body   (1,"reg_DATA_"+toString(num_write)+"_"+toString(num_read)+"("+str_address+") when in_READ_"+toString(num_read)+"_VAL = '1'"+str_ptr_write+" else");
74          }
75        vhdl->set_body   (1,std_logic_others(_param->_size_word,0)+";");
76      }
77
78    vhdl->set_body   (0,"");
79    vhdl->set_comment(0,"---------------------------------------------------------------------------");
80    vhdl->set_comment(0," Write RegisterFile");
81    vhdl->set_comment(0,"---------------------------------------------------------------------------");
82    vhdl->set_body   (0,"");
83
84    vhdl->set_body   (0,"RegisterFile_write: process (in_CLOCK)");
85    vhdl->set_body   (0,"begin  -- process RegisterFile_write");
86    vhdl->set_body   (1,"if in_CLOCK'event and in_CLOCK = '1' then");
87
88    if (_param->_have_init_value)
89      {
90        vhdl->set_body   (2,"if in_NRESET = '0' then");
91       
92        std::string init_value = ((_param->_size_word>1)?"\"":"'")+_param->_init_value+((_param->_size_word>1)?"\"":"'");
93       
94        for (uint32_t num_word=0; num_word<_param->_nb_word; ++num_word)
95          {
96            for (uint32_t num_read=0; num_read<_param->_nb_port_read; ++num_read)
97              vhdl->set_body   (3,"reg_DATA_0_"+toString(num_read)+"("+toString(num_word)+") <= "+init_value+";");
98
99            if (_param->_size_ptr_write>0)
100              {
101#ifdef PTR_IS_REGFILE
102                vhdl->set_body   (3,"reg_PTR_WRITE("+toString(num_word)+") <= "+std_logic_cst(_param->_size_ptr_write,0)+";");
103#else
104                vhdl->set_body   (3,"reg_PTR_WRITE_"+toString(num_word)+" <= "+std_logic_cst(_param->_size_ptr_write,0)+";");
105#endif
106              }
107          }
108        vhdl->set_body   (2,"else");
109      }
110    // else
111    //   {
112    //     vhdl->set_body   (2,"if in_NRESET = '0' then");
113       
114    //     for (uint32_t num_word=0; num_word<_param->_nb_word; ++num_word)
115    //         if (_param->_size_ptr_write>0)
116    //           vhdl->set_body   (3,"reg_PTR_WRITE("+toString(num_word)+") <= "+std_logic_cst(_param->_size_ptr_write,0)+";");
117    //     vhdl->set_body   (2,"else");
118    //   }
119     
120   
121    for (uint32_t num_write=0; num_write<_param->_nb_port_write; ++num_write)
122      {
123        std::string str_address;
124        if (_param->_have_port_address)
125          str_address = "conv_integer(in_WRITE_"+toString(num_write)+"_ADDRESS)";
126        else
127          str_address = "0";
128
129        vhdl->set_body   (2,"if (in_WRITE_"+toString(num_write)+"_VAL = '1') then");
130        for (uint32_t num_read=0; num_read<_param->_nb_port_read; ++num_read)
131          vhdl->set_body   (3,"reg_DATA_"+toString(num_write)+"_"+toString(num_read)+"("+str_address+") <= in_WRITE_"+toString(num_write)+"_DATA;");
132
133        if (_param->_size_ptr_write>0)
134          {
135#ifdef PTR_IS_REGFILE
136          vhdl->set_body   (3,"reg_PTR_WRITE("+str_address+") <= "+std_logic_cst(_param->_size_ptr_write,num_write)+";");
137#else
138          for (uint32_t num_word=0; num_word<_param->_nb_word; ++num_word)
139            {
140              vhdl->set_body   (3,"if (in_WRITE_"+toString(num_write)+"_ADDRESS = "+std_logic_cst(_param->_size_address,num_word)+") then");
141              vhdl->set_body   (4,"reg_PTR_WRITE_"+toString(num_word)+" <= "+std_logic_cst(_param->_size_ptr_write,num_write)+";");
142              vhdl->set_body   (3,"end if;");
143            }
144#endif
145          }
146        vhdl->set_body   (2,"end if;");
147      }
148
149    vhdl->set_body   (1,"end if;");
150
151    if (_param->_have_init_value)
152      vhdl->set_body   (1,"end if;");
153
154    vhdl->set_body   (0,"end process RegisterFile_write;");
155  };
156
157}; // end namespace registerfile_internal_banked
158}; // end namespace registerfile
159}; // end namespace generic
160}; // end namespace behavioural         
161}; // end namespace morpheo             
162#endif
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