source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp @ 88

#ifdef SYSTEMC
/*
 * $Id: RegisterFile_Monolithic_transition.cpp 88 2008-12-10 18:31:39Z rosiere $
 *
 * [ Description ]
 * 
 */

#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h"

namespace morpheo                    {
namespace behavioural                {
namespace generic                    {
namespace registerfile               {
namespace registerfile_monolithic    {
  void RegisterFile_Monolithic::transition (void)
  {
    log_printf(FUNC,RegisterFile,"transition","Begin");

    for (uint32_t i=0; i<_param->_nb_port_write; i++)
      {
        // Have a write?
        if ( PORT_READ(in_WRITE_VAL[i]) == true)
          {
#ifdef STATISTICS
            if (usage_is_set(_usage,USE_STATISTICS))
              (*_stat_nb_write) ++;
#endif    

            Taddress_t address;
            if (_param->_have_port_address)
              address = PORT_READ(in_WRITE_ADDRESS[i]);
            else
              address = 0;

            Tdata_t    data    = PORT_READ(in_WRITE_DATA   [i]);
            
            log_printf(TRACE,RegisterFile,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data));

            // Write in registerFile
            reg_DATA[address] = data;
          }
      }
    for (uint32_t i=0; i<_param->_nb_port_read_write; i++)
      {
        // Have a read_write?
        if (PORT_READ(in_READ_WRITE_VAL[i]) == true)
          {
            if (PORT_READ(in_READ_WRITE_RW [i]) == RW_WRITE)
              {
#ifdef STATISTICS
                if (usage_is_set(_usage,USE_STATISTICS))
                  (*_stat_nb_write) ++;
#endif    
                
                Taddress_t address;
                if (_param->_have_port_address)
                  address = PORT_READ(in_READ_WRITE_ADDRESS[i]);
                else
                  address = 0;
                Tdata_t    data    = PORT_READ(in_READ_WRITE_WDATA  [i]);
                
                log_printf(TRACE,RegisterFile,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data));
                
                // Write in registerFile
                reg_DATA[address] = data;
              }
#ifdef STATISTICS
            else
              {
                if (usage_is_set(_usage,USE_STATISTICS))
                  (*_stat_nb_read) ++;
              }
#endif    
          }
      }

#ifdef STATISTICS
    if (usage_is_set(_usage,USE_STATISTICS))
      for (uint32_t i=0; i<_param->_nb_port_read; i++)
        if ( PORT_READ(in_READ_VAL [i]) == 1)
          (*_stat_nb_read) ++;
#endif    

#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
    end_cycle();
#endif
    log_printf(FUNC,RegisterFile,"transition","End");
  };

}; // end namespace registerfile_monolithic
}; // end namespace registerfile 
}; // end namespace generic
}; // end namespace behavioural          
}; // end namespace morpheo              
#endif