source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_testbench_transition.cpp @ 36

#ifdef VHDL_TESTBENCH
/*
 * $Id$
 *
 * [ Description ]
 * 
 */

#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h"

namespace morpheo                    {
namespace behavioural                {
namespace generic                    {
namespace registerfile               {
namespace registerfile_monolithic    {

  void RegisterFile_Monolithic::vhdl_testbench_transition (Vhdl_Testbench & vhdl_testbench)
  {
#ifndef SYSTEMCASS_SPECIFIC
    sc_cycle(0);
#endif
    vhdl_testbench.add_input (PORT_READ( in_NRESET));

    for (uint32_t i = 0; i < _param._nb_port_read ; i ++)
      {
        vhdl_testbench.add_input (PORT_READ( in_READ_VAL     [i]));
        vhdl_testbench.add_output(PORT_READ(out_READ_ACK     [i]));
        vhdl_testbench.add_input (PORT_READ( in_READ_ADDRESS [i]));
        vhdl_testbench.add_output(PORT_READ(out_READ_DATA    [i]));
      }
    for (uint32_t i = 0; i < _param._nb_port_write; i ++)
      {
        vhdl_testbench.add_input (PORT_READ( in_WRITE_VAL    [i]));
        vhdl_testbench.add_output(PORT_READ(out_WRITE_ACK    [i]));
        vhdl_testbench.add_input (PORT_READ( in_WRITE_ADDRESS[i]));
        vhdl_testbench.add_input (PORT_READ( in_WRITE_DATA   [i]));
      }

    vhdl_testbench.add_test(true);

    vhdl_testbench.new_cycle (); // always at the end
  };

}; // end namespace registerfile_monolithic
}; // end namespace registerfile 
}; // end namespace generic
}; // end namespace behavioural          
}; // end namespace morpheo              
#endif