source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src/RegisterFile_Multi_Banked_Glue.cpp @ 19

Last change on this file since 19 was 15, checked in by rosiere, 17 years ago

Interface normalisé
Début du banc de registres multi niveaux
File size: 4.7 KB
Line 
1/*
2 * $Id$
3 *
4 * [ Description ]
5 *
6 */
7
8#include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/include/RegisterFile_Multi_Banked_Glue.h"
9
10namespace morpheo                    {
11namespace behavioural {
12namespace generic {
13namespace registerfile{
14namespace registerfile_multi_banked {
15namespace registerfile_multi_banked_glue {
16
17
18#ifdef SYSTEMC
19  RegisterFile_Multi_Banked_Glue::RegisterFile_Multi_Banked_Glue (sc_module_name name,
20#else
21  RegisterFile_Multi_Banked_Glue::RegisterFile_Multi_Banked_Glue (string name,
22#endif
23#ifdef STATISTICS
24                              morpheo::behavioural::Parameters_Statistics             param_statistics,
25#endif
26                              morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::Parameters param ):
27                              _name              (name)
28                              ,_param            (param)
29// #ifdef STATISTICS
30//                            ,_param_statistics (param_statistics)
31// #endif
32  {
33    log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Begin");
34
35#ifdef STATISTICS
36    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Allocation of statistics");
37
38    // Allocation of statistics
39    _stat = new Statistics (static_cast<string>(_name),
40                            param_statistics          ,
41                            param);
42#endif
43
44#ifdef VHDL_TESTBENCH
45    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Creation of a testbench");
46
47    // Creation of a testbench
48    //  -> port
49    //  -> clock's signals
50    _vhdl_testbench = new Vhdl_Testbench (_name);
51#endif
52
53#ifdef VHDL
54    // generate the vhdl
55    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Generate the vhdl");
56
57    vhdl();
58#endif
59
60#ifdef VHDL_TESTBENCH
61    _vhdl_testbench->set_clock    ("in_CLOCK",false);
62#endif
63
64#ifdef SYSTEMC
65    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Allocation");
66
67    allocation ();
68
69#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
70    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Method - transition");
71
72    SC_METHOD (transition);
73    dont_initialize ();
74    sensitive_pos << *(in_CLOCK);
75#endif
76
77    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Method - transition");
78
79    SC_METHOD (genMealy_read_in);
80    dont_initialize ();
81    for (uint32_t l=0; l<_param._nb_port_read; l++)
82      sensitive << (*(in_READ_IN_ADDRESS [l]));
83    for (uint32_t i=0; i<_param._nb_bank; i++)
84       for (uint32_t j=0; j<_param._nb_port_read_by_bank; j++)
85         {
86           sensitive << (*(in_READ_OUT_ACK      [i][j]))
87                     << (*(in_READ_OUT_DATA     [i][j]));
88           for (uint32_t k=0; k<_param._nb_port_select_by_bank_read_port[j]; k++)
89             sensitive << (*(in_READ_SELECT_ACK [i][j][k]));
90         }
91
92#ifdef SYSTEMCASS_SPECIFIC
93    // List dependency information
94    for (uint32_t l=0; l<_param._nb_port_read; l++)
95      {
96        (*(out_READ_IN_ACK  [l])) (*(in_READ_IN_ADDRESS [l]));
97        (*(out_READ_IN_DATA [l])) (*(in_READ_IN_ADDRESS [l]));
98
99        for (uint32_t i=0; i<_param._nb_bank; i++)
100          for (uint32_t j=0; j<_param._nb_port_read_by_bank; j++)
101            {
102              (*(out_READ_IN_ACK  [l])) (*(in_READ_OUT_ACK      [i][j]));
103              (*(out_READ_IN_DATA [l])) (*(in_READ_OUT_DATA     [i][j]));
104              for (uint32_t k=0; k<_param._nb_port_select_by_bank_read_port[j]; k++)
105                {
106                  (*(out_READ_IN_ACK  [l])) (*(in_READ_SELECT_ACK [i][j][k]));
107                  (*(out_READ_IN_DATA [l])) (*(in_READ_SELECT_ACK [i][j][k]));
108                }
109            }
110      }
111#endif   
112
113#endif
114    log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","End");
115  };
116 
117  RegisterFile_Multi_Banked_Glue::~RegisterFile_Multi_Banked_Glue (void)
118  {
119    log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"~RegisterFile_Multi_Banked_Glue","Begin");
120
121#ifdef VHDL_TESTBENCH
122    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"~RegisterFile_Multi_Banked_Glue","Generate Testbench  file");
123
124    // generate the test bench
125    _vhdl_testbench->generate_file();
126    delete _vhdl_testbench;
127#endif
128
129#ifdef STATISTICS
130    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"~RegisterFile_Multi_Banked_Glue","Generate Statistics file");
131
132    _stat->generate_file(statistics(0));
133   
134    delete _stat;
135#endif
136
137#ifdef SYSTEMC
138    log_printf(INFO,RegisterFile_Multi_Banked_Glue,"~RegisterFile_Multi_Banked_Glue","Deallocation");
139
140    deallocation ();
141#endif
142
143    log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"~RegisterFile_Multi_Banked_Glue","End");
144  };
145
146}; // end namespace registerfile_multi_banked_glue
147}; // end namespace registerfile_multi_banked
148}; // end namespace registerfile
149}; // end namespace generic
150
151}; // end namespace behavioural
152}; // end namespace morpheo             
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