[53] | 1 | /* |
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| 2 | * $Id$ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | #include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h" |
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| 9 | #include "Common/include/BitManipulation.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace generic { |
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| 14 | namespace registerfile { |
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| 15 | namespace registerfile_multi_banked { |
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| 16 | |
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| 17 | |
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| 18 | Parameters::Parameters (uint32_t nb_port_read , |
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| 19 | uint32_t nb_port_write , |
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| 20 | uint32_t nb_word , |
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| 21 | uint32_t size_word , |
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| 22 | uint32_t nb_bank , |
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| 23 | uint32_t nb_port_read_by_bank , |
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| 24 | uint32_t nb_port_write_by_bank, |
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| 25 | Tcrossbar_t crossbar ): |
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| 26 | _nb_port_read (nb_port_read ), |
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| 27 | _nb_port_write (nb_port_write ), |
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| 28 | _nb_word (nb_word ), |
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| 29 | _size_word (size_word ), |
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| 30 | _nb_bank (nb_bank ), |
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| 31 | _nb_port_read_by_bank (nb_port_read_by_bank ), |
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| 32 | _nb_port_write_by_bank (nb_port_write_by_bank), |
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| 33 | _crossbar (crossbar ), |
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| 34 | _size_address (static_cast<uint32_t>(ceil(log2(_nb_word)))), |
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| 35 | _size_address_by_bank (_size_address - static_cast<uint32_t>(ceil(log2(_nb_bank)))), |
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| 36 | |
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| 37 | // Address : [....................] [size_address-1:0] |
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| 38 | // Bank : [....] [size_address-1:size_address-1-log2(nb_bank)] |
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| 39 | // num_reg : ]...............] [size_address-2-log2(nb_bank):0] |
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| 40 | _bank_shift (_size_address_by_bank), |
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| 41 | _bank_mask (gen_mask<Taddress_t>(static_cast<Taddress_t>(ceil(log2(_nb_bank))))), |
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| 42 | _num_reg_shift (0), |
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| 43 | _num_reg_mask (gen_mask<Taddress_t>(_size_address_by_bank)), |
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[62] | 44 | _nb_word_by_bank (_nb_word / _nb_bank), |
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| 45 | _have_port_address (_size_address != 0), |
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| 46 | _have_bank_port_address(_size_address_by_bank != 0) |
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[53] | 47 | { |
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| 48 | log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters","Begin"); |
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| 49 | |
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| 50 | if (_crossbar == PARTIAL_CROSSBAR) |
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| 51 | { |
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[62] | 52 | log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters","Case : _crossbar == PARTIAL_CROSSBAR"); |
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[53] | 53 | |
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| 54 | // All port_src is connected with one port_dest on each bank |
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| 55 | |
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| 56 | _link_port_read_to_bank_read = new uint32_t [_nb_port_read ]; |
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| 57 | _link_port_write_to_bank_write = new uint32_t [_nb_port_write]; |
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| 58 | |
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| 59 | // init |
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[57] | 60 | for (uint32_t i=0; i<_nb_port_read ;i++) |
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[53] | 61 | { |
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| 62 | uint32_t x = i%_nb_port_read_by_bank; |
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| 63 | _link_port_read_to_bank_read [i] = x; |
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| 64 | } |
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[57] | 65 | for (uint32_t i=0; i<_nb_port_write;i++) |
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[53] | 66 | { |
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| 67 | uint32_t x = i%_nb_port_write_by_bank; |
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| 68 | _link_port_write_to_bank_write [i] = x; |
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| 69 | } |
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| 70 | |
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| 71 | |
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[62] | 72 | log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_read_to_bank_read"); |
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[53] | 73 | for (uint32_t i=0; i<_nb_port_read ;i++) |
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[57] | 74 | { |
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[62] | 75 | log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters"," * Read in [%d] to out [%d]",i,_link_port_read_to_bank_read [i]); |
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[57] | 76 | } |
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[62] | 77 | log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_write_to_bank_write"); |
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[53] | 78 | for (uint32_t i=0; i<_nb_port_write ;i++) |
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[57] | 79 | { |
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[62] | 80 | log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters"," * Write in [%d] to out [%d]",i,_link_port_write_to_bank_write [i]); |
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[57] | 81 | } |
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[53] | 82 | } |
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| 83 | // else : don't allocate |
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| 84 | |
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| 85 | test(); |
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| 86 | log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters","End"); |
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| 87 | }; |
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| 88 | |
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| 89 | Parameters::Parameters (Parameters & param): |
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| 90 | _nb_port_read (param._nb_port_read ), |
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| 91 | _nb_port_write (param._nb_port_write ), |
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| 92 | _nb_word (param._nb_word ), |
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| 93 | _size_word (param._size_word ), |
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| 94 | _nb_bank (param._nb_bank ), |
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| 95 | _nb_port_read_by_bank (param._nb_port_read_by_bank ), |
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| 96 | _nb_port_write_by_bank (param._nb_port_write_by_bank), |
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| 97 | _crossbar (param._crossbar ), |
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| 98 | _size_address (param._size_address ), |
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| 99 | _size_address_by_bank (param._size_address_by_bank ), |
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| 100 | _bank_shift (param._bank_shift ), |
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| 101 | _bank_mask (param._bank_mask ), |
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| 102 | _num_reg_shift (param._num_reg_shift ), |
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| 103 | _num_reg_mask (param._num_reg_mask ), |
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[62] | 104 | _nb_word_by_bank (param._nb_word_by_bank ), |
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| 105 | _have_port_address (param._have_port_address ), |
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| 106 | _have_bank_port_address(param._have_bank_port_address) |
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[53] | 107 | { |
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| 108 | log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters (copy)","Begin"); |
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| 109 | |
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| 110 | if (_crossbar == PARTIAL_CROSSBAR) |
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| 111 | { |
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| 112 | // All port_src is connected with one port_dest on each bank |
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| 113 | |
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| 114 | _link_port_read_to_bank_read = new uint32_t [_nb_port_read ]; |
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| 115 | // _link_port_read_to_num_bank = new uint32_t [_nb_port_read ]; |
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| 116 | _link_port_write_to_bank_write = new uint32_t [_nb_port_write]; |
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| 117 | // _link_port_write_to_num_bank = new uint32_t [_nb_port_write]; |
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| 118 | |
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| 119 | for (uint32_t i=0; i<_nb_port_read ;i++) |
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| 120 | { |
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| 121 | _link_port_read_to_bank_read [i] = param._link_port_read_to_bank_read [i]; |
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| 122 | // _link_port_read_to_num_bank [i] = param._link_port_read_to_num_bank [i]; |
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| 123 | } |
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| 124 | for (uint32_t i=0; i<_nb_port_write ;i++) |
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| 125 | { |
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| 126 | _link_port_write_to_bank_write [i] = param._link_port_write_to_bank_write [i]; |
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| 127 | // _link_port_write_to_num_bank [i] = param._link_port_write_to_num_bank [i]; |
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| 128 | } |
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| 129 | } |
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| 130 | |
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| 131 | test(); |
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| 132 | log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters (copy)","End"); |
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| 133 | }; |
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| 134 | |
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| 135 | Parameters::~Parameters () |
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| 136 | { |
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| 137 | log_printf(FUNC,RegisterFile_Multi_Banked,"~Parameters","Begin"); |
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| 138 | |
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| 139 | if (_crossbar == PARTIAL_CROSSBAR) |
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| 140 | { |
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| 141 | delete [] _link_port_read_to_bank_read ; |
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| 142 | // delete [] _link_port_read_to_num_bank ; |
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| 143 | delete [] _link_port_write_to_bank_write ; |
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| 144 | // delete [] _link_port_write_to_num_bank ; |
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| 145 | } |
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| 146 | log_printf(FUNC,RegisterFile_Multi_Banked,"~Parameters","End"); |
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| 147 | }; |
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| 148 | |
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| 149 | }; // end namespace registerfile_multi_banked |
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| 150 | }; // end namespace registerfile |
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| 151 | }; // end namespace generic |
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| 152 | |
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| 153 | }; // end namespace behavioural |
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| 154 | }; // end namespace morpheo |
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