1 | /* |
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2 | * $Id: RegisterFile_Multi_Banked_allocation.cpp 88 2008-12-10 18:31:39Z rosiere $ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | */ |
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7 | |
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8 | #include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h" |
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9 | |
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10 | namespace morpheo { |
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11 | namespace behavioural { |
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12 | namespace generic { |
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13 | namespace registerfile { |
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14 | namespace registerfile_multi_banked { |
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15 | |
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16 | |
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17 | void RegisterFile_Multi_Banked::allocation (void) |
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18 | { |
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19 | log_printf(FUNC,RegisterFile_Multi_Banked,"allocation","Begin"); |
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20 | |
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21 | _component = new Component (_usage); |
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22 | |
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23 | Entity * entity = _component->set_entity (_name |
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24 | ,"RegisterFile_Multi_Banked" |
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25 | #ifdef POSITION |
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26 | ,REGISTER |
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27 | #endif |
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28 | ); |
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29 | |
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30 | _interfaces = entity->set_interfaces(); |
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31 | |
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32 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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33 | |
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34 | Interface * interface = _interfaces->set_interface("" |
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35 | #ifdef POSITION |
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36 | ,IN |
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37 | ,SOUTH, |
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38 | "Generalist interface" |
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39 | #endif |
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40 | ); |
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41 | |
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42 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
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43 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
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44 | |
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45 | // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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46 | |
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47 | in_READ_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_read]; |
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48 | out_READ_ACK = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read]; |
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49 | if (_param->_have_port_address == true) |
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50 | in_READ_ADDRESS = new SC_IN (Taddress_t) * [_param->_nb_port_read]; |
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51 | out_READ_DATA = new SC_OUT(Tdata_t ) * [_param->_nb_port_read]; |
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52 | |
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53 | for (uint32_t i=0; i<_param->_nb_port_read; i++) |
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54 | { |
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55 | Interface_fifo * interface = _interfaces->set_interface("read_"+toString(i) |
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56 | #ifdef POSITION |
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57 | , IN |
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58 | ,WEST |
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59 | , "Interface Read" |
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60 | #endif |
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61 | ); |
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62 | |
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63 | in_READ_VAL [i] = interface->set_signal_valack_in ("val" , VAL); |
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64 | out_READ_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); |
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65 | if (_param->_have_port_address == true) |
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66 | in_READ_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", static_cast<uint32_t>(log2(_param->_nb_word))); |
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67 | out_READ_DATA [i] = interface->set_signal_out <Tdata_t > ("data" , _param->_size_word); |
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68 | } |
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69 | |
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70 | // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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71 | |
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72 | in_WRITE_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_write]; |
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73 | out_WRITE_ACK = new SC_OUT(Tcontrol_t) * [_param->_nb_port_write]; |
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74 | if (_param->_have_port_address == true) |
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75 | in_WRITE_ADDRESS = new SC_IN (Taddress_t) * [_param->_nb_port_write]; |
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76 | in_WRITE_DATA = new SC_IN (Tdata_t ) * [_param->_nb_port_write]; |
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77 | |
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78 | for (uint32_t i=0; i<_param->_nb_port_write; i++) |
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79 | { |
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80 | Interface_fifo * interface = _interfaces->set_interface("write_"+toString(i) |
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81 | #ifdef POSITION |
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82 | , IN |
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83 | ,EAST |
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84 | , "Interface Write" |
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85 | #endif |
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86 | ); |
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87 | |
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88 | in_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); |
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89 | out_WRITE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); |
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90 | if (_param->_have_port_address == true) |
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91 | in_WRITE_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", static_cast<uint32_t>(log2(_param->_nb_word))); |
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92 | in_WRITE_DATA [i] = interface->set_signal_in <Tdata_t > ("data" , _param->_size_word); |
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93 | } |
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94 | |
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95 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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96 | { |
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97 | // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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98 | |
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99 | reg_DATA = new Tdata_t * [_param->_nb_bank]; |
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100 | |
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101 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
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102 | { |
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103 | reg_DATA [i] = new Tdata_t [_param->_nb_word]; |
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104 | } |
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105 | |
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106 | // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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107 | internal_WRITE_VAL = new bool [_param->_nb_port_write]; |
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108 | internal_WRITE_BANK = new Taddress_t [_param->_nb_port_write]; |
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109 | internal_WRITE_NUM_REG = new Taddress_t [_param->_nb_port_write]; |
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110 | } |
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111 | |
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112 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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113 | |
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114 | #ifdef POSITION |
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115 | if (usage_is_set(_usage,USE_POSITION)) |
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116 | _component->generate_file(); |
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117 | #endif |
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118 | |
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119 | log_printf(FUNC,RegisterFile_Multi_Banked,"allocation","End"); |
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120 | }; |
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121 | |
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122 | }; // end namespace registerfile_multi_banked |
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123 | }; // end namespace registerfile |
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124 | }; // end namespace generic |
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125 | |
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126 | }; // end namespace behavioural |
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127 | }; // end namespace morpheo |
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