1 | #ifdef SYSTEMC |
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2 | //#if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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3 | /* |
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4 | * $Id$ |
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5 | * |
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6 | * [ Description ] |
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7 | * |
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8 | */ |
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9 | |
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10 | #include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h" |
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11 | |
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12 | namespace morpheo { |
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13 | namespace behavioural { |
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14 | namespace generic { |
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15 | namespace registerfile { |
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16 | namespace registerfile_multi_banked { |
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17 | |
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18 | |
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19 | void RegisterFile_Multi_Banked::partial_crossbar_genMealy_write (void) |
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20 | { |
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21 | log_printf(FUNC,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write","Begin"); |
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22 | |
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23 | bool write_port_use [_param->_nb_bank][_param->_nb_port_write_by_bank]; |
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24 | for (uint32_t i=0; i<_param->_nb_bank; i++) |
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25 | for (uint32_t j=0; j<_param->_nb_port_write_by_bank; j++) |
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26 | write_port_use [i][j]=false; |
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27 | |
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28 | for (uint32_t i=0; i<_param->_nb_port_write; i++) |
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29 | { |
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30 | bool val = PORT_READ(in_WRITE_VAL [i]); |
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31 | bool ack = false; |
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32 | |
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33 | log_printf(TRACE,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write","write[%d] : %d",i,val); |
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34 | |
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35 | if (val == true) |
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36 | { |
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37 | val = false; |
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38 | // Compute the adress of the bank |
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39 | Taddress_t address; |
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40 | if (_param->_have_port_address == true) |
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41 | address = PORT_READ(in_WRITE_ADDRESS[i]); |
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42 | else |
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43 | address = 0; |
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44 | log_printf(TRACE,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write"," * address : %d",address); |
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45 | Taddress_t bank = address_bank (address); |
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46 | log_printf(TRACE,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write"," * bank : %d",bank ); |
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47 | |
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48 | // // Search loop |
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49 | // for (uint32_t j=0; j<_param->_nb_port_write_by_bank; j++) |
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50 | // { |
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51 | uint32_t j = _param->_link_port_write_to_bank_write [i]; |
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52 | |
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53 | // find a unbusy port on this bank |
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54 | if (write_port_use[bank][j] == false) |
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55 | { |
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56 | // find !!! |
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57 | write_port_use[bank][j] = true; |
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58 | val = true; |
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59 | ack = true; |
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60 | |
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61 | Taddress_t num_reg = address_num_reg (address); |
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62 | |
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63 | log_printf(TRACE,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write"," * num_reg : %d",num_reg); |
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64 | log_printf(TRACE,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write"," * bank_port : %d",j ); |
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65 | |
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66 | internal_WRITE_NUM_REG [i] = num_reg; |
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67 | |
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68 | // break; |
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69 | } |
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70 | // } |
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71 | |
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72 | internal_WRITE_BANK [i] = bank; |
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73 | } |
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74 | |
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75 | internal_WRITE_VAL [i] = val; |
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76 | |
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77 | // Write output |
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78 | PORT_WRITE(out_WRITE_ACK [i], ack); |
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79 | } |
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80 | |
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81 | log_printf(FUNC,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write","End"); |
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82 | }; |
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83 | |
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84 | }; // end namespace registerfile_multi_banked |
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85 | }; // end namespace registerfile |
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86 | }; // end namespace generic |
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87 | |
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88 | }; // end namespace behavioural |
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89 | }; // end namespace morpheo |
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90 | #endif |
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91 | //#endif |
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