[2] | 1 | /* |
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| 2 | * $Id$ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | #include "Behavioural/Generic/RegisterFile/include/RegisterFile.h" |
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| 9 | |
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| 10 | namespace morpheo { |
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| 11 | namespace behavioural { |
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| 12 | namespace generic { |
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| 13 | namespace registerfile { |
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| 14 | |
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| 15 | #ifdef SYSTEMC |
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| 16 | RegisterFile::RegisterFile (sc_module_name name, |
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| 17 | #else |
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| 18 | RegisterFile::RegisterFile (string name , |
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| 19 | #endif |
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| 20 | #ifdef STATISTICS |
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| 21 | morpheo::behavioural::Parameters_Statistics param_statistics, |
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| 22 | #endif |
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| 23 | morpheo::behavioural::generic::registerfile::Parameters param ): |
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| 24 | _name (name) |
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| 25 | ,_param (param) |
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| 26 | { |
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| 27 | #ifdef STATISTICS |
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| 28 | _stat = new Statistics (static_cast<string>(_name), |
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| 29 | param_statistics , |
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| 30 | param); |
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| 31 | #endif |
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| 32 | |
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| 33 | #ifdef VHDL_TESTBENCH |
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| 34 | _vhdl_testbench = new Vhdl_Testbench (_name); |
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| 35 | vhdl_testbench_port (*_vhdl_testbench); |
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| 36 | _vhdl_testbench->set_clock ("in_CLOCK",true); |
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| 37 | #endif |
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| 38 | |
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| 39 | #ifdef VHDL |
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| 40 | // generate the vhdl |
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| 41 | vhdl(); |
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| 42 | #endif |
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| 43 | |
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| 44 | #ifdef SYSTEMC |
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| 45 | allocation (); |
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| 46 | |
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| 47 | SC_METHOD (transition); |
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| 48 | dont_initialize (); |
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| 49 | sensitive_pos << *(in_CLOCK); |
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| 50 | |
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| 51 | SC_METHOD (genMealy_read); |
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| 52 | dont_initialize (); |
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| 53 | sensitive_neg << *(in_CLOCK); |
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| 54 | for (uint32_t i=0; i<_param._nb_port_read; i++) |
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[6] | 55 | sensitive << *(in_READ_VAL [i]) |
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[2] | 56 | << *(in_READ_ADDRESS [i]); |
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| 57 | |
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| 58 | #ifdef SYSTEMCASS_SPECIFIC |
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| 59 | // List dependency information |
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| 60 | for (uint32_t i=0; i<_param._nb_port_read; i++) |
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| 61 | { |
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[6] | 62 | (*(out_READ_DATA [i])) (*( in_READ_VAL [i])); |
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[2] | 63 | (*(out_READ_DATA [i])) (*( in_READ_ADDRESS [i])); |
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| 64 | } |
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| 65 | #endif |
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[6] | 66 | |
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| 67 | for (uint32_t i=0; i<_param._nb_port_read ; i++) |
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| 68 | PORT_WRITE(out_READ_ACK [i], 1); |
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| 69 | for (uint32_t i=0; i<_param._nb_port_write; i++) |
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| 70 | PORT_WRITE(out_WRITE_ACK [i], 1); |
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[2] | 71 | #endif |
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| 72 | }; |
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| 73 | |
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| 74 | RegisterFile::~RegisterFile (void) |
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| 75 | { |
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| 76 | #ifdef SYSTEMC |
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| 77 | deallocation (); |
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| 78 | #endif |
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| 79 | |
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| 80 | #ifdef VHDL_TESTBENCH |
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| 81 | // generate the test bench |
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| 82 | _vhdl_testbench->generate_file(); |
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| 83 | delete _vhdl_testbench; |
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| 84 | #endif |
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| 85 | |
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| 86 | #ifdef STATISTICS |
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| 87 | _stat->generate_file(statistics(0)); |
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| 88 | delete _stat; |
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| 89 | #endif |
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| 90 | }; |
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| 91 | |
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| 92 | }; // end namespace registerfile |
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| 93 | }; // end namespace generic |
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| 94 | }; // end namespace behavioural |
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| 95 | }; // end namespace morpheo |
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