Rev | Line | |
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[2] | 1 | #ifdef VHDL |
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| 2 | /* |
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| 3 | * $Id$ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Generic/RegisterFile/include/RegisterFile.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace generic { |
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| 14 | namespace registerfile { |
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| 15 | |
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| 16 | void RegisterFile::vhdl_port (Vhdl & vhdl) |
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| 17 | { |
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| 18 | vhdl.set_port ("in_CLOCK", IN, "std_logic"); |
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| 19 | |
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| 20 | for (uint32_t i = 0; i < _param._nb_port_read; i ++) |
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| 21 | { |
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| 22 | vhdl.set_port (" in_READ_ENABLE_"+toString(i)+" ",IN ,std_logic(1) ); |
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| 23 | vhdl.set_port (" in_READ_ADDRESS_"+toString(i)+"",IN ,std_logic(static_cast<uint32_t>(log2(_param._nb_word)))); |
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| 24 | vhdl.set_port ("out_READ_DATA_"+toString(i)+" ",OUT,std_logic(_param._size_word )); |
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| 25 | } |
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| 26 | |
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| 27 | for (uint32_t i = 0; i < _param._nb_port_write; i ++) |
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| 28 | { |
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| 29 | vhdl.set_port (" in_WRITE_ENABLE_"+toString(i)+" ",IN ,std_logic(1) ); |
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| 30 | vhdl.set_port (" in_WRITE_ADDRESS_"+toString(i)+"",IN ,std_logic(static_cast<uint32_t>(log2(_param._nb_word)))); |
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| 31 | vhdl.set_port (" in_WRITE_DATA_"+toString(i)+" ",IN ,std_logic(_param._size_word )); |
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| 32 | } |
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| 33 | }; |
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| 34 | |
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| 35 | }; // end namespace registerfile |
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| 36 | }; // end namespace generic |
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| 37 | }; // end namespace behavioural |
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| 38 | }; // end namespace morpheo |
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| 39 | #endif |
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