1 | /* |
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2 | * $Id$ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | */ |
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7 | |
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8 | #include "Behavioural/Generic/Victim/Pseudo_LRU/include/Pseudo_LRU.h" |
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9 | |
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10 | namespace morpheo { |
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11 | namespace behavioural { |
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12 | namespace generic { |
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13 | namespace victim { |
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14 | namespace pseudo_lru { |
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15 | |
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16 | #ifdef SYSTEMC |
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17 | Pseudo_LRU::Pseudo_LRU (sc_module_name name, |
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18 | #else |
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19 | Pseudo_LRU::Pseudo_LRU (string name, |
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20 | #endif |
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21 | #ifdef STATISTICS |
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22 | morpheo::behavioural::Parameters_Statistics param_statistics, |
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23 | #endif |
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24 | morpheo::behavioural::generic::victim::pseudo_lru::Parameters param ): |
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25 | _name (name) |
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26 | ,_param (param) |
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27 | { |
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28 | log_printf(FUNC,Pseudo_LRU,"Pseudo_LRU","Begin"); |
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29 | |
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30 | #ifdef STATISTICS |
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31 | log_printf(TRACE,Pseudo_LRU,"Pseudo_LRU","Allocation of statistics"); |
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32 | |
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33 | // Allocation of statistics |
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34 | _stat = new Statistics (static_cast<string>(_name), |
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35 | param_statistics , |
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36 | param); |
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37 | #endif |
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38 | |
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39 | #ifdef VHDL_TESTBENCH |
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40 | // Creation of a testbench |
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41 | // -> port |
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42 | // -> clock's signals |
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43 | log_printf(TRACE,Pseudo_LRU,"Pseudo_LRU","Creation of Testbench"); |
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44 | _vhdl_testbench = new Vhdl_Testbench (_name); |
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45 | vhdl_testbench_port (*_vhdl_testbench); |
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46 | _vhdl_testbench->set_clock ("in_CLOCK",true); |
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47 | #endif |
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48 | |
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49 | #ifdef VHDL |
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50 | // generate the vhdl |
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51 | log_printf(TRACE,Pseudo_LRU,"Pseudo_LRU","Generation of VHDL"); |
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52 | vhdl(); |
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53 | #endif |
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54 | |
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55 | #ifdef SYSTEMC |
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56 | log_printf(TRACE,Pseudo_LRU,"Pseudo_LRU","Allocation"); |
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57 | allocation (); |
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58 | |
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59 | log_printf(TRACE,Pseudo_LRU,"Pseudo_LRU","Definition of sc_method"); |
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60 | SC_METHOD (transition); |
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61 | dont_initialize (); |
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62 | sensitive_pos << *(in_CLOCK); |
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63 | |
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64 | SC_METHOD (genMealy_access); |
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65 | dont_initialize (); |
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66 | sensitive_neg << *(in_CLOCK); |
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67 | for (uint32_t i=0; i<_param._nb_access; i++) |
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68 | { |
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69 | sensitive << *(in_ACCESS_VAL [i]); |
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70 | if (_param._size_table>1) |
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71 | sensitive << *(in_ACCESS_ADDRESS [i]); |
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72 | } |
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73 | |
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74 | #ifdef SYSTEMCASS_SPECIFIC |
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75 | log_printf(TRACE,Pseudo_LRU,"Pseudo_LRU","List dependency information"); |
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76 | // List dependency information |
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77 | for (uint32_t i=0; i<_param._nb_access; i++) |
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78 | { |
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79 | (*(out_ACCESS_ENTITY [i])) (*( in_ACCESS_VAL [i])); |
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80 | if (_param._size_table>1) |
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81 | (*(out_ACCESS_ENTITY [i])) (*( in_ACCESS_ADDRESS [i])); |
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82 | } |
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83 | #endif |
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84 | |
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85 | // Constant - ack is always at one |
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86 | for (uint32_t i=0; i<_param._nb_access; i++) |
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87 | PORT_WRITE (out_ACCESS_ACK [i], 1); |
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88 | for (uint32_t i=0; i<_param._nb_update; i++) |
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89 | PORT_WRITE (out_UPDATE_ACK [i], 1); |
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90 | |
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91 | #endif |
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92 | log_printf(FUNC,Pseudo_LRU,"Pseudo_LRU","End"); |
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93 | }; |
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94 | |
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95 | Pseudo_LRU::~Pseudo_LRU (void) |
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96 | { |
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97 | log_printf(FUNC,Pseudo_LRU,"~Pseudo_LRU","Begin"); |
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98 | #ifdef SYSTEMC |
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99 | deallocation (); |
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100 | #endif |
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101 | |
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102 | #ifdef VHDL_TESTBENCH |
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103 | // generate the test bench |
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104 | _vhdl_testbench->generate_file(); |
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105 | delete _vhdl_testbench; |
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106 | #endif |
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107 | |
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108 | #ifdef STATISTICS |
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109 | _stat->generate_file(statistics(0)); |
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110 | |
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111 | delete _stat; |
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112 | #endif |
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113 | log_printf(FUNC,Pseudo_LRU,"~Pseudo_LRU","End"); |
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114 | }; |
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115 | |
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116 | }; // end namespace pseudo_lru |
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117 | }; // end namespace victim |
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118 | }; // end namespace generic |
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119 | }; // end namespace behavioural |
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120 | }; // end namespace morpheo |
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