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Last change
on this file since 23 was
23,
checked in by rosiere, 17 years ago
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Documentation pour chaque composant.
Documentation : ajout d'un poster et d'un article.
RegisterFile_Multi_Banked_Glue - non encore stable.
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File size:
980 bytes
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| 1 | # |
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| 2 | # $Id$ |
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| 3 | # |
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| 4 | # [ Description ] |
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| 5 | # |
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| 6 | |
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| 7 | #-----[ Simulator ]---------------------------------------- |
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| 8 | SIMULATOR = systemcass_deps |
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| 9 | |
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| 10 | # 3 simulators : |
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| 11 | # systemc - SystemC |
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| 12 | # systemcass - SystemCASS |
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| 13 | # systemcass_deps - SystemCASS, and use port dependency information instead of sensitivity list |
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| 14 | |
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| 15 | #-----[ Flags ]-------------------------------------------- |
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| 16 | FLAGS = -DVHDL \ |
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| 17 | -DVHDL_TESTBENCH \ |
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| 18 | -DSYSTEMC \ |
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| 19 | -DSTATISTICS \ |
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| 20 | -DCONFIGURATION \ |
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| 21 | -DDEBUG=DEBUG_ALL |
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| 22 | |
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| 23 | # Flags : |
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| 24 | # DEBUG={level} - Print Debug Message |
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| 25 | # VHDL - To generate a vhdl's model |
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| 26 | # SYSTEMC - To generate a systemc's model |
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| 27 | # CONFIGURATION - To generate a configuration file (it's input of viewer) |
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| 28 | # STATISTICS (need SYSTEMC) - In the simulation, generate a statistics's file |
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| 29 | # VHDL_TESTBENCH (need SYSTEMC) - In the simulation, generate two testbench's file (input and ouput) to validate the vhdl's model |
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