[2] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id$ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace stage_1_ifetch { |
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| 14 | namespace predictor { |
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| 15 | namespace meta_predictor { |
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| 16 | namespace two_level_branch_predictor { |
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| 17 | namespace branch_history_table { |
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| 18 | |
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| 19 | |
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| 20 | void Branch_History_Table::allocation (void) |
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| 21 | { |
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[42] | 22 | _component = new Component (); |
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[2] | 23 | |
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[42] | 24 | Entity * entity = _component->set_entity (_name |
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| 25 | ,"Branch_History_Table" |
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| 26 | #ifdef POSITION |
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| 27 | ,MIXTE |
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| 28 | #endif |
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| 29 | ); |
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| 30 | |
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| 31 | _interfaces = entity->set_interfaces(); |
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[2] | 32 | |
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[42] | 33 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 34 | { |
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| 35 | Interface * interface = _interfaces->set_interface("" |
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| 36 | #ifdef POSITION |
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| 37 | , IN |
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| 38 | , SOUTH |
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| 39 | , "Generalist interface" |
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| 40 | #endif |
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| 41 | ); |
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| 42 | |
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| 43 | in_CLOCK = interface->set_signal_clk ("clock" ,1); |
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| 44 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1,RESET_VHDL_YES); |
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| 45 | } |
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| 46 | |
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| 47 | // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[2] | 48 | in_PREDICT_VAL = new SC_IN (Tcontrol_t) * [_param._nb_prediction]; |
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| 49 | out_PREDICT_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_prediction]; |
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| 50 | in_PREDICT_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_prediction]; |
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| 51 | out_PREDICT_HISTORY = new SC_OUT(Thistory_t) * [_param._nb_prediction]; |
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| 52 | |
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| 53 | for (uint32_t i=0; i<_param._nb_prediction; i++) |
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| 54 | { |
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[42] | 55 | Interface_fifo * interface = _interfaces->set_interface("predict_"+toString(i) |
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| 56 | #ifdef POSITION |
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| 57 | , IN |
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| 58 | , WEST |
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| 59 | , "Interface Predict" |
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| 60 | #endif |
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| 61 | ); |
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[2] | 62 | |
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[42] | 63 | in_PREDICT_VAL [i] = interface->set_signal_valack_in ("val" , VAL); |
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| 64 | out_PREDICT_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); |
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| 65 | in_PREDICT_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", static_cast<uint32_t>(ceil(log2(_param._nb_shifter)))); |
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| 66 | out_PREDICT_HISTORY [i] = interface->set_signal_out <Thistory_t> ("history", _param._size_shifter); |
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| 67 | } |
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[2] | 68 | |
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[42] | 69 | // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[2] | 70 | |
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[42] | 71 | in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; |
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| 72 | out_BRANCH_COMPLETE_ACK = new SC_OUT (Tcontrol_t) * [_param._nb_branch_complete]; |
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| 73 | in_BRANCH_COMPLETE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_branch_complete]; |
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| 74 | in_BRANCH_COMPLETE_HISTORY = new SC_IN (Thistory_t) * [_param._nb_branch_complete]; |
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| 75 | in_BRANCH_COMPLETE_DIRECTION = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; |
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[2] | 76 | |
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| 77 | for (uint32_t i=0; i<_param._nb_branch_complete; i++) |
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| 78 | { |
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[42] | 79 | Interface_fifo * interface = _interfaces->set_interface("branch_complete_"+toString(i) |
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| 80 | #ifdef POSITION |
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| 81 | , IN |
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| 82 | , EAST |
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| 83 | , "Interface branch complete" |
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| 84 | #endif |
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| 85 | ); |
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[2] | 86 | |
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[42] | 87 | in_BRANCH_COMPLETE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); |
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| 88 | out_BRANCH_COMPLETE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); |
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| 89 | in_BRANCH_COMPLETE_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address" , static_cast<uint32_t>(ceil(log2(_param._nb_shifter)))); |
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| 90 | in_BRANCH_COMPLETE_HISTORY [i] = interface->set_signal_in <Thistory_t> ("history" , _param._size_shifter); |
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| 91 | in_BRANCH_COMPLETE_DIRECTION [i] = interface->set_signal_in <Tcontrol_t> ("direction", 1); |
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[2] | 92 | } |
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| 93 | |
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| 94 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 95 | string name_component; |
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[42] | 96 | |
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[2] | 97 | // =====[ component_Shifter ]========================================= |
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| 98 | |
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| 99 | name_component = _name+"_Shifter"; |
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| 100 | |
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[42] | 101 | component_Shifter = new morpheo::behavioural::generic::shifter::Shifter (name_component.c_str() |
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[2] | 102 | #ifdef STATISTICS |
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[42] | 103 | ,_param_statistics |
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[2] | 104 | #endif |
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[42] | 105 | ,*(_param._param_shifter)); |
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| 106 | |
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| 107 | _component->set_component (component_Shifter->_component |
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| 108 | #ifdef POSITION |
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| 109 | , 25 |
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| 110 | , 25 |
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| 111 | , 10 |
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| 112 | , 10 |
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[2] | 113 | #endif |
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[42] | 114 | ); |
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[2] | 115 | |
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| 116 | // =====[ component_RegisterFile ]==================================== |
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| 117 | |
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| 118 | name_component = _name+"_RegisterFile"; |
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| 119 | |
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[15] | 120 | component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic(name_component.c_str(), |
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[2] | 121 | #ifdef STATISTICS |
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[42] | 122 | _param_statistics , |
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[2] | 123 | #endif |
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[42] | 124 | *(_param._param_registerfile)); |
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| 125 | |
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| 126 | _component->set_component (component_RegisterFile->_component |
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| 127 | #ifdef POSITION |
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| 128 | , 75 |
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| 129 | , 75 |
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| 130 | , 10 |
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| 131 | , 10 |
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| 132 | #endif |
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| 133 | ); |
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[2] | 134 | |
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[42] | 135 | // ~~~~~[ Component - Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 136 | |
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| 137 | // =====[ component_RegisterFile - Instanciation ]==================== |
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| 138 | |
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| 139 | #ifdef POSITION |
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| 140 | _component->interface_map (_name+"_RegisterFile","", |
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| 141 | _name ,""); |
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| 142 | #endif |
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| 143 | |
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| 144 | _component->port_map(_name+"_RegisterFile", "in_CLOCK" , _name,"in_CLOCK" ); |
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| 145 | _component->port_map(_name+"_RegisterFile", "in_NRESET", _name,"in_NRESET"); |
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[2] | 146 | |
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| 147 | for (uint32_t i=0; i<_param._nb_prediction; i++) |
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| 148 | { |
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[42] | 149 | #ifdef POSITION |
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| 150 | _component->interface_map (_name+"_RegisterFile","read_" +toString(i), |
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| 151 | _name ,"predict_"+toString(i)); |
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| 152 | #endif |
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| 153 | |
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| 154 | _component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_VAL" , _name, "in_PREDICT_"+toString(i)+"_VAL" ); |
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| 155 | _component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_ACK" , _name,"out_PREDICT_"+toString(i)+"_ACK" ); |
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| 156 | _component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_ADDRESS", _name, "in_PREDICT_"+toString(i)+"_ADDRESS"); |
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| 157 | _component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_DATA" , _name,"out_PREDICT_"+toString(i)+"_HISTORY"); |
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[2] | 158 | } |
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| 159 | |
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| 160 | for (uint32_t i=0; i<_param._nb_branch_complete; i++) |
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| 161 | { |
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[42] | 162 | #ifdef POSITION |
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| 163 | _component->interface_map (_name+"_RegisterFile","write_" +toString(i), |
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| 164 | _name+"_Shifter" ,"shifter_"+toString(i)); |
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| 165 | #endif |
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| 166 | |
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| 167 | _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_VAL" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_VAL" ); |
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| 168 | _component->port_map(_name+"_RegisterFile","out_WRITE_"+toString(i)+"_ACK" , _name ,"out_BRANCH_COMPLETE_"+toString(i)+"_ACK" ); |
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| 169 | _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_ADDRESS", _name , "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"); |
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| 170 | _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA" , _name+"_Shifter","out_SHIFTER_" +toString(i)+"_DATA"); |
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[2] | 171 | } |
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[42] | 172 | |
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| 173 | // =====[ component_Shifter - Instanciation ]========================= |
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| 174 | |
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| 175 | #if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) |
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| 176 | |
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| 177 | #ifdef POSITION |
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| 178 | _component->interface_map (_name+"_Shifter","", |
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| 179 | _name ,""); |
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| 180 | #endif |
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| 181 | |
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| 182 | _component->port_map(_name+"_Shifter", "in_CLOCK" , _name,"in_CLOCK" ); |
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| 183 | _component->port_map(_name+"_Shifter", "in_NRESET", _name,"in_NRESET"); |
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| 184 | |
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| 185 | #endif |
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| 186 | |
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| 187 | for (uint32_t i=0; i<_param._nb_branch_complete; i++) |
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| 188 | { |
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| 189 | #ifdef POSITION |
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| 190 | _component->interface_map (_name+"_Shifter","shifter_"+toString(i), |
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| 191 | _name ,"branch_complete_"+toString(i)); |
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| 192 | |
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| 193 | #endif |
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| 194 | |
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| 195 | _component->port_map(_name+"_Shifter", "in_SHIFTER_" +toString(i)+"_DATA" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY"); |
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| 196 | _component->port_map(_name+"_Shifter", "in_SHIFTER_" +toString(i)+"_CARRY_IN", _name , "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION"); |
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| 197 | _component->port_map(_name+"_Shifter", "out_SHIFTER_"+toString(i)+"_DATA" , _name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA"); |
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| 198 | } |
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| 199 | |
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| 200 | #ifdef POSITION |
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| 201 | _component->generate_file(); |
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| 202 | #endif |
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[2] | 203 | }; |
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| 204 | |
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| 205 | }; // end namespace branch_history_table |
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| 206 | }; // end namespace two_level_branch_predictor |
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| 207 | }; // end namespace meta_predictor |
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| 208 | }; // end namespace predictor |
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| 209 | }; // end namespace stage_1_ifetch |
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| 210 | }; // end namespace behavioural |
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| 211 | }; // end namespace morpheo |
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| 212 | #endif |
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