1 | #ifdef VHDL |
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2 | /* |
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3 | * $Id$ |
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4 | * |
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5 | * [ Description ] |
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6 | * |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h" |
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10 | |
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11 | namespace morpheo { |
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12 | namespace behavioural { |
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13 | namespace stage_1_ifetch { |
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14 | namespace predictor { |
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15 | namespace meta_predictor { |
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16 | namespace two_level_branch_predictor { |
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17 | |
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18 | |
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19 | void Two_Level_Branch_Predictor::vhdl_body (Vhdl & vhdl) |
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20 | { |
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21 | log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_body","Begin"); |
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22 | |
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23 | list<string> list_port_map; |
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24 | |
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25 | if (_param._have_bht) |
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26 | { |
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27 | list_port_map.clear(); |
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28 | |
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29 | vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK "); |
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30 | vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET"); |
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31 | |
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32 | for (uint32_t i=0; i<_param._nb_prediction; i++) |
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33 | { |
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34 | vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); |
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35 | vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" ","signal_PREDICT_BHT_ACK_"+toString(i)); |
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36 | vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" ","signal_PREDICT_BHT_ADDRESS_"+toString(i)); |
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37 | vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_HISTORY_"+toString(i)+" ","signal_PREDICT_BHT_HISTORY_"+toString(i)); |
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38 | } |
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39 | |
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40 | for (uint32_t i=0; i<_param._nb_branch_complete; i++) |
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41 | { |
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42 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)); |
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43 | vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i)); |
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44 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)); |
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45 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" "," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)); |
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46 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+""," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)); |
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47 | } |
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48 | |
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49 | vhdl.set_body_component ("component_Branch_History_Table",_name+"_Branch_History_Table",list_port_map); |
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50 | } |
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51 | |
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52 | if (_param._have_pht) |
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53 | { |
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54 | list_port_map.clear(); |
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55 | |
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56 | vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK "); |
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57 | vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET"); |
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58 | |
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59 | for (uint32_t i=0; i<_param._nb_prediction; i++) |
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60 | { |
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61 | vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); |
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62 | vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" ","signal_PREDICT_PHT_ACK_"+toString(i)); |
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63 | vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" ","signal_PREDICT_PHT_ADDRESS_"+toString(i)); |
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64 | vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_HISTORY_"+toString(i)+" "," out_PREDICT_PHT_HISTORY_"+toString(i)); |
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65 | } |
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66 | |
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67 | for (uint32_t i=0; i<_param._nb_branch_complete; i++) |
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68 | { |
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69 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)); |
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70 | vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i)); |
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71 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)); |
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72 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" "," in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i)); |
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73 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+""," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)); |
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74 | } |
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75 | |
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76 | vhdl.set_body_component ("component_Pattern_History_Table",_name+"_Pattern_History_Table",list_port_map); |
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77 | } |
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78 | |
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79 | list_port_map.clear(); |
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80 | |
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81 | for (uint32_t i=0; i<_param._nb_prediction; i++) |
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82 | { |
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83 | if (_param._have_bht) |
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84 | { |
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85 | vhdl.set_body_component_port_map (list_port_map," in_PREDICT_BHT_ACK_"+toString(i)+" ","signal_PREDICT_BHT_ACK_"+toString(i)); |
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86 | vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_BHT_ADDRESS_"+toString(i)+" ","signal_PREDICT_BHT_ADDRESS_"+toString(i)); |
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87 | } |
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88 | if (_param._have_pht) |
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89 | { |
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90 | vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PHT_ACK_"+toString(i)+" ","signal_PREDICT_PHT_ACK_"+toString(i)); |
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91 | vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_PHT_ADDRESS_"+toString(i)+" ","signal_PREDICT_PHT_ADDRESS_"+toString(i)); |
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92 | } |
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93 | if (_param._have_bht and _param._have_pht) |
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94 | { |
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95 | vhdl.set_body_component_port_map (list_port_map," in_PREDICT_BHT_HISTORY_"+toString(i)+" ","signal_PREDICT_BHT_HISTORY_"+toString(i)); |
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96 | } |
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97 | vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" "," out_PREDICT_ACK_"+toString(i)); |
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98 | vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i)); |
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99 | } |
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100 | |
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101 | for (uint32_t i=0; i<_param._nb_branch_complete; i++) |
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102 | { |
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103 | if (_param._have_bht) |
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104 | { |
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105 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i)); |
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106 | vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)+"","signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)); |
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107 | } |
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108 | if (_param._have_pht) |
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109 | { |
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110 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PHT_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i)); |
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111 | vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)+"","signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)); |
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112 | } |
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113 | if (_param._have_bht and _param._have_pht) |
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114 | { |
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115 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+""," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)); |
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116 | } |
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117 | vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" "," out_BRANCH_COMPLETE_ACK_"+toString(i)); |
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118 | vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" "," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)); |
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119 | } |
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120 | |
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121 | vhdl.set_body_component ("component_Two_Level_Branch_Predictor_Glue",_name+"_Two_Level_Branch_Predictor_Glue",list_port_map); |
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122 | |
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123 | if (_param._have_bht) |
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124 | for (uint32_t i=0; i<_param._nb_prediction; i++) |
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125 | vhdl.set_body("out_PREDICT_BHT_HISTORY_"+toString(i)+" <= signal_PREDICT_BHT_HISTORY_"+toString(i)+";"); |
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126 | |
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127 | log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_body","End"); |
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128 | }; |
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129 | |
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130 | }; // end namespace two_level_branch_predictor |
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131 | }; // end namespace meta_predictor |
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132 | }; // end namespace predictor |
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133 | }; // end namespace stage_1_ifetch |
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134 | |
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135 | }; // end namespace behavioural |
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136 | }; // end namespace morpheo |
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137 | #endif |
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