source: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_set_port.cpp @ 42

Last change on this file since 42 was 42, checked in by rosiere, 17 years ago

Modification des classes d'encapsulation des interfaces :

  • gère les signaux à écrire dans le vhdl
  • les traces pour le testbench
  • la génération des vhdl structurelles

-> test sur la Pattern History Table

File size: 1.3 KB
Line 
1/*
2 * $Id$
3 *
4 * [ Description ]
5 *
6 */
7
8#include "Behavioural/include/Signal.h"
9
10
11namespace morpheo              {
12namespace behavioural          {
13
14#ifdef VHDL
15  void Signal::set_port (Vhdl * & vhdl)
16  {
17    log_printf(FUNC,Behavioural,"set_port (Vhdl)","Begin");
18
19    if ((_presence_port == PORT_VHDL_YES_TESTBENCH_YES) or
20        (_presence_port == PORT_VHDL_YES_TESTBENCH_NO ) or
21        (_presence_port == CLOCK_VHDL_YES)              or
22        (_presence_port == RESET_VHDL_YES))
23      vhdl->set_port (_name,_direction,_size);
24
25    log_printf(FUNC,Behavioural,"set_port (Vhdl)","End");
26  };
27
28#ifdef VHDL_TESTBENCH
29  void Signal::set_signal (Vhdl * & vhdl)
30  {
31    log_printf(FUNC,Behavioural,"set_signal (Vhdl)","Begin");
32   
33    if (   (_presence_port == PORT_VHDL_YES_TESTBENCH_YES)
34        or (_presence_port == PORT_VHDL_NO_TESTBENCH_YES )
35//      or (_presence_port == CLOCK_VHDL_YES)
36//      or (_presence_port == CLOCK_VHDL_NO )
37//      or (_presence_port == RESET_VHDL_YES)
38//      or (_presence_port == RESET_VHDL_NO )
39        )
40      vhdl->set_signal (_name        ,_size);
41
42    if (_direction == OUT)
43      vhdl->set_signal (_name+"_test",_size);
44
45    log_printf(FUNC,Behavioural,"set_signal (Vhdl)","End");
46  };
47#endif
48#endif
49
50}; // end namespace behavioural         
51}; // end namespace morpheo             
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