#ifdef VHDL_TESTBENCH

/*
 * $Id$
 *
 * [ Description ]
 * must be call after all add port
 */

#include "Behavioural/include/Vhdl_Testbench.h"

#include <sstream>
using namespace std;

namespace morpheo              {
namespace behavioural          {
  
  void Vhdl_Testbench::set_clock (string name,
				  bool   model_have_clock)
  {
    _clock_name = name;
    _vhdl->set_signal (name,std_logic(1),"'0'");

    if (model_have_clock == true)
      _list_port.push_back(name);

    _num_input   = _list_input_size .begin();
    _num_output  = _list_output_size.begin();
  };
  
}; // end namespace behavioural          
}; // end namespace morpheo              

#endif