source: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_pipeline.fig @ 44

Last change on this file since 44 was 44, checked in by rosiere, 17 years ago

Modification des classes d'encapsulation des interfaces.
Stable sur tous les composants actuels
File size: 4.2 KB
Line 
1#FIG 3.2
2Landscape
3Center
4Inches
5Letter 
6100.00
7Single
8-2
91200 2
106 4500 3600 9300 4050
112 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
12         5100 3600 5100 4050 4500 4050 4500 3600 5100 3600
132 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
14         5700 3600 5700 4050 5100 4050 5100 3600 5700 3600
152 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
16         6300 3600 6300 4050 5700 4050 5700 3600 6300 3600
172 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
18         7500 3600 7500 4050 6300 4050 6300 3600 7500 3600
192 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
20         8700 3600 8700 4050 7500 4050 7500 3600 8700 3600
212 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
22         9300 3600 9300 4050 8700 4050 8700 3600 9300 3600
234 1 0 50 -1 0 8 0.0000 0 75 345 4800 3750 dcache\001
244 1 0 50 -1 0 8 0.0000 0 105 375 4800 3975 request\001
254 1 0 50 -1 0 8 0.0000 0 105 330 5400 3750 update\001
264 1 0 50 -1 0 8 0.0000 0 75 285 5400 3975 status\001
274 1 0 50 -1 0 8 0.0000 0 75 225 6000 3750 VCI\001
284 1 0 50 -1 0 8 0.0000 0 105 375 6000 3975 request\001
294 1 0 50 -1 0 8 0.0000 0 90 750 6900 3825 memory access\001
304 1 0 50 -1 0 8 0.0000 0 75 225 8100 3750 VCI\001
314 1 0 50 -1 0 8 0.0000 0 90 375 8100 3975 respons\001
324 1 0 50 -1 0 8 0.0000 0 75 345 9000 3750 dcache\001
334 1 0 50 -1 0 8 0.0000 0 90 375 9000 3975 respons\001
34-6
356 8100 4200 8700 4650
362 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
37         8700 4200 8700 4650 8100 4650 8100 4200 8700 4200
384 1 0 50 -1 0 8 0.0000 0 75 345 8400 4350 dcache\001
394 1 0 50 -1 0 8 0.0000 0 90 375 8400 4575 respons\001
40-6
416 4500 3000 5700 3450
422 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
43         5100 3000 5100 3450 4500 3450 4500 3000 5100 3000
442 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
45         5700 3000 5700 3450 5100 3450 5100 3000 5700 3000
464 1 0 50 -1 0 8 0.0000 0 75 345 4800 3150 dcache\001
474 1 0 50 -1 0 8 0.0000 0 105 375 4800 3375 request\001
484 1 0 50 -1 0 8 0.0000 0 75 345 5400 3150 dcache\001
494 1 0 50 -1 0 8 0.0000 0 90 375 5400 3375 respons\001
50-6
516 4500 5400 5700 5850
522 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
53         5100 5400 5100 5850 4500 5850 4500 5400 5100 5400
542 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
55         5700 5400 5700 5850 5100 5850 5100 5400 5700 5400
564 1 0 50 -1 0 8 0.0000 0 75 345 4800 5550 dcache\001
574 1 0 50 -1 0 8 0.0000 0 105 375 4800 5775 request\001
584 1 0 50 -1 0 8 0.0000 0 75 345 5400 5550 dcache\001
594 1 0 50 -1 0 8 0.0000 0 90 375 5400 5775 respons\001
60-6
612 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
62         5100 4200 5100 4650 4500 4650 4500 4200 5100 4200
632 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
64         5700 4200 5700 4650 5100 4650 5100 4200 5700 4200
652 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
66         6300 4200 6300 4650 5700 4650 5700 4200 6300 4200
672 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
68         7500 4200 7500 4650 6300 4650 6300 4200 7500 4200
692 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
70         8100 4200 8100 4650 7500 4650 7500 4200 8100 4200
712 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
72         5100 4800 5100 5250 4500 5250 4500 4800 5100 4800
732 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5
74         5700 4800 5700 5250 5100 5250 5100 4800 5700 4800
752 1 0 1 0 29 50 -1 20 0.000 0 0 -1 0 0 2
76         5100 5025 5700 5025
774 2 0 50 -1 0 8 0.0000 0 90 525 4200 3300 Read - Hit\001
784 2 0 50 -1 0 8 0.0000 0 90 600 4200 3900 Read - Miss\001
794 1 0 50 -1 0 8 0.0000 0 75 345 4800 4350 dcache\001
804 1 0 50 -1 0 8 0.0000 0 105 375 4800 4575 request\001
814 1 0 50 -1 0 8 0.0000 0 105 330 5400 4350 update\001
824 1 0 50 -1 0 8 0.0000 0 75 285 5400 4575 status\001
834 1 0 50 -1 0 8 0.0000 0 75 225 6000 4350 VCI\001
844 1 0 50 -1 0 8 0.0000 0 105 375 6000 4575 request\001
854 1 0 50 -1 0 8 0.0000 0 90 750 6900 4425 memory access\001
864 1 0 50 -1 0 8 0.0000 0 75 225 7800 4350 VCI\001
874 1 0 50 -1 0 8 0.0000 0 90 375 7800 4575 respons\001
884 2 0 50 -1 0 8 0.0000 0 90 570 4200 4350 Write - Hit\001
894 2 0 50 -1 0 8 0.0000 0 90 645 4200 4575 Write - Miss\001
904 2 0 50 -1 0 8 0.0000 0 90 495 4200 4950 Invalidate\001
914 2 0 50 -1 0 8 0.0000 0 75 285 4200 5175 Flush\001
924 1 0 50 -1 0 8 0.0000 0 75 345 4800 4950 dcache\001
934 1 0 50 -1 0 8 0.0000 0 105 375 4800 5175 request\001
944 2 0 50 -1 0 8 0.0000 0 75 255 4200 5550 Lock\001
954 2 0 50 -1 0 8 0.0000 0 75 450 4200 5775 Prefetch\001
964 1 0 50 -1 0 8 0.0000 0 105 330 5400 4875 update\001
974 1 0 50 -1 0 8 0.0000 0 90 375 5400 5250 respons\001
984 1 0 50 -1 0 8 0.0000 0 75 345 5400 5175 dcache\001
994 1 0 50 -1 0 8 0.0000 0 75 285 5400 4950 status\001
Note: See TracBrowser for help on using the repository browser.