[91] | 1 | #FIG 3.2 |
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| 2 | Landscape |
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| 3 | Center |
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| 4 | Metric |
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| 5 | A4 |
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| 6 | 100.00 |
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| 7 | Single |
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| 8 | -2 |
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| 9 | 1200 2 |
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| 10 | 6 2610 4095 3420 4410 |
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| 11 | 4 1 0 0 -1 3 9 0.0000 0 150 780 3015 4365 Out of Order\001 |
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| 12 | 4 1 0 0 -1 0 9 0.0000 0 150 645 3015 4230 Icache_rsp\001 |
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| 13 | -6 |
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| 14 | 6 5670 4095 6480 4455 |
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| 15 | 4 1 0 0 -1 3 9 0.0000 0 150 780 6075 4410 Out of Order\001 |
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| 16 | 4 1 0 0 -1 0 9 0.0000 0 105 315 6075 4230 Issue\001 |
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| 17 | -6 |
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| 18 | 6 6975 3915 8235 4635 |
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| 19 | 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 20 | 3 0 1.00 60.00 120.00 |
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| 21 | 7290 3960 7920 3960 |
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| 22 | 4 1 0 0 -1 3 9 0.0000 0 150 1200 7605 4590 Load : Out of Order\001 |
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| 23 | 4 1 0 0 -1 0 9 0.0000 0 150 690 7605 4230 Dcache_req\001 |
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| 24 | 4 1 0 0 -1 3 9 0.0000 0 105 960 7605 4410 Store : In Order\001 |
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| 25 | -6 |
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| 26 | 6 7200 2745 8010 3105 |
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| 27 | 4 1 0 0 -1 0 9 0.0000 0 150 690 7605 3060 Dcache_rsp\001 |
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| 28 | 4 1 0 0 -1 3 9 0.0000 0 150 780 7605 2880 Out of Order\001 |
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| 29 | -6 |
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| 30 | 6 5670 2745 6480 3060 |
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| 31 | 4 1 0 0 -1 0 9 0.0000 0 105 495 6075 3060 Execute\001 |
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| 32 | 4 1 0 0 -1 3 9 0.0000 0 150 780 6075 2880 Out of Order\001 |
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| 33 | -6 |
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| 34 | 6 4275 2745 4815 3060 |
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| 35 | 4 1 0 0 -1 0 9 0.0000 0 105 525 4545 3060 Commit\001 |
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| 36 | 4 1 0 0 -1 3 9 0.0000 0 105 525 4545 2880 In Order\001 |
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| 37 | -6 |
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| 38 | 6 2655 2745 3375 3105 |
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| 39 | 4 1 0 0 -1 0 9 0.0000 0 150 645 3015 3060 Icache_req\001 |
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| 40 | 4 1 0 0 -1 3 9 0.0000 0 105 600 3015 2880 In Order*\001 |
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| 41 | -6 |
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| 42 | 6 4275 4095 4815 4410 |
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| 43 | 4 1 0 0 -1 3 9 0.0000 0 105 525 4545 4410 In Order\001 |
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| 44 | 4 1 0 0 -1 0 9 0.0000 0 105 435 4545 4230 Decode\001 |
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| 45 | -6 |
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| 46 | 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 47 | 3 0 1.00 60.00 120.00 |
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| 48 | 3330 3330 2700 3330 |
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| 49 | 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 50 | 3 0 1.00 60.00 120.00 |
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| 51 | 2700 3870 3330 3870 |
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| 52 | 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 53 | 3 0 1.00 60.00 120.00 |
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| 54 | 4230 3870 4860 3870 |
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| 55 | 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 56 | 3 0 1.00 60.00 120.00 |
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| 57 | 4860 3330 4230 3330 |
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| 58 | 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 59 | 3 0 1.00 60.00 120.00 |
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| 60 | 6390 3330 5760 3330 |
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| 61 | 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 62 | 3 0 1.00 60.00 120.00 |
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| 63 | 5760 3870 6390 3870 |
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| 64 | 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 65 | 3 0 1.00 60.00 120.00 |
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| 66 | 7920 3330 7290 3330 |
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| 67 | 2 4 0 1 0 6 52 -1 20 0.000 0 0 7 0 0 5 |
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| 68 | 3015 2610 7605 2610 7605 4590 3015 4590 3015 2610 |
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| 69 | 2 4 0 1 0 31 53 -1 10 0.000 0 0 7 0 0 5 |
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| 70 | 7650 2655 7650 4635 3060 4635 3060 2655 7650 2655 |
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| 71 | 2 4 0 1 0 13 50 -1 20 0.000 0 0 7 0 0 5 |
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| 72 | 1800 4050 1800 3150 2700 3150 2700 4050 1800 4050 |
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| 73 | 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 |
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| 74 | 4230 4050 4230 3150 3330 3150 3330 4050 4230 4050 |
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| 75 | 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 |
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| 76 | 5760 4050 5760 3150 4860 3150 4860 4050 5760 4050 |
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| 77 | 2 4 0 1 0 13 50 -1 20 0.000 0 0 7 0 0 5 |
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| 78 | 7920 4050 7920 3150 8820 3150 8820 4050 7920 4050 |
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| 79 | 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 |
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| 80 | 7290 4050 7290 3150 6390 3150 6390 4050 7290 4050 |
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| 81 | 2 4 0 1 0 13 51 -1 10 0.000 0 0 7 0 0 5 |
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| 82 | 8865 3195 7965 3195 7965 4095 8865 4095 8865 3195 |
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| 83 | 2 4 0 1 0 13 52 -1 10 0.000 0 0 7 0 0 5 |
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| 84 | 2745 3195 1845 3195 1845 4095 2745 4095 2745 3195 |
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| 85 | 2 4 0 1 0 11 51 -1 10 0.000 0 0 7 0 0 5 |
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| 86 | 4275 3195 3375 3195 3375 4095 4275 4095 4275 3195 |
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| 87 | 2 4 0 1 0 11 51 -1 10 0.000 0 0 7 0 0 5 |
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| 88 | 5805 3195 4905 3195 4905 4095 5805 4095 5805 3195 |
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| 89 | 2 4 0 1 0 11 51 -1 10 0.000 0 0 7 0 0 5 |
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| 90 | 7335 3195 6435 3195 6435 4095 7335 4095 7335 3195 |
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| 91 | 4 1 0 0 -1 2 10 0.0000 0 105 330 5310 2520 Core\001 |
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| 92 | 4 1 0 0 -1 2 10 0.0000 0 105 480 2250 3600 ICache\001 |
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| 93 | 4 1 0 0 -1 2 10 0.0000 0 105 690 3780 3600 Front end\001 |
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| 94 | 4 1 0 0 -1 2 10 0.0000 0 165 810 5310 3600 OoO Engine\001 |
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| 95 | 4 1 0 0 -1 2 10 0.0000 0 105 525 8370 3600 DCache\001 |
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| 96 | 4 1 0 0 -1 2 10 0.0000 0 105 540 6840 3510 Execute\001 |
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| 97 | 4 1 0 0 -1 2 10 0.0000 0 135 360 6840 3735 Loop\001 |
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