source: trunk/IPs/systemC/processor/Morpheo/Documentation/fig/MORPHEO_micro_architecture-part.fig @ 91

#FIG 3.2
Landscape
Center
Metric
A4      
100.00
Single
-2
1200 2
6 2610 4095 3420 4410
4 1 0 0 -1 3 9 0.0000 0 150 780 3015 4365 Out of Order\001
4 1 0 0 -1 0 9 0.0000 0 150 645 3015 4230 Icache_rsp\001
-6
6 5670 4095 6480 4455
4 1 0 0 -1 3 9 0.0000 0 150 780 6075 4410 Out of Order\001
4 1 0 0 -1 0 9 0.0000 0 105 315 6075 4230 Issue\001
-6
6 6975 3915 8235 4635
2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2
        3 0 1.00 60.00 120.00
         7290 3960 7920 3960
4 1 0 0 -1 3 9 0.0000 0 150 1200 7605 4590 Load : Out of Order\001
4 1 0 0 -1 0 9 0.0000 0 150 690 7605 4230 Dcache_req\001
4 1 0 0 -1 3 9 0.0000 0 105 960 7605 4410 Store : In Order\001
-6
6 7200 2745 8010 3105
4 1 0 0 -1 0 9 0.0000 0 150 690 7605 3060 Dcache_rsp\001
4 1 0 0 -1 3 9 0.0000 0 150 780 7605 2880 Out of Order\001
-6
6 5670 2745 6480 3060
4 1 0 0 -1 0 9 0.0000 0 105 495 6075 3060 Execute\001
4 1 0 0 -1 3 9 0.0000 0 150 780 6075 2880 Out of Order\001
-6
6 4275 2745 4815 3060
4 1 0 0 -1 0 9 0.0000 0 105 525 4545 3060 Commit\001
4 1 0 0 -1 3 9 0.0000 0 105 525 4545 2880 In Order\001
-6
6 2655 2745 3375 3105
4 1 0 0 -1 0 9 0.0000 0 150 645 3015 3060 Icache_req\001
4 1 0 0 -1 3 9 0.0000 0 105 600 3015 2880 In Order*\001
-6
6 4275 4095 4815 4410
4 1 0 0 -1 3 9 0.0000 0 105 525 4545 4410 In Order\001
4 1 0 0 -1 0 9 0.0000 0 105 435 4545 4230 Decode\001
-6
2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2
        3 0 1.00 60.00 120.00
         3330 3330 2700 3330
2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2
        3 0 1.00 60.00 120.00
         2700 3870 3330 3870
2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2
        3 0 1.00 60.00 120.00
         4230 3870 4860 3870
2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2
        3 0 1.00 60.00 120.00
         4860 3330 4230 3330
2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2
        3 0 1.00 60.00 120.00
         6390 3330 5760 3330
2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2
        3 0 1.00 60.00 120.00
         5760 3870 6390 3870
2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2
        3 0 1.00 60.00 120.00
         7920 3330 7290 3330
2 4 0 1 0 6 52 -1 20 0.000 0 0 7 0 0 5
         3015 2610 7605 2610 7605 4590 3015 4590 3015 2610
2 4 0 1 0 31 53 -1 10 0.000 0 0 7 0 0 5
         7650 2655 7650 4635 3060 4635 3060 2655 7650 2655
2 4 0 1 0 13 50 -1 20 0.000 0 0 7 0 0 5
         1800 4050 1800 3150 2700 3150 2700 4050 1800 4050
2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5
         4230 4050 4230 3150 3330 3150 3330 4050 4230 4050
2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5
         5760 4050 5760 3150 4860 3150 4860 4050 5760 4050
2 4 0 1 0 13 50 -1 20 0.000 0 0 7 0 0 5
         7920 4050 7920 3150 8820 3150 8820 4050 7920 4050
2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5
         7290 4050 7290 3150 6390 3150 6390 4050 7290 4050
2 4 0 1 0 13 51 -1 10 0.000 0 0 7 0 0 5
         8865 3195 7965 3195 7965 4095 8865 4095 8865 3195
2 4 0 1 0 13 52 -1 10 0.000 0 0 7 0 0 5
         2745 3195 1845 3195 1845 4095 2745 4095 2745 3195
2 4 0 1 0 11 51 -1 10 0.000 0 0 7 0 0 5
         4275 3195 3375 3195 3375 4095 4275 4095 4275 3195
2 4 0 1 0 11 51 -1 10 0.000 0 0 7 0 0 5
         5805 3195 4905 3195 4905 4095 5805 4095 5805 3195
2 4 0 1 0 11 51 -1 10 0.000 0 0 7 0 0 5
         7335 3195 6435 3195 6435 4095 7335 4095 7335 3195
4 1 0 0 -1 2 10 0.0000 0 105 330 5310 2520 Core\001
4 1 0 0 -1 2 10 0.0000 0 105 480 2250 3600 ICache\001
4 1 0 0 -1 2 10 0.0000 0 105 690 3780 3600 Front end\001
4 1 0 0 -1 2 10 0.0000 0 165 810 5310 3600 OoO Engine\001
4 1 0 0 -1 2 10 0.0000 0 105 525 8370 3600 DCache\001
4 1 0 0 -1 2 10 0.0000 0 105 540 6840 3510 Execute\001
4 1 0 0 -1 2 10 0.0000 0 135 360 6840 3735 Loop\001