|
Last change
on this file since 135 was
135,
checked in by rosiere, 15 years ago
|
|
1) Add Vhdl component
2) Inhib VHDL Seltest interface
|
-
Property svn:keywords set to
Id
|
|
File size:
1.8 KB
|
| Rev | Line | |
|---|
| [88] | 1 | # |
|---|
| 2 | # $Id: Makefile.flags 135 2009-07-17 08:59:05Z rosiere $ |
|---|
| 3 | # |
|---|
| 4 | # [ Description ] |
|---|
| 5 | # |
|---|
| 6 | |
|---|
| 7 | #-----[ Simulator ]---------------------------------------- |
|---|
| [133] | 8 | SIMULATOR_SYSTEMC ?= systemc |
|---|
| [117] | 9 | SIMULATOR_VHDL ?= modelsim |
|---|
| [88] | 10 | |
|---|
| [117] | 11 | # 4 simulators for systemC : |
|---|
| [135] | 12 | # systemc - supported - SystemC 2.2.0 |
|---|
| [117] | 13 | # systemcass - supported - SystemCASS |
|---|
| 14 | # systemcass_deps - not yet supported - Systemcass, and use port dependency information instead of sensitivity list |
|---|
| 15 | # modelsim - not yet supported - Co simulation SystemC/VHDL with Modelsim |
|---|
| [88] | 16 | |
|---|
| [117] | 17 | # 1 simulator for VHDL |
|---|
| 18 | # modelsim - supported |
|---|
| 19 | |
|---|
| [88] | 20 | #-----[ Flags ]-------------------------------------------- |
|---|
| 21 | MORPHEO_FLAGS = -DSYSTEMC \ |
|---|
| [135] | 22 | -DDEBUG=DEBUG_TRACE \ |
|---|
| 23 | -DSTATISTICS \ |
|---|
| 24 | -DVHDL |
|---|
| [88] | 25 | |
|---|
| [131] | 26 | # -DTRANSLATION \ |
|---|
| 27 | # -DDEBUG_SIGNAL \ |
|---|
| [135] | 28 | # -DVHDL_TESTBENCH \ |
|---|
| [108] | 29 | # -DVHDL_TESTBENCH_ASSERT \ |
|---|
| [88] | 30 | # -DPRINT_COLOR \ |
|---|
| 31 | # -DPOSITION \ |
|---|
| [117] | 32 | # -DDEBUG_MEMORY_LEAK \ |
|---|
| [88] | 33 | |
|---|
| 34 | # Flags : |
|---|
| 35 | # DEBUG={level} - Print Debug Message |
|---|
| 36 | # SYSTEMC - To generate a systemc's model |
|---|
| 37 | # VHDL - To generate a vhdl's models |
|---|
| 38 | # VHDL_TESTBENCH (need SYSTEMC) - In the simulation, generate two testbench's file (input and ouput) to validate the vhdl's model |
|---|
| 39 | # VHDL_TESTBENCH_ASSERT (need VHDL_TESTBENCH) - In the simulation, generate in testbench's file an serie of assert |
|---|
| 40 | # POSITION - To generate a position's files (it's input of viewer) |
|---|
| 41 | # STATISTICS (need SYSTEMC) - In the simulation, generate a statistics's file |
|---|
| 42 | # TRANSLATION - Translate message |
|---|
| 43 | # PRINT_COLOR - Print with colors |
|---|
Note: See
TracBrowser
for help on using the repository browser.
