1 | # |
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2 | # $Id: Makefile.flags 139 2010-07-30 14:47:27Z rosiere $ |
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3 | # |
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4 | # [ Description ] |
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5 | # |
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6 | |
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7 | #-----[ Simulator ]---------------------------------------- |
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8 | SIMULATOR_SYSTEMC ?= systemc |
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9 | SIMULATOR_VHDL ?= modelsim |
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10 | |
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11 | # 4 simulators for systemC : |
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12 | # systemc - supported - SystemC 2.2.0 |
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13 | # systemcass - supported - SystemCASS |
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14 | # systemcass_deps - not yet supported - Systemcass, and use port dependency information instead of sensitivity list |
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15 | # modelsim - not yet supported - Co simulation SystemC/VHDL with Modelsim |
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16 | |
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17 | # 1 simulator for VHDL |
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18 | # modelsim - supported |
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19 | |
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20 | #-----[ Flags ]-------------------------------------------- |
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21 | MORPHEO_TYPE ?= debug_systemc |
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22 | |
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23 | MORPHEO_systemc_FLAGS = -DSYSTEMC \ |
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24 | -DSTATISTICS \ |
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25 | -DTRANSLATION |
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26 | |
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27 | MORPHEO_vhdl_FLAGS = -DVHDL \ |
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28 | -DTRANSLATION |
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29 | |
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30 | MORPHEO_cosim_FLAGS = -DSYSTEMC \ |
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31 | -DSTATISTICS \ |
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32 | -DVHDL \ |
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33 | -DTRANSLATION |
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34 | |
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35 | MORPHEO_debug_FLAGS = -DSYSTEMC \ |
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36 | -DDEBUG=DEBUG_FUNC \ |
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37 | -DVHDL |
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38 | |
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39 | MORPHEO_debug_systemc_FLAGS = -DSYSTEMC \ |
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40 | -DSTATISTICS \ |
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41 | -DDEBUG=DEBUG_FUNC |
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42 | |
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43 | MORPHEO_FLAGS = $(MORPHEO_$(MORPHEO_TYPE)_FLAGS) |
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44 | |
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45 | # | systemc | vhdl | cosim | debug | debug_systemc |
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46 | #-----------------------+---------+------+-------+-------+--------------- |
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47 | # TRANSLATION | X | X | X | | |
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48 | # SYSTEMC | X | | X | X | X |
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49 | # STATISTICS | X | | X | X | X |
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50 | # VHDL | | X | X | X | |
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51 | # VHDL_TESTBENCH | | | | | |
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52 | # VHDL_TESTBENCH_ASSERT | | | | | |
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53 | # DEBUG | | | | X | X |
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54 | # DEBUG_MEMORY_LEAK | | | | | |
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55 | # DEBUG_SIGNAL | | | | | |
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56 | # POSITION | | | | | |
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57 | # PRINT_COLOR | | | | | |
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58 | |
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59 | # Flags : |
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60 | # TRANSLATION - Translate message |
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61 | # SYSTEMC - To generate a systemc's model |
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62 | # STATISTICS (need SYSTEMC) - In the simulation, generate a statistics's file |
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63 | # VHDL - To generate a vhdl's models |
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64 | # VHDL_TESTBENCH (need SYSTEMC) - In the simulation, generate two testbench's file (input and ouput) to validate the vhdl's model |
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65 | # VHDL_TESTBENCH_ASSERT (need VHDL_TESTBENCH) - In the simulation, generate in testbench's file an serie of assert |
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66 | # DEBUG={level} - Print Debug Message |
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67 | # DEBUG_MEMORY_LEAK - |
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68 | # DEBUG_SIGNAL - |
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69 | # POSITION - To generate a position's files (it's input of viewer) |
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70 | # PRINT_COLOR - Print with colors |
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